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CN106601162B - Display panel and display device comprising it - Google Patents

Display panel and display device comprising it Download PDF

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Publication number
CN106601162B
CN106601162B CN201611204324.2A CN201611204324A CN106601162B CN 106601162 B CN106601162 B CN 106601162B CN 201611204324 A CN201611204324 A CN 201611204324A CN 106601162 B CN106601162 B CN 106601162B
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CN
China
Prior art keywords
test circuit
circuit region
display panel
data line
arbitrary neighborhood
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Active
Application number
CN201611204324.2A
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Chinese (zh)
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CN106601162A (en
Inventor
朱仁远
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tianma Microelectronics Co Ltd
Wuhan Tianma Microelectronics Co Ltd
Original Assignee
Tianma Microelectronics Co Ltd
Shanghai Tianma AM OLED Co Ltd
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Priority to CN201611204324.2A priority Critical patent/CN106601162B/en
Publication of CN106601162A publication Critical patent/CN106601162A/en
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/006Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/12Test circuits or failure detection circuits included in a display system, as permanent part thereof

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Electroluminescent Light Sources (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

This application discloses display panel and include its display device.Display panel includes array substrate, and array substrate includes viewing area and the non-display area around the viewing area;The viewing area includes a plurality of scan line for extending in a first direction, arranging in a second direction, a plurality of extension, data line arranged in the first direction in a second direction, multiple pixel regions of array arrangement;The viewing area further includes test circuit region, and the test circuit region includes multiple switch element, and each data line connects one to one with each switch element.Such display panel will be due to that will test circuit setting between any two rows pixel region or between any two column pixel region, so that the narrow frame of display panel not only may be implemented, but also can carry out malfunction elimination using test circuit in display panel use process.

Description

Display panel and display device comprising it
Technical field
This application involves field of display technology, and in particular to organic light emitting display technical field more particularly to display panel And the display device comprising it.
Background technique
It is whether defective in order to detect display panel before display panel connects to the control circuit, it can be in display panel In be provided with test circuit region and with test circuit region in test circuit connection testing cushion.It can apply in testing cushion Electric signal will be with the pixel for detecting display panel on each data line of electric signal transmission to display panel by short bar It is no defective.After display panel connects to the control circuit, short bar and testing cushion are in the real work of display panel Just no longer work.
Usually test circuit region and testing cushion are arranged in the non-display area of display panel, since test circuit region occupancy is non- Certain area of viewing area, is unfavorable for the narrow frame of display panel.
Summary of the invention
In view of the above problem of the existing technology, it is intended to provide a kind of display panel and the display device comprising it, with Solve at least partly technical problem described in background technology.
In a first aspect, the embodiment of the present application provides a kind of display panel, including array substrate, array substrate includes display Area and non-display area around viewing area;Viewing area includes a plurality of scanning for extending in a first direction, arranging in a second direction Line, a plurality of extension, data line arranged in the first direction in a second direction, multiple pixel regions of array arrangement;It also wraps viewing area Test circuit region is included, test circuit region includes multiple switch element, and each data line connects one to one with each switch element.
Optionally, test circuit region extends in a first direction, and is arranged between two scan lines of arbitrary neighborhood.
Optionally, viewing area is circle, includes two adjacent scan lines in viewing area, in two adjacent scan lines Orthographic projection and orthographic projection from each data line to array substrate where plane of any one scan line to plane where array substrate Intersection;Circuit region is tested to be arranged between two adjacent scan lines.
Optionally, test circuit region extends in a second direction, and is arranged between two data line of arbitrary neighborhood.
Optionally, viewing area is circle, includes two adjacent data lines in viewing area, in two adjacent data lines Orthographic projection and orthographic projection from each scan line to array substrate where plane of any one data line to plane where array substrate Intersection;Test circuit region is arranged between two adjacent data lines.
Optionally, display panel further includes transparent cover plate and organic hair for being arranged between array substrate and transparent cover plate Optical material layer;Organic light emitting material includes and multiple pixel regions multiple luminescence units correspondingly, multiple luminescence unit battle arrays Column arrangement;Spacing between two row luminescence unit of arbitrary neighborhood is equal, and the spacing phase between two column luminescence unit of arbitrary neighborhood Deng;It is each any in addition to spacing adjacent with test circuit region, between two row pixel regions of test circuit region heteropleural respectively Spacing between adjacent rows pixel region is equal and less than the spacing between two row luminescence unit of arbitrary neighborhood.
Optionally, display panel further includes transparent cover plate and organic hair for being arranged between array substrate and transparent cover plate Optical material layer;Organic light emitting material includes and multiple pixel regions multiple luminescence units correspondingly, multiple luminescence unit battle arrays Column arrangement;Spacing between two row luminescence unit of arbitrary neighborhood is equal, and the spacing phase between two column luminescence unit of arbitrary neighborhood Deng;It is each any in addition to spacing adjacent with test circuit region, between two column pixel regions of test circuit region heteropleural respectively Spacing between adjacent two column pixel region is equal and less than the spacing between two column luminescence unit of arbitrary neighborhood.
Optionally,Wherein, P1 is except adjacent with test circuit region, different positioned at test circuit region respectively Except spacing between two column pixel regions of side, spacing between each two row pixel region of arbitrary neighborhood, P2 is two row of arbitrary neighborhood Spacing between luminescence unit.
Optionally,Wherein, L1 be except respectively with test circuit region it is adjacent, be located at test circuit region heteropleural Two column pixel regions between spacing except, the spacing between each two column pixel region of arbitrary neighborhood, L2 be arbitrary neighborhood two column hair Spacing between light unit.
Optionally, multiple switch element is divided into N number of switch element group, and each switch element group includes multiple switch member Part;Multiple data lines are divided into N number of data line group, include multiple data lines in each data line group;Each data line group with one Switch element group corresponds;Pieces of data line switch element group corresponding with the data line group in any one data line group In each switch connect one to one.
Second aspect, the embodiment of the present application provide a kind of display device, and display device includes above-mentioned display panel.
Display panel provided by the present application and display device comprising it, by the viewing area surrounded by non-display area Setting test circuit region, so that the display panel of narrow frame, which not only may be implemented, can also retain test circuit region, so as to aobvious Show in panel use process and checks failure
Detailed description of the invention
By reading a detailed description of non-restrictive embodiments in the light of the attached drawings below, the application's is other Feature, objects and advantages will become more apparent upon:
Fig. 1 is a kind of structural schematic diagram of display panel provided by the embodiments of the present application;
Fig. 2 is the correspondence diagram of test circuit region and data line shown in Fig. 1;
Fig. 3 is another structural schematic diagram of display panel provided by the embodiments of the present application;
Fig. 4 is a kind of display device structure schematic diagram provided by the embodiments of the present application.
Specific embodiment
The application is described in further detail with reference to the accompanying drawings and examples.It is understood that this place is retouched The specific embodiment stated is only used for explaining related invention, rather than the restriction to the invention.It also should be noted that in order to just Part relevant to related invention is illustrated only in description, attached drawing.
It should be noted that in the absence of conflict, the features in the embodiments and the embodiments of the present application can phase Mutually combination.The application is described in detail below with reference to the accompanying drawings and in conjunction with the embodiments.
Referring to FIG. 1, Fig. 1 shows a kind of structural schematic diagram of display panel provided by the embodiments of the present application.Such as Fig. 1 institute Show, display panel 100 includes array substrate 110, organic light emitting material 120.In addition, display panel further includes encapsulating material layer (not shown).
As shown in Figure 1, array substrate 110 includes viewing area 111 and non-display area 112.Wherein non-display area 112 surrounds Viewing area 111.
In viewing area 111 include it is a plurality of extend in a first direction, along second to arrangement scan line 1101;It is a plurality of along Two directions extend, along first to the data line 1102 of arrangement and by data line 1102 and the formation arranged in a crossed manner of scan line 1101 Multiple pixel regions 1103.
It further include test circuit region 1104 in viewing area 111.It may include multiple switch member in test circuit region 1104 Part.Each switch element and each above-mentioned data line correspond.Specifically,
Referring to FIG. 2, it illustrates the correspondence diagrams for testing circuit region and data line shown in Fig. 1.Such as Fig. 2 institute Show, testing includes multiple switch element T in circuit region 1104.Pieces of data line 1102 and each switch element T, which are corresponded, to be connected It connects.
In some optional implementations of the present embodiment, as shown in Fig. 2, the multiple switch member in test circuit region 1104 Part T can be divided into N switch element group SW1, SW2 ..., SWN, include multiple switch element T in each switch element group.It is a plurality of Data line 201 can also be divided into N number of data line group D1, D2 ..., DN, include multiple data lines 1102 in each data line group. Each data line group and each switch element group correspond.Further, the pieces of data line in any one data line group Each switch T in 1102 switch element groups corresponding with the data line group connects one to one.Each switch element group pair Answer a test signal input part namely switch element group SW1, SW2 ..., SWN respectively correspond test signal input part In1, In2,…,InN.The testing cushion that each test signal input part can be arranged in array substrate non-display area with one is connect (not shown).
Specifically, test switch element T in circuit region in 1104 can by way of punching with corresponding data line 1102 connection, or test circuit region 1104 in switch element T can punching plus cabling by way of with corresponding data Line 1102 connects.
With continued reference to FIG. 1, test circuit region 1104 extends in a first direction, and tests circuit region 1104 and can be set Between two scan lines 1101 of arbitrary neighborhood.
It is understood that when test circuit region 1104 is arranged between two shorter scan lines 1101, due to surveying For examination circuit region 1104 due to that can not cover pieces of data line, the data lines 1102 of corresponding test 1104 two sides of circuit region can be with It is connect by way of punching plus cabling with the switch element T in test circuit region 1104.
It in the present embodiment, should when the test signal input part of any one switch element group has test signal input Each switch element in switch element group can all turn on, test signal by conducting switch element can for transmission to Come on pieces of data line 1102 in the corresponding data line group of switch element group to the display panel including array substrate 110 100 are tested.
As shown in Figure 1, organic light emitting material 120 includes multiple luminescence units 121, and multiple luminescence units 121 are in battle array Column arrangement.Each luminescence unit 121 is corresponded with each pixel region 1103 in array substrate 110.
Display panel 100 in the present embodiment, can be by each pixel region 1103 in array substrate 110 when being powered on work Glow current is provided to corresponding luminescence unit 121 so that luminescence unit 121 shines.Common organic light emitting display face Plate, test circuit region are arranged in non-display area, in order to realize the narrow frame of display panel, and can show again Retain in panel and test circuit region, in array substrate provided in this embodiment, test circuit region 1104 be can be set in viewing area In 111.
In the present embodiment, test circuit region 1104 can be set in the viewing area of array substrate 110 111 any two Between scan line 1101.It can be set in 110 viewing area 111 of array substrate to make to test circuit region 1104, and simultaneously Multiple luminescence units 121 in organic light emitting material 120 are kept to be uniformly distributed, it can by adjusting in array substrate 110 The position of multirow pixel region 1103 or whole row pixel regions 1103, so that test circuit region 1104 can be set in array substrate Between adjacent rows scan line 1101 in 110.
Specifically, in the pixel region adjusted 1103 of array substrate 110, except adjacent with the test circuit region 1104 respectively , positioned at test 1104 heteropleural of circuit region two row pixel regions 1103 between spacing except, remaining adjacent rows pixel region Spacing between 1103 can be equal, can also be unequal.When except respectively it is adjacent with the test circuit region 1104, be located at test Spacing except spacing between two row pixel regions 1103 of 1104 heteropleural of circuit region, between remaining adjacent rows pixel region 1103 When equal (spacing is denoted as P1), the process complexity of production array substrate 110 can be reduced.
The spacing between two row luminescence unit 121 of arbitrary neighborhood in luminous material layer 120 is equal.Herein, arbitrary neighborhood Spacing between two row luminescence units 121 is denoted as P2.
Removing in array substrate 110 is adjacent with the test circuit region 1104 respectively, is located at test 1104 heteropleural of circuit region Two row pixel regions 1103 between spacing except, spacing P1 between remaining adjacent rows pixel is less than organic light emitting material The spacing P2 between two row luminescence unit 121 of arbitrary neighborhood in 120.In the optional embodiment of the present embodiment, P1, P2 it Between meet following relationship:
Setting can not only make array substrate 110 vacate enough space test circuit regions 1104 in this way, but also will not Because the spacing P2 gap between spacing P1 and organic light-emitting units 121 between the pixel region 1103 of array substrate 110 is too big Influence display.It is flat to array substrate place that the unequal each luminescence unit 121 made in organic light emitting material of P1, P2 is set The orthographic projection of the orthographic projection 121a in face pixel region 1103 corresponding with each luminescence unit 121 to plane where array substrate is endless Full weight is closed.In order to allow each pixel region 1103 to each luminescence unit 121 provide glow current, pixel region 1103 with it is corresponding 121 yuan of luminous list between can be connected by lead.
In this example it is shown that the edge shape in area 111 can be circle, or polygon and ellipse etc. Deng other shapes.Herein without limitation.
Array substrate provided in this embodiment is arranged between any two scan lines by that will test circuit region, both may be used To realize the demand of narrow frame, and may be implemented to carry out test to display panel using test circuit region and to display panel Malfunction elimination is carried out using test circuit region in use.
In other some technical solutions, in order to realize the narrow frame of display panel, circuit can will be usually tested Area and testing cushion are arranged on the outside of display panel connection wiring area, after the detection for completing display panel, will test circuit region with And testing cushion excision.Although doing so the narrow frame that display panel may be implemented, if if aobvious in subsequent use Show that panel breaks down, can not just reuse test circuit and detection and display panel verifying are carried out to failure, be made to malfunction elimination At difficulty.
In some optional implementations of the present embodiment, the shape of viewing area 111 can be circle.As shown in Figure 1, working as It include two scan lines: scan line 1111 and scan line 1121, scan line 1111 in viewing area 111 when viewing area 111 is round It is adjacent with scan line 1121, and where any one scan line in scan line 1111 and scan line 1121 to array substrate 110 The orthographic projection of plane is intersected with each data line 1102 to the orthographic projection of 110 place plane of array substrate.Test circuit region 1104 is set It sets between scan line 1111 and scan line 1121.
Setting test circuit region 1104 in this way can make test circuit region 1104 have enough length in a second direction Allow be arranged in test circuit region 1104 in each switch element T by punching and shorter cabling can and its Corresponding data line 1102 connects.
To the array substrate for being provided with round viewing area, circuit region will be tested it is placed on intersecting with pieces of data line Between two scan lines, and make except two row pixels adjacent with the test circuit region respectively, positioned at test circuit region heteropleural Except spacing between area, the spacing between remaining adjacent rows pixel is equal;Organic hair corresponding with the array substrate simultaneously The spacing of any two rows luminescence unit is equal in optical material layer.Both round display panel narrow frame requirement may be implemented and expired Foot carries out malfunction elimination using test circuit region in round display panel use process, and can reduce the round display surface of production The process complexity of plate.
Another structural representation of display panel provided by the embodiments of the present application is shown continuing in conjunction with Fig. 3, Fig. 3.
Similar with embodiment illustrated in fig. 1, display panel 200 includes array substrate 210 and organic light emitting material 220, this Outer display panel 200 further includes packaged glass layer (not shown).
Array substrate 210 as shown in Figure 3 includes viewing area 211 and non-display area 212.Wherein non-display area 212 surrounds Viewing area 211.
In viewing area 211 include it is a plurality of extend in a first direction, along second to arrangement scan line 2101, it is a plurality of along the Two directions extend, along first to arrangement data line 2102, and by data line 2102 and the formation arranged in a crossed manner of scan line 2101 Array arrangement multiple pixel regions 2103.
It further include test circuit region 2104 in viewing area 211.The test circuit region 2104 multiple switch element that includes with And the corresponding relationship of multiple switch element and data line may refer to Fig. 2.
Unlike embodiment illustrated in fig. 1, in embodiment illustrated in fig. 3, test circuit region 2104 be can be set any Between two data lines 2102.
It is understood that when testing the setting of circuit region 2104 between any two datas line 2102, pieces of data Line 2102 is required to be connected by way of punching in conjunction with cabling with corresponding switch element in test circuit region 2104 It connects.
The signal input part of each switch element group is connect with the testing cushion (not shown) that non-display area 212 is arranged in.When When applying test signal to testing cushion, the signal input part of corresponding switch element group is transferred to by testing cushion.In switch member When each switch element in part group is opened, test signal can be passed to pieces of data line corresponding with the switch element group In 2102, to realize the test to display panel 200.When the setting of circuit region 2104 will be tested in viewing area 211, except difference It is adjacent with the test circuit region 2104, positioned at test 2104 heteropleural of circuit region two column pixel regions 2103 between spacing it Outside, the spacing between remaining adjacent two column pixel region 2103 can be equal, can also be unequal.When except respectively with the test circuit Area 2104 is adjacent, except the spacing between two column pixel regions 2103 of test 2104 heteropleural of circuit region, remaining adjacent two When spacing (spacing between remaining adjacent two column pixel can be denoted as L1) between column pixel region 2103 is equal, system can be reduced Make the process complexity of array substrate 210.
As shown in figure 3, organic light emitting material 220 includes multiple luminescence units 221, and multiple luminescence units 221 are in battle array Column arrangement.The spacing between luminescence unit 221 that arbitrary neighborhood two arranges is equal.Between the luminescence unit 221 that arbitrary neighborhood two arranges Spacing can be denoted as L2.Spacing L1 between remaining above-mentioned adjacent two column pixel region 2103 is less than organic light emitting material 220 In two column luminescence unit 221 of arbitrary neighborhood between spacing L2.In some optional embodiments of the present embodiment, L1, L2 Between meet following relationship:
Setting can not only make array substrate 210 vacate enough space test circuit regions 2104 in this way, but also will not Because the spacing L2 gap between spacing L1 and organic light-emitting units 221 between the pixel region 2103 of array substrate 210 is too big Influence display.The unequal each luminescence unit 221 made in organic light emitting material 220 of L1, L2 is set to array substrate 210 The orthographic projection 221a of place plane pixel region 2103 corresponding with each luminescence unit 221 is to 210 place plane of array substrate Orthographic projection is not exclusively overlapped.It can be connected by lead between each pixel region and corresponding luminescence unit.
Display panel provided in this embodiment is arranged between any two datas line, arbitrarily by that will test circuit region One data line is connected by cabling with the corresponding switch element tested in circuit region, and display panel narrow frame may be implemented Change, and malfunction elimination is carried out using test circuit region in use to display panel.
In some optional implementations of the present embodiment, the edge shape of the viewing area 211 in array substrate 210 is circle Shape.When the edge shape of viewing area 211 is round, in viewing area 211 include it is a plurality of extend in a first direction, along second to The scan line 2101 of arrangement, it is a plurality of extend in a second direction, along first to arrangement data line 2102, by data line 2102 and sweeping Retouch multiple pixel regions 2103 of the array arrangement of the formation arranged in a crossed manner of line 2101, and test circuit region 2104.
It in the present embodiment, include two data lines: data line 2112 and data line 2122, number in round viewing area 211 It is adjacent according to line 2112 and data line 2122, and any one data line in data line 2112 and data line 2122 is to array substrate The orthographic projection of 210 place planes is intersected with each scan line 2101 to the orthographic projection of 210 place plane of array substrate.Test circuit region 2104 are arranged between data line 2112 and data line 2122.
When the viewing area of array substrate 210 211 is circle, then organic light emitting material 220 or circle.Organic hair Optical material layer 220 may include multiple luminescence units 221, and multiple luminescence units 221 are arranged in array.The hair that arbitrary neighborhood two arranges Spacing between light unit 221 can be equal.
Each luminescence unit 221 in organic light emitting material 220 is to the orthographic projection of 210 place plane of array substrate and each The corresponding pixel region 2103 of a luminescence unit 221a is not exclusively overlapped to the orthographic projection of 2100 place plane of array substrate.Each picture Plain area 2103 can provide luminous signal to luminescence unit 2211 by lead.
Organic light emitting display panel provided in this embodiment, to the array base for including edge shape being circular viewing area Test circuit region is placed between the two adjacent data lines to intersect with each scan line, and makes except difference by plate Except spacing adjacent with the test circuit region, between two column pixel regions of test circuit region heteropleural, remaining adjacent two Spacing between column pixel region is equal;The column of arbitrary neighborhood two shine in organic light emitting material corresponding with the array substrate simultaneously The spacing of unit is equal.Both may be implemented display panel narrow frame requirement and meet using test circuit to aobvious panel into Row is tested and carries out malfunction elimination using test circuit region in use to display panel, and can reduce production and show The process complexity of panel.
Referring to FIG. 4, it illustrates a kind of display device structure schematic diagrames provided by the embodiments of the present application.
As shown in figure 4, display device 300 is wrist-watch, which includes display panel as described above.In addition, It will be understood by those skilled in the art that the display device of the application other than including display panel, can also include others Some well known structures, such as when display panel is liquid crystal display panel, display device 300 further include for display panel The back light unit of backlight is provided.In order not to obscure the emphasis of the application, no longer structure well known to these will be carried out further Description.It can also be computer it should be noted that the application display device is not limited to wrist-watch shown in Figure 30 0, television set, The devices such as intelligence wearing.
Above description is only the preferred embodiment of the application and the explanation to institute's application technology principle.Those skilled in the art Member is it should be appreciated that invention scope involved in the application, however it is not limited to technology made of the specific combination of above-mentioned technical characteristic Scheme, while should also cover in the case where not departing from the inventive concept, it is carried out by above-mentioned technical characteristic or its equivalent feature Any combination and the other technical solutions formed.Such as features described above has similar function with (but being not limited to) disclosed herein Can technical characteristic replaced mutually and the technical solution that is formed.

Claims (9)

1. a kind of display panel, which is characterized in that including array substrate, the array substrate includes viewing area and surrounds described The non-display area of viewing area;
The viewing area includes a plurality of scan line for extending in a first direction, arranging in a second direction, a plurality of to prolong in a second direction It stretches, data line arranged in the first direction, multiple pixel regions of array arrangement;
The viewing area further include test circuit region, the test circuit region includes multiple switch element, each data line and Each switch element connects one to one;
The test circuit region extends in a first direction, and is arranged between two scan lines of arbitrary neighborhood,
Or the test circuit region extends in a second direction, and is arranged between two data line of arbitrary neighborhood.
2. display panel according to claim 1, which is characterized in that when the test circuit region extends in a first direction, And when being arranged between two scan lines of arbitrary neighborhood, the viewing area is circle,
Include two adjacent scan lines in the viewing area, any one scan line in two adjacent scan lines to The orthographic projection of plane where the array substrate is intersected with each data line to the orthographic projection of plane where array substrate;
The test circuit region is arranged between two adjacent scan lines.
3. display panel according to claim 1, which is characterized in that when the test circuit region extends in a second direction, And when being arranged between two data line of arbitrary neighborhood, the viewing area is circle,
Include two adjacent data lines in the viewing area, any one data line in two adjacent data lines to The orthographic projection of plane where the array substrate is intersected with each scan line to the orthographic projection of plane where array substrate;
The test circuit region is arranged between two adjacent data lines.
4. display panel according to claim 1 or 2, which is characterized in that when the test circuit region prolongs along first direction When stretching, and being arranged between two scan lines of arbitrary neighborhood, the display panel further includes transparent cover plate and is arranged described Organic light emitting material between array substrate and the transparent cover plate;
The organic light emitting material include with the multiple pixel region multiple luminescence units correspondingly, it is the multiple to shine Cell array arrangement;
Between spacing between luminescence unit described in two row of arbitrary neighborhood is equal, and arbitrary neighborhood two arranges between the luminescence unit Away from equal;
Between described in two rows adjacent with the test circuit region, positioned at the test circuit region heteropleural respectively between pixel region Away from except, the spacing between each two row pixel region of arbitrary neighborhood it is equal and be less than two row luminescence unit of arbitrary neighborhood between Away from.
5. display panel according to claim 1 or 3, which is characterized in that when the test circuit region prolongs in a second direction When stretching, and being arranged between two data line of arbitrary neighborhood, the display panel further includes transparent cover plate and is arranged described Organic light emitting material between array substrate and the transparent cover plate;
The organic light emitting material include with the multiple pixel region multiple luminescence units correspondingly, it is the multiple to shine Cell array arrangement;
Between spacing between luminescence unit described in two row of arbitrary neighborhood is equal, and arbitrary neighborhood two arranges between the luminescence unit Away from equal;
Between between two column pixel regions adjacent with the test circuit region, positioned at the test circuit region heteropleural respectively Away from except, the spacing between each two column pixel region of arbitrary neighborhood it is equal and be less than two column luminescence unit of arbitrary neighborhood between Away from.
6. display panel according to claim 4, which is characterized in that
Wherein, P1 be except respectively with it is described test circuit region it is adjacent, positioned at it is described test circuit region heteropleural two rows described in pixel Except spacing between area, spacing between each two row pixel region of arbitrary neighborhood, P2 is between two row luminescence unit of arbitrary neighborhood Spacing.
7. display panel according to claim 5, which is characterized in that
Wherein, L1 is except two column pixels adjacent with the test circuit region, positioned at the test circuit region heteropleural respectively Except spacing between area, spacing between each two column pixel region of arbitrary neighborhood, L2 is between two column luminescence unit of arbitrary neighborhood Spacing.
8. display panel according to claim 1, which is characterized in that
The multiple switch element is divided into N number of switch element group, and each switch element group includes multiple switch element;
The multiple data lines are divided into N number of data line group, include multiple data lines in each data line group;Each data line Group is corresponded with a switch element group;
Each in pieces of data line switch element group corresponding with the data line group in any one of data line group opens Pass connects one to one.
9. a kind of display device, which is characterized in that the display device includes display surface described in claim 1-8 any one Plate.
CN201611204324.2A 2016-12-23 2016-12-23 Display panel and display device comprising it Active CN106601162B (en)

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Application Number Priority Date Filing Date Title
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CN106601162B true CN106601162B (en) 2019-09-24

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