CN106328026A - Liquid crystal display and dot inversion balance driving method thereof - Google Patents
Liquid crystal display and dot inversion balance driving method thereof Download PDFInfo
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Abstract
The invention discloses a dot inversion balance driving method of a liquid crystal display and the liquid crystal display. Two or more adjacent pixels with the same polarity in each row of pixels driven by a same data line are set in one group, the time of writing the pixel voltage to be set is redistributed to each pixel, thus the first pixel in each group of pixels can obtain more times of writing the pixel voltage to be set, the full charge of each pixel can be ensured, the difference with the voltage stored by other pixels and even picture display abnormalities of stripes and the like are prevented.
Description
Technical field
The present invention relates to the driving method of a kind of liquid crystal display, more particularly to a kind of liquid crystal display and
The method of its some reversion balance drive.
Background technology
Liquid crystal display (liquid crystal display, LCD) has that Low emissivity, volume be little and low power consuming etc. is excellent
Point, the most gradually replaces traditional cathode ray tube display (cathode ray tube display, CRT), because of
And be widely used in notebook computer, personal digital assistant (personal digital assistant, PDA),
On flat-surface television, or the information products such as mobile phone.
Refer to the schematic diagram that Fig. 1, Fig. 1 are a kind of liquid crystal displays 100 of the prior art.Liquid crystal
Display 100 includes 110, data driver (source of a gate drivers (gate driver)
Driver) 120 and a display panels 130.Display panels 130 includes a plurality of putting down each other
The data wire DL of row1～DLM, a plurality of gate lines G L parallel to each other1～GLNM row is included with one
The picture element matrix of N row.Data wire DL1～DLMWith gate lines G L1～GLNSetting interlaced with each other, pixel
Matrix includes (M × N) individual pixel P11～PMN, it is respectively arranged on the confluce of corresponding data wire and gate line.
Each pixel includes that a thin film transistor (TFT) (thin film transistor, TFT) switchs TFT, a liquid
Brilliant electric capacity CLCWith a storage electric capacity CST.Gate drivers 110 is coupled to gate lines G L1～GLN, use
Sequentially produce gate drive signal SG1～SGNTo open the TFT switch of corresponding pixel.Source drive
Device 120 is coupled to data wire DL1～DLM, it is used for producing data drive signal SD1～SDM, make pixel
P11～PMNCorresponding image can be shown.For example, when pixel P11Receive gate drive signal SG1
Time, can be according to data drive signal SD1Show picture, pixel P12In receiving gate drive signal SG2
Time, can be according to data drive signal SD1Show picture, pixel P21In receiving gate drive signal SG1
Time, can be according to data drive signal SD2To show picture, pixel P22In receiving gate drive signal SG2
Time can be according to data drive signal SD2To show picture ... the rest may be inferred.
It is said that in general, be applied to liquid crystal capacitance CLCWith storage electric capacity CSTThe polarity of voltage at two ends must be every
Invert every one section of Preset Time, cause to avoid liquid crystal material to produce polarization (polarization)
Permanent destruction.Such as, according to the pattern of line reversion (line inversion), the most each data
All pixels of line can have identical polarity of voltage, but can be with the polarity of voltage of the pixel of adjacent data line
On the contrary.According to some reversion (dot inversion) a pattern, the polarity of voltage meeting of the most each pixel and its
Around the polarity of voltage of neighbor is contrary.
Fig. 2 A and liquid crystal display that Fig. 2 B is prior art 100 with an inversion mode to show picture time
Schematic diagram.The picture (X+1) of the picture X and Fig. 2 B of Fig. 2 A represents adjacent two picture, the most just
Being to say, liquid crystal display 100 shows picture (X+1) after having shown picture X immediately.Such as Fig. 2 A, figure
Shown in 2B, in order to picture X to be made and picture (X+1) can have a characteristic for reversion, often passing through
After the time of one frame picture, the polarity of the data drive signal that every data line is loaded with is accomplished by inverting one
Secondary.Owing to when polarity inversion, share voltage driver is maximum, if therefore with the load of data driver
Driving with an inversion mode, the liquid crystal display 100 of prior art can consume very big energy.
In order to reduce the energy expenditure of liquid crystal display 100, current non-crystalline silicon liquid crystal display (aSi-TFT
LCD) how to drive in the way of two-dot inversion (2-dot inversion) or multi-point reverse (n-dot inversion).
When gate line transmits gate drive signal, data drive signal can be by TFT writing pixel；When
When gate line does not transmits gate drive signal, then data drive signal is ultimately written the magnitude of voltage of pixel and can deposit
Storage is in pixel.Refer to Fig. 3 A and Fig. 3 B, during wherein Fig. 3 A is two-dot inversion type of drive two
The pixel of individual one group is at the pixel voltage of perfect condition at the variation diagram of each row, and Fig. 3 B is that two-dot inversion drives
In mode the pixel of two group at the pixel voltage of virtual condition at the variation diagram of each row.Ideally,
Pixel voltage should be the rectangular wave described such as thick lines in Fig. 3 A, but the pixel voltage of reality is
Be closer to thick lines as shown in Figure 3 B, its cause description as after.
General in order to increase the charging ability of data driver, usual gate drivers can transmit grid in advance
Pole drives signal, makes the time of data drive signal writing pixel elongate, and namely allows data driver
First pixel can be precharged, to allow pixel energy be charged to required voltage fully.But
Whether during the reversion of 2 points (2 is a group) or multiple spot (multiple spot is a group) drives first of each group
Pixel, such as the odd column pixel in Fig. 3 A and 3B, the previous column pixel adjacent due to it is contrary
Polarity, therefore has no idea to precharge for these odd column pixel, and causes as shown in Figure 3 B
The perfect condition shown in pixel voltage waveform slip chart 3A of the 1st pixel of each group, namely pixel
Voltage needs a period of time to reach the voltage that data wire sets.Further instruction as shown in Figure 3 C, grid
Pole drives signal SG1、SG2、SG3、SG4... driving the 1st～8 row pixels respectively, and the 1st row pixel (by
SG1Drive), the 2nd row pixel is (by SG2Drive), the 3rd row pixel is (by SG3Drive), the 4th row pixel (by
SG4Drive) be actually written into E2 that the pixel voltage time to be set is respectively equal to each other, E3, E5,
E6。
For example, with the screen resolution of 480x800, as a example by the liquid crystal display of 60 frame pictures per second,
In each frame picture, it is (each that the gate line opening time of the 1st～8 row pixels is respectively 4 unit interval
The individual unit interval is 20.76 microseconds), wherein write the pixel voltage time to be set then be respectively 1
Individual unit interval 20.76 microsecond.Gate drive signal S shown in Fig. 3 CG1、SG2、SG3、SG4... side
The transverse axis of block represents the time that gate drive signal is high potential, the namely gate line of the 1st～8 row pixels
Opening time is respectively 4 unit interval.For example, the gate line opening time of the 1st row pixel is
E1+E2 (4 unit interval) shown in Fig. 3 C, and the pixel that wherein the 1st row pixel write is to be set
Voltage time is then E2 (1 unit interval)；The pixel voltage time that 2nd～4 row pixel writes are to be set
Then it is respectively E3, E5 and E6 (respectively 1 unit interval).Due to the 1st, 3,5, the odd number such as 7 row
The previous column pixel (even column pixels) that row pixel is adjacent is contrary polarity, is therefore being equally
In the unit interval of 20.76 microseconds, for the 1st, 3,5, the charging effect of the odd column pixel such as 7 row bright
Inadequate, eventually cause odd column pixel and even column pixels (or with the first row pixel in group and its
His row pixel) actual pixel voltage waveform differs, and the most even can cause odd column pixel and idol
Voltage stored by ordered series of numbers pixel creates difference, and the picture display causing band etc is abnormal.
Summary of the invention
The invention discloses a kind of liquid crystal display and the method for some reversion balance drive thereof, to solve two
In some reversion or multi-point reverse type of drive, first pixel charging in the pixel that each group of same polarity is adjacent
Deficiency causes picture to produce the problem that the displays such as band are abnormal.
Method at the some reversion balance drive of the liquid crystal display disclosed in one embodiment of the present invention
In, described liquid crystal display includes gate drivers, data driver and display panels.Institute
State display panels and include first grid polar curve, second gate line, the first data wire and adjacent
One pixel and the second pixel, described first grid polar curve is coupled to described first pixel, described second gate line
Being coupled to described second pixel, described first data wire is coupled to described first pixel and described second picture
Element, described gate drivers is coupled to described first grid polar curve and described second gate line, is used for transmitting
Gate drive signal, described data driver is coupled to described first data wire, is used for transmitting data and drives
Dynamic signal, described first pixel the second pixel is used for according to the gate drive signal received and data
Drive signal display picture.Described method comprises the following steps: the very first time at first time interval
In section, open described first grid polar curve, to described first pixel transmission gate drive signal, then open
Described second gate line, to described second pixel transmission gate drive signal；In described first time zone
Between the second time period in, described first data wire to described first pixel transmission data drive signal, with
Write the pixel voltage that described first pixel is to be set；And at the 3rd of described first time interval
In time period, close described first grid polar curve and maintain the described second gate line of unlatching, the most described first
Data wire is to described second pixel transmission data drive signal, to be set to write described second pixel
Pixel voltage；The time of wherein said second time period is more than the time of described 3rd time period.
In another embodiment of the invention, disclose and a kind of there is the liquid crystal that a some shift equilibrium drives
Display, includes display panels, gate drivers and data driver.Described liquid crystal
Show panel include first grid polar curve, second gate line, the first data wire and the first adjacent pixel with
Second pixel, described first grid polar curve is coupled to described first pixel, and described second gate line is coupled to institute
Stating the second pixel, described first data wire is coupled to described first pixel and described second pixel.Described
Gate drivers is coupled to described first grid polar curve and described second gate line, is used for transmitting raster data model
Signal.Described data driver is coupled to described first data wire, is used for transmitting data drive signal.
The time that the time that wherein said first grid polar curve is opened opens more than described second gate line.
By the technical method disclosed in embodiments of the present invention and liquid crystal display, can be significantly
Application 2 or multi-point reverse drive liquid crystal display on, be effectively same polarity adjacent first
Individual pixel is sufficiently charged, it is to avoid creates difference with the voltage stored by other pixels, solves
The problem of the band picture exception easily produced during 2 or multi-point reverse drive.
Accompanying drawing explanation
Fig. 1 is the schematic diagram of a kind of liquid crystal display of the prior art.
Fig. 2 A and liquid crystal display that Fig. 2 B is prior art with an inversion mode to show picture time show
It is intended to.
Fig. 3 A is that in two-dot inversion type of drive, the pixel of two group is believed in the data-driven of perfect condition
Number voltage is at the variation diagram of each row.
Fig. 3 B and Fig. 3 C be in two-dot inversion type of drive the pixel of two group at the number of virtual condition
According to driving the signal voltage variation diagram at each row.
Fig. 4 is the schematic diagram of the liquid crystal display according to one embodiment of the present invention.
Fig. 5 is the schematic flow sheet of the some reversion balanced driving method of liquid crystal display of the present invention.
Fig. 6 is to invert balanced driving method by the point of the present invention, makes in liquid crystal display two one group
Pixel is after redistributing the pixel voltage time that write is to be set, and data drive signal voltage is at each row
Variation diagram.
Wherein, description of reference numerals is as follows:
100,200 liquid crystal displays
110,210 gate drivers
120,220 data drivers
130,230 display panels
231 first pixels
232 second pixels
233 the 3rd pixels
234 the 4th pixels
240 time schedule controllers
S310～S330 step
Detailed description of the invention
Some vocabulary is employed to censure specific element in specification and claims.Art
Middle tool usually intellectual is it is to be appreciated that same element may be called with different nouns by manufacturer.
In the way of this specification and claims book not difference by title is used as distinguishing element, but with unit
Part difference functionally is used as the criterion distinguished.Mentioned by the middle of description in the whole text and claim
" including " be an open term, therefore should be construed to " including but not limited to ".Additionally, " coupling
Connect " or " connection " word include at this any directly and indirectly electrically or structure connects means.Therefore,
If a first device couples/connect second device described in literary composition, then representing described first device can be straight
Connect electrically/structure and connect described second device, or by other device or connection means electrically/structure indirectly
It is connected to described second device.
Refer to the signal that Fig. 4, Fig. 4 are the liquid crystal displays 200 according to one embodiment of the present invention
Figure.Liquid crystal display 200 includes gate drivers 210, data driver 220, liquid crystal
Display floater 230 and time schedule controller 240.Display panels 230 includes a plurality of parallel to each other
Data wire DL1～DLMWith a plurality of gate lines G L parallel to each other1～GLN, gate drivers 210 coupling
Connect a plurality of gate lines G L1～GLN, and it is used for sequentially producing gate drive signal SG1～SGNAnd pass through respectively
Gate lines G L1～GLNTransmission.Data driver 220 couples a plurality of data lines DL1～DLM, and use
Produce data drive signal SD1～SDMAnd respectively by data wire DL1～DLMTransmission.Each gate line
GL1～GLNFor the straight line being parallel to each other.Each data wire DL1～DLMAlso it is the straight line being parallel to each other.Sequential
Controller 240 then couples gate drivers 210 and data driver 220, to provide sequencing contro,
In each sequential, gate drive signal is transmitted by gate drivers 210 and data driver 220
SG1～SGNAnd data drive signal SD1～SDM。
Display panels 230 includes the array of pixels of M row N row.Described array of pixels includes
(M × N) individual pixel P11～PMN.Pixel in array of pixels is by gate lines G L1～GLNWith data wire
DL1～DLMInterlock and form, and driven to receive by gate drive signal produced by corresponding gate line
Data drive signal produced by respective data lines.For example, pixel P11It is coupled to gate lines G L1
With data wire DL1, in receiving gate drive signal SG1Time, receive data drive signal SD1With display
Picture, pixel P21It is coupled to gate lines G L1With data wire DL2, in receiving gate drive signal SG1
Time, receive data drive signal SD2To show picture, pixel P12It is coupled to gate lines G L2With data wire
DL1, in receiving gate drive signal SG2Time, receive data drive signal SD1With display picture, as
Element P22It is coupled to gate lines G L2With data wire DL2, in receiving gate drive signal SG2Time, receive
Data drive signal SD2To show picture ... the rest may be inferred.It addition, each pixel is (such as the pixel in Fig. 4
P44) include a thin film transistor (TFT) (Thin Film Transistor, TFT), a liquid crystal capacitance CLCAnd one store
Electric capacity CST。
In the driving control mode of two-dot inversion, in order to allow odd column pixel (or with adjacent previous column
Pixel has the pixel of opposite polarity) can obtain abundance pre-charge pressure, in embodiments of the present invention,
In the same display cycle, odd column pixel (or had the picture of opposite polarity with adjacent previous column pixel
Element) write set the pixel voltage time lengthen.It is to say, in the same display cycle, again
Distribution has first pixel in same group of adjacent pixel of identical polar and the unlatching of other pixels
Time.Specific embodiment illustrates with accompanying drawing and word.
Refer to the flow process putting reversion balanced driving method that Fig. 5, Fig. 5 are liquid crystal displays of the present invention show
It is intended to.Its step is as follows:
Step S310: in the first time period of first time interval, opens a first grid polar curve, right
One first pixel transmission gate drive signal, then opens a second gate line, to one second pixel transmission
Gate drive signal；
Step S320: within the second time period of first time interval, described first data wire is to described
First pixel transmission data drive signal, the pixel voltage to be set to write the first pixel；
Step S330: within the 3rd time period of first time interval, closes described first grid polar curve also
Maintaining and open described second gate line, described second pixel transmission data are driven by the most described first data wire
Dynamic signal, the pixel voltage to be set to write the second pixel.
It is to invert balanced driving method by the point of the present invention please also refer to Fig. 6, Fig. 6, makes liquid crystal
Showing that in device, the pixel of two group is after redistributing the pixel voltage time that write is to be set, data are driven
Dynamic signal voltage is at the variation diagram of each row.With the same a line of Fig. 4, all it is coupled to the first data wire DL1?
As a example by one pixel the 231, second pixel the 232, the 3rd pixel 233 and the 4th pixel 234, wherein first
Pixel 231 and the second pixel 232 have identical polar, the 3rd pixel 233 and the 4th pixel 234
With the first pixel 231 and the second pixel 232, there is contrary polarity.Drive the first pixel 231 with
And second first the time interval T of pixel 2321In, sequentially it is divided into three time periods.First first
Time period I1In, open first grid polar curve GL1, so that the first pixel 231 is transmitted gate drive signal SG1,
Then second gate line GL is opened2, the second pixel 232 is transmitted gate drive signal SG2.Then
Two time period I2In, the first data wire DL1First pixel 231 is transmitted data drive signal SD1, with
Write the pixel voltage that the first pixel 231 is to be set.Last at the 3rd time period I3In, close first
Gate lines G L1And maintain unlatching second gate line GL2, the first data wire DL simultaneously1To the second pixel 232
Transmission data drive signal SD1, the pixel voltage to be set to write the second pixel 232.Special instruction
, owing to the first pixel 231 need to consider the time of reversal, therefore at the second time period I2In,
Providing the more time carries out reversal to the first pixel 231, and the first pixel 231 is transmitted number
According to driving signal.Simultaneously because the second pixel 232 and the first pixel 231 same polarity, therefore when second
Between section I2In, the first data wire DL1Second pixel 232 can be precharged simultaneously, and can subtract
Few 3rd time period I3Second pixel 232 is transmitted the time of data signal.
For example, with the screen resolution of 480x800, as a example by 60 frame pictures per second, a list is set
Bit time is 13.85 microseconds, and the gate drive signal S shown in Fig. 6G1、SG2、SG3、SG4... square
Transverse axis represent the time that gate drive signal is high potential, namely the gate line of the 1st～4 row pixels is opened
Open the time.And the gate line time (I of the first pixel 2311+I2) it is five unit interval
(13.85x5=69.25 microsecond), wherein for the of write the first pixel 231 pixel voltage to be set
Two time period I2It is two unit interval (13.85x2=27.7 microseconds).The gate line of the second pixel 232 is opened
Time is four unit interval, wherein for the of write the second pixel 232 pixel voltage to be set
Three time period I3It is a unit interval (13.85 microsecond).From the foregoing, it will be observed that gate drive signal SG1Open
First pixel 231, and by the first data wire DL1First pixel 231 is transmitted data drive signal SD1
Time increase to 27.7 microseconds (20.76 microseconds compared to described in prior art and Fig. 3 C), therefore have
The sufficient time is had to carry out the conversion of polarity, to reach the voltage that data wire sets.As for same polarity
Two pixels 232 have first passed through the most by the second time period I2Precharge, therefore gate drive signal SG2Open
Open the second pixel 232, and by the first data wire DL1Second pixel 232 is transmitted data drive signal SD1
Time only need be 13.85 microseconds i.e. enough.
With the screen resolution of 480x800, as a example by 60 frame pictures per second, when prior art is by 1 unit
Between be set as 20.76 microseconds, and in each frame picture, the gate line opening time of parity column pixel is respectively
It is 4 unit interval (20.76x4=83.04 microsecond), the picture that wherein write of parity column pixel is to be set
Element voltage time is 1 unit interval (20.76 microsecond) the most respectively.In an embodiment of the present invention, by 1
The individual unit interval is set as 13.85 microseconds, in each frame picture, odd column pixel (or with adjacent before
String pixel has the pixel of opposite polarity) the gate line opening time be 5 unit interval
(13.85x5=69.25 microsecond), wherein writing the pixel voltage time to be set is 2 unit interval
(13.85x2=27.70 microsecond), and even column pixels (or with adjacent previous column pixel, there is identical polar
Pixel) the gate line opening time be then 4 unit interval (13.85x4=55.40 microseconds), wherein write institute
The pixel voltage time to be set is 1 unit interval (13.85 microsecond).
Similarly, the 3rd pixel 233 and second time interval T of the 4th pixel 234 are being driven2In,
Sequentially it is divided into three time periods.First at the 4th time period I4In, open the 3rd gate lines G L3, with right
3rd pixel 233 transmits gate drive signal SG3, then open the 4th gate lines G L4, to the 4th pixel
234 transmission gate drive signal SG4.Then at the 5th time period I5In, the first data wire DL1To the 3rd
Pixel 233 transmits data drive signal SD1, the pixel voltage to be set to write the 3rd pixel 233.
Last at the 6th time period I6In, close the 3rd gate lines G L3And maintain unlatching the 4th gate lines G L4,
First data wire DL simultaneously14th pixel 234 is transmitted data drive signal SD1, to write the 4th pixel
234 pixel voltages to be set.Due to the 3rd pixel 233 and the first pixel 231 above and the
Two pixels 232 have contrary polarity, it is also contemplated that the time of reversal, it illustrates and first
Pixel 231 and the second pixel 232 are similar to, and repeat no more here.
Similarly, though Fig. 6 do not illustrate the 5th pixel, the 6th pixel, the 7th pixel, the 8th pixel time
Between interval, only drive the 5th pixel, the 6th pixel, the 7th pixel, the time interval of the 8th pixel to describe
Retouch with the time interval of first pixel the 231, second pixel the 232, the 3rd pixel 233 and the 4th pixel 234
State similar, repeat no more here.
The present invention can be clearer by following description with the difference of prior art.Screen with 480x800
Resolution, as a example by 60 frame pictures per second, in prior art, the write of the pixel on each gate line to set
The fixed pixel voltage time is the frame updating time divided by horizontal row number, during the unit of therefore prior art
Between be set as 20.76 microseconds, in gate drivers odd even level offset buffer receive clock signal period
Being 8 unit interval (20.76x8=166.08 microsecond), in the most each cycle, clock signal is at high potential
Time be 4 unit interval (20.76x4=83.04 microseconds), therefore parity column pixel gate line open
Time is 4 unit interval (20.76x4=83.04 microsecond) respectively, and wherein the write of parity column pixel is wanted
The pixel voltage time set is 1 unit interval (20.76 microsecond) the most respectively.Enforcement in the present invention
In example, will be set as 13.85 microseconds the unit interval, in gate drivers, odd even level offset buffer receives
Clock signal period is 12 unit interval (13.85x12=166.20 microsecond) respectively, and wherein odd level moves
In the clock signal period that position buffer receives, clock signal is 5 unit interval in the time of high potential
(13.85x5=69.25 microsecond), and clock signal in the clock signal period that even level offset buffer receives
It is 4 unit interval (13.85x4=55.40 microseconds) in the time of high potential, namely odd column pixel
The gate line opening time is 5 unit interval (13.85x5=69.25 microseconds), wherein writes to be set
The pixel voltage time is 2 unit interval (13.85x2=27.70 microseconds), and the gate line of even column pixels
Opening time is then 4 unit interval (13.85x4=55.40 microseconds), wherein writes pixel to be set
Voltage time is 1 unit interval (13.85 microsecond).Compare with prior art, although even column of the present invention
Pixel write pixel voltage time (13.85 microsecond) to be set is write less than even column pixels in prior art
Enter the pixel voltage time (20.76 microsecond) to be set, only because even column pixels is at adjacent previous column
During odd column pixel write pixel voltage to be set can the voltage of preliminary filling identical polar, be therefore difficult to send out
The situation of raw undercharge, it is possible to the gate line opening time and the write that reduce even column pixels are wanted
The pixel voltage time set, and the saved time is distributed to odd column pixel and uses.
In the present embodiment, the present invention distributes to the pixel voltage time that odd column pixel write is to be set
For in prior art the 2/3 of adjacent odd even two row pixel write pixel voltage temporal summation to be set, and
Distribute to even column pixels write pixel voltage time to be set then for the 1/3 of summation, but its ratio is not
As limit.This technical field tool usually intellectual can from its ratio of Row sum-equal matrix make odd column pixel and
The pixel voltage of even column pixels can reach the pixel voltage of setting.
Described above is the type of drive particular for two-dot inversion, but the multiple spot for more than 2 is anti-
Turn the embodiment of (N-dot inversion), equally use similar type of drive, by every a line
Pixel is one group with the adjacent multiple pixel of same polarity, and the write redistributing each pixel is wanted
The pixel voltage time set, first pixel in each group of pixel is allowed to be obtained in that more write institute
The pixel voltage time to be set, the most i.e. can ensure that in each group of pixel, first pixel can be filled
Point be electrically charged, be unlikely to create difference with the voltage stored by other pixels, even cause band it
The picture display of class is abnormal.
The foregoing is only the preferred embodiments of the present invention, be not limited to the present invention, for this
For the technical staff in field, the present invention can have various modifications and variations.All spirit in the present invention and
Within principle, any modification, equivalent substitution and improvement etc. made, should be included in the protection of the present invention
Within the scope of.
Claims (10)
1. a method for the some reversion balance drive of liquid crystal display, described liquid crystal display includes grid
Driver, data driver and display panels, described display panels includes first grid
Line, second gate line, the first data wire and the first adjacent pixel and the second pixel, described first
Gate line is coupled to described first pixel, and described second gate line is coupled to described second pixel, and described
One data wire is coupled to described first pixel and described second pixel, and described gate drivers is coupled to institute
Stating first grid polar curve and described second gate line, be used for transmitting gate drive signal, described data pole is driven
Dynamic device is coupled to described first data wire, is used for transmitting data drive signal, described first pixel and second
Pixel is used for showing picture, described method according to the gate drive signal received and data drive signal
Comprise the following steps:
In the first time period of first time interval, open described first grid polar curve, to described first
Pixel transmission gate drive signal, then opens described second gate line, to described second pixel transmission grid
Pole drives signal；
Within the second time period of described first time interval, described first data wire is to described first picture
Element transmission data drive signal, the pixel voltage to be set to write described first pixel；And
Within the 3rd time period of described first time interval, close described first grid polar curve and maintenance is opened
Open described second gate line, the most described first data wire to described second pixel transmission data drive signal,
The pixel voltage to be set to write described second pixel；
The time of wherein said second time period is more than the time of described 3rd time period.
2. the method for claim 1, it is characterised in that: described display panels separately includes
Three gate lines and the 4th gate line, described gate drivers is separately coupled to described 3rd gate line and institute
Stating the 4th gate line, be used for transmitting gate drive signal, described display panels includes adjacent the 3rd
Pixel and the 4th pixel, be used for showing picture according to the gate drive signal received and data drive signal
Face, described 3rd gate line is coupled to described 3rd pixel, and described 4th gate line is coupled to the described 4th
Pixel, described first data wire is coupled to described 3rd pixel and described 4th pixel, described method bag
Include the following step:
Within the 4th time period of second time interval, open described 3rd gate line, to the described 3rd
Pixel transmission gate drive signal, then opens described 4th gate line, to described 4th pixel transmission grid
Pole drives signal；
Within the 5th time period of described second time interval, described first data wire is to described 3rd picture
Element transmission data drive signal, the pixel voltage to be set to write described 3rd pixel；And
Within the 6th time period of described second time interval, close described 3rd gate line and maintenance is opened
Open described 4th gate line, the most described first data wire to described 4th pixel transmission data drive signal,
The pixel voltage to be set to write described 4th pixel；
The time of wherein said 5th time period is more than the time of described 6th time period.
3. method as claimed in claim 2, it is characterised in that: described first pixel and described second
The data drive signal of pixel has the first polarity；Described 3rd pixel and the data of described 4th pixel
Drive signal to have the second polarity, and described first polarity and described second polarity have opposite polarity.
4. method as claimed in claim 2, it is characterised in that: described liquid crystal display separately includes sequential
Controller, is coupled to described gate drivers and described data driver, and described method separately includes step
Rapid: described time schedule controller control described gate drivers sequentially open described first grid polar curve, described the
Two gate lines, described 3rd gate line and described 4th gate line, make described first grid polar curve open
The time of described 5th time period that described second time period and described 3rd gate line are opened is more than described
Described 6th time that described 3rd time period of second gate line unlatching and described 4th gate line are opened
The time of section.
5. a liquid crystal display, includes:
Display panels, including first grid polar curve, second gate line, the first data wire and adjacent
The first pixel and the second pixel, described first grid polar curve is coupled to described first pixel, described second gate
Polar curve is coupled to described second pixel, and described first data wire is coupled to described first pixel and described
Two pixels,
Gate drivers, described gate drivers is coupled to described first grid polar curve and described second grid
Line, is used for transmitting gate drive signal；And
Data driver, described data driver is coupled to described first data wire, is used for transmitting number
According to driving signal；
The time that the time that wherein said first grid polar curve is opened opens more than described second gate line.
6. liquid crystal display as claimed in claim 5, it is characterised in that: described gate drivers is used for
In the first time period of first time interval, open described first grid polar curve, to described first pixel
Transmission gate drive signal, the most described gate drivers is used for opening described second gate line, to described
Second pixel transmission gate drive signal；Within the second time period of described first time interval, described
First data wire to described first pixel transmission data drive signal, to set writing described first pixel
Fixed pixel voltage；And within the 3rd time period of described first time interval, described raster data model
Device is used for cutting out described first grid polar curve and maintaining the described second gate line of unlatching, and the most described data pole is driven
Dynamic device is used for described second pixel transmission data drive signal, to be set to write described second pixel
Pixel voltage.
7. liquid crystal display as claimed in claim 6, it is characterised in that: described display panels is another
Including the 3rd gate line and the 4th gate line, described gate drivers is separately coupled to described 3rd gate line
And described 4th gate line, it being used for transmitting gate drive signal, described display panels includes adjacent
The 3rd pixel and the 4th pixel, described 3rd gate line is coupled to described 3rd pixel, the described 4th
Gate line is coupled to described 4th pixel, and described first data wire is coupled to described 3rd pixel and described
4th pixel, the time that the time that wherein said 3rd gate line is opened opens more than described 4th gate line.
8. liquid crystal display as claimed in claim 7, it is characterised in that: described gate drivers is used for
Within the 4th time period of second time interval, open described 3rd gate line, to described 3rd pixel
Transmission gate drive signal, the most described gate drivers is used for opening described 4th gate line, to described
4th pixel transmission gate drive signal；Within the 5th time period of described second time interval, described
First data wire to described 3rd pixel transmission data drive signal, to set writing described 3rd pixel
Fixed pixel voltage；And within the 6th time period of described second time interval, described raster data model
Device is used for cutting out described 3rd gate line and maintaining described 4th gate line of unlatching, and the most described data pole is driven
Dynamic device is used for described 4th pixel transmission data drive signal, to be set to write described 4th pixel
Pixel voltage.
9. liquid crystal display as claimed in claim 8, it is characterised in that: described first pixel and institute
The data drive signal stating the second pixel has the first polarity；Described 3rd pixel and described 4th pixel
Data drive signal there is the second polarity, and described first polarity and described second polarity have on the contrary
Polarity.
10. liquid crystal display as claimed in claim 8, it is characterised in that: separately include time schedule controller,
Being coupled to described gate drivers and described data driver, described time schedule controller is used for controlling institute
State gate drivers and sequentially open described first grid polar curve and described second gate line, described 3rd grid
Line and described 4th gate line, and make time that described first grid polar curve opens more than described second grid
The time that line is opened, and make the time of described 3rd gate line unlatching open more than described 4th gate line
Time.
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| CN201510338765.0A CN106328026A (en) | 2015-06-17 | 2015-06-17 | Liquid crystal display and dot inversion balance driving method thereof |
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| CN201510338765.0A CN106328026A (en) | 2015-06-17 | 2015-06-17 | Liquid crystal display and dot inversion balance driving method thereof |
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