CN106230405A - A kind of integrated bipolarity neural stimulation pulses generator - Google Patents
A kind of integrated bipolarity neural stimulation pulses generator Download PDFInfo
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- CN106230405A CN106230405A CN201610607640.8A CN201610607640A CN106230405A CN 106230405 A CN106230405 A CN 106230405A CN 201610607640 A CN201610607640 A CN 201610607640A CN 106230405 A CN106230405 A CN 106230405A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
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- A—HUMAN NECESSITIES
- A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
- A61N—ELECTROTHERAPY; MAGNETOTHERAPY; RADIATION THERAPY; ULTRASOUND THERAPY
- A61N1/00—Electrotherapy; Circuits therefor
- A61N1/18—Applying electric currents by contact electrodes
- A61N1/32—Applying electric currents by contact electrodes alternating or intermittent currents
- A61N1/36—Applying electric currents by contact electrodes alternating or intermittent currents for stimulation
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- A—HUMAN NECESSITIES
- A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
- A61N—ELECTROTHERAPY; MAGNETOTHERAPY; RADIATION THERAPY; ULTRASOUND THERAPY
- A61N1/00—Electrotherapy; Circuits therefor
- A61N1/18—Applying electric currents by contact electrodes
- A61N1/32—Applying electric currents by contact electrodes alternating or intermittent currents
- A61N1/36—Applying electric currents by contact electrodes alternating or intermittent currents for stimulation
- A61N1/3605—Implantable neurostimulators for stimulating central or peripheral nerve system
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Abstract
本发明公开了一种集成双极性神经刺激脉冲发生器，包括微处理器及其开关信号控制的基准微电流源、多档镜像微电流阱和多路多档镜像电流源，以及镜像微电流源、脉冲宽度调制(PWM)电平提升电路和H‑桥。所述微处理器的PWM信号首先经所述PWM电平提升电路进行电平提升，然后送给所述H‑桥。所述多档镜像微电流阱是基准微电流源的镜像电流源；所述多档镜像微电流阱与镜像微电流源构成组合电流源；所述多路多档镜像电流源是镜像微电流源的镜像电流源，并将其电流输送给所述H‑桥，以输出频率、占空比和幅度可调的双极性神经刺激脉冲。本发明基于集成电路制造工艺，其构造紧凑，体积较小，使用方便。
The invention discloses an integrated bipolar nerve stimulation pulse generator, comprising a microprocessor and a reference microcurrent source controlled by its switch signal, a multi-level mirror micro-current sink, a multi-channel multi-level mirror current source, and a mirror micro-current source, pulse width modulation (PWM) level boosting circuit, and H‑bridge. The PWM signal of the microprocessor is firstly boosted by the PWM level boosting circuit, and then sent to the H-bridge. The multi-level mirror image micro-current sink is the mirror current source of the reference micro-current source; the multi-level mirror image micro-current sink and the mirror image micro-current source constitute a combined current source; the multi-channel multi-level mirror current source is a mirror image micro-current source mirror current source, and deliver its current to the H-bridge to output bipolar neurostimulation pulses with adjustable frequency, duty cycle and amplitude. The invention is based on the integrated circuit manufacturing process, and has compact structure, small volume and convenient use.
Description
Technical Field
The invention belongs to the technical field of biomedical electronic instruments, and particularly relates to an integrated bipolar nerve stimulation pulse generator.
Background
The existing unipolar nerve stimulation pulse generator has the following technical disadvantages: 1) the nerve stimulation pulse generator constructed based on the separation element has larger volume and can not meet the requirement of miniaturization of medical instruments; 2) the traditional nerve stimulation pulse generator has a small adjustable range and cannot activate all neurons. For example, some nerve diseases require a stimulation current higher than 20mA, and some diseases require a stimulation current lower than 100 muA, so that the general nerve stimulation pulse generator can hardly achieve the wide adjustable amplitude; 3) the power consumption of the auxiliary circuits (such as a reference current source and a mirror current source) used for generating pulses with adjustable frequency, duty ratio and amplitude in the conventional nerve stimulation pulse generator is large.
The integrated bipolar nerve stimulation pulse generator of the invention has no related literature introduction at present, and related patent documents are not searched.
Disclosure of Invention
The invention aims to overcome the technical defects and provide an integrated bipolar nerve stimulation pulse generator.
In order to achieve the purpose, the invention adopts the technical scheme that:
an integrated bipolar nerve stimulation pulse generator is composed of a Microprocessor (MCU)10, a reference micro-current source 20, a multi-gear mirror image micro-current well 30, a mirror image micro-current source 40, a multi-path multi-gear mirror image current source 50, a Pulse Width Modulation (PWM) level boosting circuit 60 and an H-bridge 70; wherein,
the microprocessor 10 is respectively connected with the reference micro-current source 20, the multi-gear mirror micro-current sink 30, the multi-path multi-gear mirror current source 50 and the PWM level boost circuit 60; the microprocessor 10 mainly generates a multi-channel switch control signal and a multi-channel Pulse Width Modulation (PWM) signal, and at least includes an input/output I/O port 101 and a multi-channel PWM port 102; wherein the switching signals generated by the I/O port 101 respectively control the operations of the reference micro-current source 20, the multi-gear mirror micro-current sink 30 and the multi-path multi-gear mirror current source 50; the multi-channel PWM signals generated by the multi-channel PWM port 102 are firstly output to the PWM level boost circuit 60 for level boost, and then are transmitted to the H-bridge 70 to control the operation thereof;
the reference micro-current source 20 is further connected with the multi-gear mirror micro-current sink 30, and the multi-gear mirror micro-current sink 30 is a mirror current source of the reference micro-current source 20; the multi-gear mirror image micro-current trap 30 is also connected with the mirror image micro-current source 40, and the multi-gear mirror image micro-current trap 30 and the mirror image micro-current source 40 form a combined current source; the mirror image micro current source 40 is further connected with the multi-path multi-gear mirror image current source 50, and the multi-path multi-gear mirror image current source 50 is a mirror image current source of the mirror image micro current source 40;
the multi-gear image micro-current trap 30 and the gears of the multi-path multi-gear image current source 50 are controlled by the I/O port 101, and each gear of the multi-gear image micro-current trap 30 is a multiple of the reference current which can be generated by the 20; each gear of the multi-path multi-gear mirror current source 50 is a multiple of the current generated by the mirror micro current source 40;
the multi-path multi-gear image current source 50 is also connected with the H-bridge 70, and outputs the current to the H-bridge 70.
The amplitude (I) of the stimulation current pulses of the stimulation pulse generatoramp) The range is 10 mu A-30 mA, the step length of the stimulating current is 10 mu A/100 mu A/1000 mu A/2000 mu A, and the fifth gear can be selected.
The compliance voltage range of the stimulation pulse generator is 0-12V.
The frequency (1/T) of the stimulation pulse generator is 1-1000HZStimulation frequency step size 1HZ。
The pulse width (W) of the stimulation pulse generator ranges from 1Us to 1000Us, and the step length of the stimulation pulse width is 1 Us.
The H-bridge 70 outputs bipolar neurostimulation pulses with adjustable frequency, duty cycle, and amplitude.
The invention discloses a using method of an integrated bipolar nerve stimulation pulse generator, which comprises the following steps:
firstly, a clock frequency for generating PWM and time values of a counter and a register corresponding to the clock frequency are set in the Microprocessor (MCU)10, and the frequency (1/T, 1-1000H) of multipath PWM is presetZ) Pulse width (W, 1-1000 Us) and dead time (T) between each two PWM pathsD0.1-0.5 Us), and outputting a plurality of paths of PWM signals through the plurality of paths of PWM ports 102; secondly, setting a switching signal (S7-S0) of an I/O port 101 of the Microprocessor (MCU), and presetting a stimulation current step length (S7-S4, corresponding to 10 muA/100 muA/1000 muA/2000 muA) of the multi-gear image micro-current trap 30 and a stimulation current pulse amplitude (S3-S0, range 10 muA-30 mA) of the multi-channel multi-gear image current source 50; finally, a switching signal (S8) of the I/O port 101 of the Microprocessor (MCU) is set to start the operation of the reference micro current source 20, thereby outputting bipolar neurostimulation pulses of preset frequency, duty ratio and amplitude at the H-bridge 70.
The integrated bipolar nerve stimulation pulse generator has the following advantages and beneficial effects:
1) all components of the integrated bipolar nerve stimulation pulse generator are integrated based on an integrated circuit manufacturing process, so that the integrated bipolar nerve stimulation pulse generator is small in size;
2) the integrated bipolar nerve stimulation pulse generator has a multi-gear adjustable current source, and the amplitude range of stimulation current pulses is 10 muA-30 mA, so the integrated bipolar nerve stimulation pulse generator has the characteristic of large pulse amplitude adjustable range;
3) as the circuits such as the reference micro-current source 20, the multi-gear image micro-current trap 30, the image micro-current source 40 and the like of the integrated bipolar nerve stimulation pulse generator consume very small current at the level of mu A, the power consumption of an auxiliary circuit for generating pulses with adjustable frequency, duty ratio and amplitude is relatively low.
Drawings
Fig. 1 is a block diagram of an integrated bipolar neurostimulation pulse generator according to the present invention.
Fig. 2 is a schematic connection diagram of the components of an integrated bipolar neurostimulation pulse generator according to the invention.
Fig. 3 is a diagram of the PWM signals (PWM00, PWM01) generated by the multi-channel PWM port 102 and the neurostimulation pulse waveforms (NS + ) output by the H-bridge 70 in the integrated bipolar neurostimulation pulse generator of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
As shown in fig. 1 and 2, an integrated bipolar neurostimulation pulse generator is composed of a Microprocessor (MCU)10, a reference micro-current source 20, a multi-gear mirror micro-current sink 30, a mirror micro-current source 40, a multi-path multi-gear mirror current source 50, a Pulse Width Modulation (PWM) level-up circuit 60 and an H-bridge 70.
All of the above components are fabricated simultaneously based on any one of CMOS (e.g., SMIC 0.18 μm CMOS) processes.
The microprocessor 10 mainly generates a plurality of switching control signals and a plurality of Pulse Width Modulation (PWM) signals, and includes at least an input/output (I/O) port 101 and a plurality of PWM ports 102.
The reference micro-current source 20 is formed by an NMOS tube M in a CMOS201、M202And a resistance R201Form aWherein M is201Receiving a switch signal (S) from the I/O port 1018) Controlling;
the multi-gear mirror image micro-current trap 30 is composed of an NMOS (N-channel metal oxide semiconductor) tube M301～M308Is formed of M wherein301～M304Are respectively M202Is mirrored, and M301～M304Respectively has a gate width of M2021, 10, 100 and 200 times the gate width; m305～M308Receiving four-way switching signal (S) of the I/O port 1014～S7) Controlling;
the mirror image micro-current source 40 and the multi-gear mirror image micro-current trap 30 form a combined current source which is composed of an NMOS tube M401Forming;
the multi-path multi-gear image current source 50 is composed of two identical multi-gear image current sources 501 and 520; wherein the multi-level mirror current source 501 is composed of a PMOS transistor M5011～M5014And NMOS transistor M5015～M5018Is composed of (A) M5011～M5014Respectively has a gate width of M40110, 20, 30 and 40 times the gate width; m5015～M5018Receiving four-way switching signal (S) of the I/O port 1013～S0) And (5) controlling. The multi-path multi-gear mirror image current source 502 is composed of a PMOS tube M5021～M5024And NMOS transistor M5025～M5028Is composed of (A) M5021～M5024Respectively has a gate width of M40110, 20, 30 and 40 times the gate width; m5025～M5028Receiving four-way switching signal (S) of the I/O port 1013～S0) Controlling;
the PWM level up circuit 60 is composed of two identical PWM level shifters 601 and 602, and performs level up of the PWM signal. Wherein the PWM level shifter 601 is composed of an NMOS transistor M6011、M6012And a resistance R6011、R6012The formed two-stage cascade inverters are formed; the PWM level shift circuit 602 is composed of an NMOS transistor M6021、M6022And a resistance R6021、R6022Composed two-stage cascade inverterForming;
the H-bridge 70 is an H-bridge circuit formed by four H-shaped switches and is composed of an NMOS (N-channel metal oxide semiconductor) tube M701～M704Composition is carried out; the H-bridge 70 outputs bipolar pulses with adjustable frequency, duty cycle and amplitude.
The reference micro current source 20 is connected to the microprocessor 10 and the multi-gear mirror micro current sink 30. Wherein, the resistance R201One end of the power supply is connected with a power supply VDD, and the other end of the power supply is connected with M201Is connected with the drain electrode of the transistor; m201And S of the I/O port 1018Connection of source with M202Drain, gate and M301～M304The gate of (1) is connected; m202The source of (3) and ground;
the multi-gear mirror micro current sink 30 is connected with the microprocessor 10, the reference micro current source 20, the mirror micro current source 40 and the multi-path multi-gear mirror current source 50. Wherein M is301～M304The source electrodes of the first and second transistors are grounded respectively; m301～M304Respectively with M in sequence305～M308Is connected to the source of (a); m305～M308Respectively and sequentially connected with the S of the I/O port 1014～S7Connecting; m305～M308Is connected with M401Drain and gate of (1) and (M)5011～M5014，M5021～M5024The gate of (1) is connected;
the mirror micro current source 40 is connected with the multi-gear mirror micro current sink 30 and the multi-gear mirror current sources 501 and 502. Wherein M is401Is connected with a power supply VDD;
the multi-gear mirror current sources 501 and 502 are also connected with the H-bridge 70 to provide current for the H-bridge; wherein M is5011～M5014，M5021～M5024The source electrodes of the first and second transistors are all connected with a power supply VDD; m5011～M5014M5021～M5024Respectively with M in sequence5015～M5018M5025～M5028Is connected with the drain electrode of the transistor;M5015～M5018and M5025～M5028Respectively and sequentially connected with the S of the I/O port 1010～S3Connecting; m5015～M5018Is interconnected with the source of M in the H-bridge 70701Is connected with the drain electrode of the transistor; m5025～M5028Is interconnected with the source of M in the H-bridge 70703Is connected with the drain electrode of the transistor;
the PWM level shift circuits 601 and 602 are also connected to the H-bridge 70; wherein M is6011、M6012、M6021、M6022Is connected with the power ground; m6011The grid of the grid is connected with one path of PWM signal (PWM00) of the multi-path PWM port 102; m6021The grid of the multi-path PWM port 102 is connected with the other path of PWM signal (PWM01) of the multi-path PWM port; m6011Drain electrode of (1) and6012the gate of (1) is connected; r6011Is one end of and R6012Is connected at one end thereof with M at the other end thereof6011The drain electrodes of the two electrodes are connected; r6012Another end of (1) and M6012The drain electrodes of the two electrodes are connected; m6012And M in H-bridge 70701The gate of (1) is connected; the connection method of each element in the PWM level shift circuit is the same as that of the corresponding element of the PWM level shift circuit 601;
the H-bridge 70 outputs bipolar neural stimulation pulses (NS +, NS-) with adjustable frequency, duty cycle and amplitude; wherein M is702、M704The source of (2) is grounded; m702、M704Respectively with M701、M703Is connected to the source of (a); m702、M704Respectively with M703、M701And M6012、M6022Is connected to the drain of (1). FIG. 3 is a graph of the PWM signals (PWM00, PWM01) generated by the multi-way PWM port 102 and the neural stimulation pulse waveforms (NS + ) output by the H-bridge 70 of FIG. 2.
The embodiment is constructed based on a CMOS process, and has the characteristics of small volume, large adjustable amplitude range of stimulation pulses, low power consumption of auxiliary circuits and the like. While the invention has been described with reference to a preferred embodiment, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (8)
1. An integrated bipolar neurostimulation pulse generator, characterized by: the device comprises a microprocessor (10), a reference micro-current source (20), a multi-gear mirror image micro-current sink (30), a mirror image micro-current source 40, a multi-path multi-gear mirror image current source (50), a Pulse Width Modulation (PWM) level boost circuit (60) and an H-bridge (70); wherein,
the microprocessor (10) is respectively connected with the reference micro-current source (20), the multi-gear mirror image micro-current sink (30), the multi-path multi-gear mirror image current source (50) and the PWM level lifting circuit (60);
the reference micro-current source (20) is also connected with the multi-gear mirror micro-current sink (30), and the multi-gear mirror micro-current sink (30) is a mirror current source of the reference micro-current source (20);
the multi-gear mirror image micro-current trap (30) is also connected with the mirror image micro-current source (40), and the multi-gear mirror image micro-current trap (30) and the mirror image micro-current source (40) form a combined current source;
the mirror image micro-current source (40) is also connected with the multi-path multi-gear mirror image current source (50), and the multi-path multi-gear mirror image current source (50) is a mirror image current source of the mirror image micro-current source (40);
the multi-path multi-gear mirror current source (50) is also connected with the H-bridge (70) and transmits the current output by the H-bridge (70);
the PWM level boost circuit (60) is also connected with the H-bridge (70) and transmits the boost level to the H-bridge (70);
the H-bridge (70) outputs bipolar neurostimulation pulses with adjustable frequency, duty cycle and amplitude.
2. An integrated bipolar neurostimulation pulse generator according to claim 1, wherein: the microprocessor (10) at least comprises an input/output I/O port (101) and a multi-path PWM port (102); the switching signals generated by the I/O port (101) respectively control the operation of the reference micro-current source (20), the multi-gear image micro-current trap (30) and the multi-path multi-gear image current source (50); and the multi-path PWM signals generated by the multi-path PWM port (102) are output to the PWM level lifting circuit (60) for level lifting, and then are transmitted to the H-bridge (70).
3. An integrated bipolar neurostimulation pulse generator according to claim 2, wherein: the I/O port (101) comprises a gear selection key or switch for controlling the multi-gear image micro-current trap (30) and the multi-path multi-gear image current source (50).
4. An integrated bipolar neurostimulation pulse generator according to claim 1, wherein: each gear of the multi-gear image micro-current trap (30) is a multiple of the reference micro-current source (20) capable of generating the reference current.
5. An integrated bipolar neurostimulation pulse generator according to claim 1, wherein: each gear of the multi-path multi-gear image current source (50) is a multiple of the current generated by the image micro-current source (40).
6. An integrated bipolar neurostimulation pulse generator according to any one of claims 1 to 5, wherein: the amplitude range of the stimulating current pulse of the stimulating pulse generator is 10 muA-30 mA, and the stimulating current step length is 10 muA/100 muA/1000 muA/2000 muA five-gear.
7. An integrated bipolar neurostimulation pulse generator according to any one of claims 1 to 5, wherein: the frequency range of the stimulation pulse generator is 1-1000HZStimulation frequency step size 1HZ。
8. An integrated bipolar neurostimulation pulse generator according to any one of claims 1 to 5, wherein: the pulse width range of the stimulation pulse generator is 1-1000 Us, and the step length of the stimulation pulse width is 1 Us.
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| CN113041494A (en) * | 2019-12-27 | 2021-06-29 | 上海神奕医疗科技有限公司 | Pulse control circuit and method, pulse generator and deep brain electrical stimulation system |
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