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CN106206901A - LED chip and manufacture method thereof - Google Patents

LED chip and manufacture method thereof Download PDF

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Publication number
CN106206901A
CN106206901A CN201610785105.1A CN201610785105A CN106206901A CN 106206901 A CN106206901 A CN 106206901A CN 201610785105 A CN201610785105 A CN 201610785105A CN 106206901 A CN106206901 A CN 106206901A
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electrode
type
layer
semiconductor layer
type semiconductor
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王磊
陈立人
李庆
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FOCUS LIGHTINGS TECHNOLOGY Co Ltd
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FOCUS LIGHTINGS TECHNOLOGY Co Ltd
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/83Electrodes
    • H10H20/831Electrodes characterised by their shape
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01Manufacture or treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/83Electrodes
    • H10H20/831Electrodes characterised by their shape
    • H10H20/8312Electrodes characterised by their shape extending at least partially through the bodies
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/85Packages
    • H10H20/857Interconnections, e.g. lead-frames, bond wires or solder balls

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  • Led Devices (AREA)

Abstract

本发明提供一种LED芯片及其制造方法,所述LED芯片包括衬底,位于衬底上的N型半导体层、发光层、P型半导体层,以及与N型半导体层和P型半导体层分别电性连接的N电极和P电极,所述LED芯片包括刻蚀至N型半导体层的N型台面及若干N型电极槽,N型电极槽的侧壁及P型半导体层上方设有横跨N型电极槽的绝缘介质层,所述绝缘介质层上形成有连接N性电极槽底部与N型半导体层电性连接的第一透明导电层,所述N型台面上设有第一N电极,N型电极槽中的第一透明导电层上设有第二N电极,第一N电极和第二N电极通过第一透明导电层电性连接。本发明LED芯片中电流密度分布均匀,提高了LED芯片的发光性能,且有效增大了有源层的面积,提高了芯片的发光效率。

The invention provides an LED chip and a manufacturing method thereof. The LED chip includes a substrate, an N-type semiconductor layer on the substrate, a light-emitting layer, a P-type semiconductor layer, and an N-type semiconductor layer and a P-type semiconductor layer respectively. Electrically connected N electrodes and P electrodes, the LED chip includes an N-type mesa etched to the N-type semiconductor layer and a number of N-type electrode grooves, the side walls of the N-type electrode grooves and the top of the P-type semiconductor layer are provided The insulating medium layer of the N-type electrode groove, the first transparent conductive layer connecting the bottom of the N-type electrode groove and the N-type semiconductor layer is formed on the insulating medium layer, and the first N electrode is provided on the N-type mesa A second N electrode is provided on the first transparent conductive layer in the N-type electrode slot, and the first N electrode and the second N electrode are electrically connected through the first transparent conductive layer. The current density distribution in the LED chip of the invention is uniform, the luminous performance of the LED chip is improved, the area of the active layer is effectively increased, and the luminous efficiency of the chip is improved.

Description

LED芯片及其制造方法LED chip and manufacturing method thereof

技术领域technical field

本发明涉及半导体芯片领域,尤其涉及一种LED芯片及其制造方法。The invention relates to the field of semiconductor chips, in particular to an LED chip and a manufacturing method thereof.

背景技术Background technique

发光二极管(Light-Emitting Diode,LED)是一种能发光的半导体电子元件。这种电子元件早在1962年出现,早期只能发出低光度的红光,之后发展出其他单色光的版本,时至今日能发出的光已遍及可见光、红外线及紫外线,光度也提高到相当的光度。由于其具有节能、环保、安全、寿命长、低功耗、低热、高亮度、防水、微型、防震、易调光、光束集中、维护简便等特点,可以广泛应用于各种指示、显示、装饰、背光源、普通照明等领域。A light-emitting diode (Light-Emitting Diode, LED) is a semiconductor electronic component that can emit light. This electronic component appeared as early as 1962. In the early days, it could only emit red light with low luminosity. Later, other monochromatic light versions were developed. Today, the light that can be emitted has covered visible light, infrared rays and ultraviolet rays, and the luminosity has also increased to a considerable extent. of luminosity. Because of its energy saving, environmental protection, safety, long life, low power consumption, low heat, high brightness, waterproof, miniature, shockproof, easy dimming, concentrated beam, easy maintenance, etc., it can be widely used in various indications, displays, decorations , backlight, general lighting and other fields.

传统LED芯片的结构主要有:横向结构和垂直结构,其中垂直结构LED芯片两个电极分别在LED的上下两侧,P电极在LED外延层的p型氮化镓一侧,N电极在LED芯片外延层的n型氮化镓一侧,使得电流垂直流过LED外延层,芯片出光面只有一个电极遮光。横向结构的LED芯片的两个电极在LED芯片的同一侧,P电极在LED外延层的p型氮化镓区域,N电极分布在通过刻蚀露出的n型氮化镓区域,LED芯片上的P和N电极分布不等距,造成n型氮化镓和p型氮化镓层中的电流分布不均匀,从而影响发光效率。The structure of the traditional LED chip mainly includes: horizontal structure and vertical structure, in which the two electrodes of the vertical structure LED chip are on the upper and lower sides of the LED, the P electrode is on the p-type gallium nitride side of the LED epitaxial layer, and the N electrode is on the LED chip. The n-type gallium nitride side of the epitaxial layer makes the current flow vertically through the LED epitaxial layer, and only one electrode on the light emitting surface of the chip is shaded. The two electrodes of the LED chip with a lateral structure are on the same side of the LED chip, the P electrode is in the p-type GaN region of the LED epitaxial layer, and the N electrode is distributed in the n-type GaN region exposed by etching. P and N electrodes are not equidistantly distributed, resulting in uneven current distribution in the n-type GaN and p-type GaN layers, thereby affecting luminous efficiency.

另外,参图1所示,传统横向机构LED芯片,N电极分81’、82’布在通过刻蚀露出的n型GaN区域,因外延层需要刻蚀区域较大(整个n型区域),因P电极91’、92’和N电极81’、82’都分布在LED芯片的出光面,因此使得出光有效面积下降,因此出光效率低。In addition, as shown in FIG. 1, in the traditional horizontal structure LED chip, the N electrodes 81' and 82' are distributed in the n-type GaN region exposed by etching, because the epitaxial layer needs to etch a larger area (the entire n-type region), Since the P electrodes 91 ′, 92 ′ and N electrodes 81 ′, 82 ′ are distributed on the light emitting surface of the LED chip, the effective area of light emitting is reduced, so the light emitting efficiency is low.

发明内容Contents of the invention

本发明的目的在于提供一种LED芯片及其制造方法,其能够增大芯片的发光面积,提高发光效率。The object of the present invention is to provide an LED chip and a manufacturing method thereof, which can increase the luminous area of the chip and improve luminous efficiency.

为了实现上述目的,本发明实施例提供的技术方案如下:In order to achieve the above object, the technical solutions provided by the embodiments of the present invention are as follows:

一种LED芯片,所述LED芯片包括衬底,位于衬底上的N型半导体层、发光层、P型半导体层,以及与N型半导体层和P型半导体层分别电性连接的N电极和P电极,所述LED芯片包括刻蚀至N型半导体层的N型台面及若干N型电极槽,N型电极槽的侧壁及P型半导体层上方设有横跨N型电极槽的绝缘介质层,所述绝缘介质层上形成有连接N性电极槽底部与N型半导体层电性连接的第一透明导电层,所述N型台面上设有第一N电极,N型电极槽中的第一透明导电层上设有第二N电极,第一N电极和第二N电极通过第一透明导电层电性连接。An LED chip comprising a substrate, an N-type semiconductor layer on the substrate, a light-emitting layer, a P-type semiconductor layer, and an N electrode electrically connected to the N-type semiconductor layer and the P-type semiconductor layer, respectively. P electrode, the LED chip includes an N-type mesa and a number of N-type electrode grooves etched to the N-type semiconductor layer, and an insulating medium across the N-type electrode groove is provided on the side wall of the N-type electrode groove and above the P-type semiconductor layer layer, the first transparent conductive layer connecting the bottom of the N-type electrode groove and the N-type semiconductor layer is formed on the insulating medium layer, the first N electrode is arranged on the N-type mesa, and the N-type electrode groove A second N electrode is provided on the first transparent conductive layer, and the first N electrode and the second N electrode are electrically connected through the first transparent conductive layer.

作为本发明的进一步改进,所述P型半导体层上在绝缘介质层之外的区域设置有第二透明导电层,所述P电极位于第二透明导电层上,通过第二透明导电层与P型半导体层电性连接。As a further improvement of the present invention, a second transparent conductive layer is provided on the P-type semiconductor layer outside the insulating medium layer, and the P electrode is located on the second transparent conductive layer, through which the second transparent conductive layer and the P Type semiconductor layer is electrically connected.

作为本发明的进一步改进,所述N电极围绕P电极分布。As a further improvement of the present invention, the N electrodes are distributed around the P electrodes.

作为本发明的进一步改进,所述P电极包括第一P电极及自第一P电极横向延伸的第二P电极。As a further improvement of the present invention, the P electrodes include a first P electrode and a second P electrode laterally extending from the first P electrode.

作为本发明的进一步改进,所述第一N电极和第二N电极均设置于LED芯片的侧边部分。As a further improvement of the present invention, both the first N-electrode and the second N-electrode are disposed on side portions of the LED chip.

作为本发明的进一步改进,所述第一N电极和第二N电极与P电极等距均匀设置。As a further improvement of the present invention, the first N electrode and the second N electrode are arranged equidistantly from the P electrode.

作为本发明的进一步改进,所述N型电极槽的横截面呈圆形、矩形、正多边形或不规则形状。As a further improvement of the present invention, the cross section of the N-type electrode groove is circular, rectangular, regular polygonal or irregular.

相应地,一种LED芯片的制造方法,其特征在于,所述制造方法包括:Correspondingly, a manufacturing method of an LED chip is characterized in that the manufacturing method comprises:

提供一衬底,在衬底上依次外延生长N型半导体层、发光层、P型半导体层;A substrate is provided, and an N-type semiconductor layer, a light-emitting layer, and a P-type semiconductor layer are epitaxially grown on the substrate in sequence;

刻蚀外延层至N型半导体层,形成N型台面及若干N型电极槽;Etching the epitaxial layer to the N-type semiconductor layer to form N-type mesa and several N-type electrode grooves;

在N型电极槽的侧壁及P型半导体层上方制备绝缘介质层;preparing an insulating dielectric layer above the sidewall of the N-type electrode groove and the P-type semiconductor layer;

在绝缘介质层上制备第一透明导电层,第一透明导电层覆盖N性电极槽底部并与N型半导体层电性连接,在P型半导体层上绝缘介质层之外的区域制备第二透明导电层;Prepare the first transparent conductive layer on the insulating medium layer, the first transparent conductive layer covers the bottom of the N-type electrode groove and is electrically connected with the N-type semiconductor layer, and prepares the second transparent conductive layer on the area outside the insulating medium layer on the P-type semiconductor layer. conductive layer;

在N型台面上制备第一N电极,在N型电极槽中的第一透明导电层上制备第二N电极,在第二透明导电层上制备P电极。The first N electrode is prepared on the N-type mesa, the second N electrode is prepared on the first transparent conductive layer in the N-type electrode groove, and the P electrode is prepared on the second transparent conductive layer.

作为本发明的进一步改进,所述N型电极槽的横截面呈圆形、矩形、正多边形或不规则形状。As a further improvement of the present invention, the cross section of the N-type electrode groove is circular, rectangular, regular polygonal or irregular.

与现有技术相比,本发明具有以下优点:Compared with the prior art, the present invention has the following advantages:

N电极围绕P电极分布,且电极结构对称,当LED芯片施加电压时,N电极和P电极之间的电流流向分散,避免了现有技术中电极之间电流流向过于集中,而导致注入有源层内的电流密度分布差异大的情况,有源层的电流密度分布均匀,提高了LED芯片的发光性能;The N electrode is distributed around the P electrode, and the electrode structure is symmetrical. When the voltage is applied to the LED chip, the current flow between the N electrode and the P electrode is scattered, which avoids the current flow between the electrodes in the prior art. In the case of a large difference in current density distribution within the layer, the current density distribution of the active layer is uniform, which improves the luminous performance of the LED chip;

芯片键合点分布合理,可采用倒装共晶焊,提高了芯片可靠性;The distribution of chip bonding points is reasonable, and flip-chip eutectic welding can be used to improve chip reliability;

N电极区域仅刻蚀掉了N型台面及N型电极槽部分,其余N电极区域的有源层仍保留,有效增大了有源层的面积,大大提高了芯片的发光效率。In the N-electrode area, only the N-type mesa and the N-type electrode groove are etched away, and the active layer in the rest of the N-electrode area remains, which effectively increases the area of the active layer and greatly improves the luminous efficiency of the chip.

附图说明Description of drawings

为了更清楚地说明本发明实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明中记载的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings that need to be used in the description of the embodiments or the prior art. Obviously, the accompanying drawings in the following description are only These are some embodiments described in the present invention. Those skilled in the art can also obtain other drawings based on these drawings without creative work.

图1为现有技术中LED芯片的平面结构示意图;FIG. 1 is a schematic diagram of a planar structure of an LED chip in the prior art;

图2a、2b分别为本发明第一实施方式中LED芯片的剖视结构和平面结构示意图;2a and 2b are schematic diagrams of the cross-sectional structure and planar structure of the LED chip in the first embodiment of the present invention, respectively;

图3a~3e为本发明第二实施方式中LED芯片的制备方法工艺步骤图。3a to 3e are process steps diagrams of the method for preparing the LED chip in the second embodiment of the present invention.

具体实施方式detailed description

为了使本技术领域的人员更好地理解本发明中的技术方案,下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都应当属于本发明保护的范围。In order to enable those skilled in the art to better understand the technical solutions in the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described The embodiments are only some of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts shall fall within the protection scope of the present invention.

本发明公开了一种LED芯片,其包括衬底,位于衬底上的N型半导体层、发光层、P型半导体层,以及与N型半导体层和P型半导体层分别电性连接的N电极和P电极,LED芯片包括刻蚀至N型半导体层的N型台面及若干N型电极槽,N型电极槽的侧壁及P型半导体层上方设有横跨N型电极槽的绝缘介质层,绝缘介质层上形成有连接N性电极槽底部与N型半导体层电性连接的第一透明导电层,N型台面上设有第一N电极,N型电极槽中的第一透明导电层上设有第二N电极,第一N电极和第二N电极通过第一透明导电层电性连接。The invention discloses an LED chip, which comprises a substrate, an N-type semiconductor layer on the substrate, a light-emitting layer, a P-type semiconductor layer, and an N electrode electrically connected to the N-type semiconductor layer and the P-type semiconductor layer respectively. and P electrodes, the LED chip includes an N-type mesa etched to the N-type semiconductor layer and a number of N-type electrode grooves, and an insulating dielectric layer across the N-type electrode grooves is provided on the side walls of the N-type electrode grooves and above the P-type semiconductor layer , the first transparent conductive layer connecting the bottom of the N-type electrode groove and the N-type semiconductor layer is formed on the insulating medium layer, the first N electrode is arranged on the N-type mesa, and the first transparent conductive layer in the N-type electrode groove A second N-electrode is provided on it, and the first N-electrode and the second N-electrode are electrically connected through the first transparent conductive layer.

另外,P型半导体层上在绝缘介质层之外的区域设置有第二透明导电层, P电极位于第二透明导电层上,通过第二透明导电层与P型半导体层电性连接。In addition, a second transparent conductive layer is provided on the P-type semiconductor layer outside the insulating medium layer, the P electrode is located on the second transparent conductive layer, and is electrically connected to the P-type semiconductor layer through the second transparent conductive layer.

相应地,本发明还公开了一种LED芯片的制造方法,包括:Correspondingly, the present invention also discloses a method for manufacturing an LED chip, comprising:

提供一衬底,在衬底上依次外延生长N型半导体层、发光层、P型半导体层;A substrate is provided, and an N-type semiconductor layer, a light-emitting layer, and a P-type semiconductor layer are epitaxially grown on the substrate in sequence;

刻蚀外延层至N型半导体层,形成N型台面及若干N型电极槽;Etching the epitaxial layer to the N-type semiconductor layer to form N-type mesa and several N-type electrode grooves;

在N型电极槽的侧壁及P型半导体层上方制备绝缘介质层;preparing an insulating dielectric layer above the sidewall of the N-type electrode groove and the P-type semiconductor layer;

在绝缘介质层上制备第一透明导电层,第一透明导电层覆盖N性电极槽底部并与N型半导体层电性连接,在P型半导体层上绝缘介质层之外的区域制备第二透明导电层;Prepare the first transparent conductive layer on the insulating medium layer, the first transparent conductive layer covers the bottom of the N-type electrode groove and is electrically connected with the N-type semiconductor layer, and prepares the second transparent conductive layer on the area outside the insulating medium layer on the P-type semiconductor layer. conductive layer;

在N型台面上制备第一N电极,在N型电极槽中的第一透明导电层上制备第二N电极,在第二透明导电层上制备P电极。The first N electrode is prepared on the N-type mesa, the second N electrode is prepared on the first transparent conductive layer in the N-type electrode groove, and the P electrode is prepared on the second transparent conductive layer.

以下结合具体实施方式对本发明作进一步说明。The present invention will be further described below in combination with specific embodiments.

参图2a、2b所示,本发明第一实施方式中的LED芯片从下至上依次包括:Referring to Figures 2a and 2b, the LED chip in the first embodiment of the present invention includes from bottom to top:

衬底10,衬底可以是蓝宝石、Si、SiC、GaN、ZnO等;Substrate 10, the substrate can be sapphire, Si, SiC, GaN, ZnO, etc.;

N型半导体层20,N型半导体层可以是N型GaN等;N-type semiconductor layer 20, the N-type semiconductor layer can be N-type GaN, etc.;

发光层30,发光层可以是GaN、InGaN或InGaN/GaN多量子阱有源层等;A light emitting layer 30, the light emitting layer can be GaN, InGaN or InGaN/GaN multi-quantum well active layer, etc.;

P型半导体层40,P型半导体层可以是P型GaN等;P-type semiconductor layer 40, the P-type semiconductor layer can be P-type GaN, etc.;

P电极90和N电极80,P电极90与P型半导体层40电性连接,N电极80与N型半导体层20电性连接。The P electrode 90 and the N electrode 80 , the P electrode 90 is electrically connected to the P-type semiconductor layer 40 , and the N electrode 80 is electrically connected to the N-type semiconductor layer 20 .

其中,N型半导体层20上刻蚀形成有N型台面21,在LED芯片的外延层的周边上还形成有若干刻蚀至N型半导体层的N型电极槽50,N电极区域包括N型台面区域及自N型台面沿着LED芯片周围延伸且覆盖N性电极槽50的区域。Wherein, an N-type mesa 21 is formed by etching on the N-type semiconductor layer 20, and a number of N-type electrode grooves 50 etched to the N-type semiconductor layer are also formed on the periphery of the epitaxial layer of the LED chip. The mesa region and the region extending from the N-type mesa along the periphery of the LED chip and covering the N-type electrode groove 50 .

绝缘介质层60至少设于N型电极槽50的侧壁、以及P型半导体层40上方横跨N型电极槽50的区域,如图2b所示,N电极区域除了N型台面21和N型电极槽50的底部之外的区域均设有绝缘介质层60,绝缘介质层的材料选自SiO2、Si3N4、SiON等中的一种或多种,本实施方式中以一层绝缘介质层为例进行说明,在其他实施方式中也可以多步沉积形成多层绝缘介质层,以提高绝缘性能。The insulating dielectric layer 60 is at least provided on the sidewall of the N-type electrode groove 50 and the region above the P-type semiconductor layer 40 across the N-type electrode groove 50. As shown in FIG. The area other than the bottom of the electrode groove 50 is provided with an insulating dielectric layer 60, and the material of the insulating dielectric layer is selected from one or more of SiO 2 , Si 3 N 4 , SiON, etc. In this embodiment, an insulating layer 60 is used. The dielectric layer is used as an example for illustration. In other implementation manners, multiple layers of insulating dielectric layers may also be formed by multi-step deposition to improve insulation performance.

第一透明导电层71设于绝缘介质层60上方以及N型电极槽50的底部,第一透明导电层71仅与N型电极槽50底部的N型半导体层20电性连接,以导通各个N型电极槽50。The first transparent conductive layer 71 is arranged on the top of the insulating medium layer 60 and the bottom of the N-type electrode groove 50, and the first transparent conductive layer 71 is only electrically connected with the N-type semiconductor layer 20 at the bottom of the N-type electrode groove 50 to conduct each N-type electrode slot 50 .

第二透明导电层72位于P型半导体层40上方绝缘介质层60之外的区域,第二透明导电层72与第一透明导电层71在P型半导体层40上方相互分离设置。The second transparent conductive layer 72 is located outside the insulating medium layer 60 above the P-type semiconductor layer 40 , and the second transparent conductive layer 72 and the first transparent conductive layer 71 are separated from each other above the P-type semiconductor layer 40 .

本实施方式中的第一透明导电层和第二透明导电层为ITO透明导电层,在其他实施方式中也可以为ZITO、ZIO、GIO、ZTO、FTO、AZO、GZO、In4Sn3O12、NiAu等透明导电层。第一透明导电层和第二透明导电层可以为单层透明导电层,也可以为多层透明导电层的组合。The first transparent conductive layer and the second transparent conductive layer in this embodiment are ITO transparent conductive layers, and in other embodiments, they can also be ZITO, ZIO, GIO, ZTO, FTO, AZO, GZO, In 4 Sn 3 O 12 , NiAu and other transparent conductive layers. The first transparent conductive layer and the second transparent conductive layer may be a single transparent conductive layer, or may be a combination of multiple transparent conductive layers.

P电极90位于第二透明导电层72上,其包括第一P电极91及自第一P电极91横向延伸的第二P电极20,第一P电极91和第二P电极92分别通过第二透明导电层72与P型半导体层40电性连接。The P electrode 90 is located on the second transparent conductive layer 72, and it includes a first P electrode 91 and a second P electrode 20 extending laterally from the first P electrode 91. The first P electrode 91 and the second P electrode 92 pass through the second P electrode respectively. The transparent conductive layer 72 is electrically connected to the P-type semiconductor layer 40 .

N电极80包括设于N型台面21上的第一N电极81、以及位于N型电极槽50底部且与第一透明导电层71电性连接的第二N电极82。第一N电极81位于N型台面21上直接与N型半导体层20电性连接,第二N电极82位于N型电极槽50内,并通过N性电极槽50底部的第一透明导电层71与N型半导体层20电性连接。另外,相邻的第二N电极以、第二N电极和第一N电极之间通过第一透明导电层71相互电性连接。The N electrode 80 includes a first N electrode 81 disposed on the N-type mesa 21 , and a second N electrode 82 located at the bottom of the N-type electrode groove 50 and electrically connected to the first transparent conductive layer 71 . The first N-electrode 81 is located on the N-type mesa 21 and is directly electrically connected to the N-type semiconductor layer 20. The second N-electrode 82 is located in the N-type electrode groove 50 and passes through the first transparent conductive layer 71 at the bottom of the N-type electrode groove 50. It is electrically connected with the N-type semiconductor layer 20 . In addition, the adjacent second N electrodes, the second N electrodes and the first N electrodes are electrically connected to each other through the first transparent conductive layer 71 .

本实施方式中的P电极(第一P电极与第二P电极)和N电极(第一NID那寄与第二N电极)的材料可选自Ti、Cr、Au、Ni、Al中的一种或多种的组合。The material of the P electrode (the first P electrode and the second P electrode) and the N electrode (the first NID electrode and the second N electrode) in this embodiment can be selected from one of Ti, Cr, Au, Ni, and Al. or a combination of several.

参图2b所示,本实施方式中的N电极80围绕P电极90分布,其中,第一N电极81和第二N电极82均设置于LED芯片的侧边部分,第一N电极81位于LED芯片的一侧,第二N电极82在第一N电极81的两侧沿LED芯片的周边均匀分布。P电极包括圆形的第一P电极91以及纵长型的第二P电极92,第一N电极81和第二N电极82与P电极90等距均匀设置。As shown in FIG. 2b, the N electrodes 80 in this embodiment are distributed around the P electrodes 90, wherein the first N electrodes 81 and the second N electrodes 82 are both arranged on the side parts of the LED chip, and the first N electrodes 81 are located on the sides of the LED chips. On one side of the chip, the second N electrodes 82 are evenly distributed along the periphery of the LED chip on both sides of the first N electrode 81 . The P electrodes include a circular first P electrode 91 and a vertically elongated second P electrode 92 , and the first N electrode 81 and the second N electrode 82 are equidistant from the P electrode 90 .

本实施方式中的N电极围绕P电极分布,该LED芯片施加电压时,N电极和P电极之间的电流流向分散,避免了现有技术中电极之间电流流向过于集中,而导致注入有源层内的电流密度分布差异大的情况,有源层的电流密度分布均匀,提高了LED芯片的发光性能。In this embodiment, the N electrodes are distributed around the P electrodes. When a voltage is applied to the LED chip, the current flow between the N electrodes and the P electrodes is scattered, which avoids the current flow between the electrodes in the prior art being too concentrated, which causes the injection of active In the case of a large difference in current density distribution within the layer, the current density distribution of the active layer is uniform, which improves the luminous performance of the LED chip.

另外,N电极区域仅刻蚀掉了N型台面及N型电极槽部分,其余N电极区域的有源层仍保留,有效增大了有源层的面积,大大提高了芯片的发光效率。In addition, only the N-type mesa and the N-type electrode groove are etched away in the N-electrode region, while the active layer in the rest of the N-electrode region remains, which effectively increases the area of the active layer and greatly improves the luminous efficiency of the chip.

应当理解的是,本实施方式中N型电极槽的横截面呈圆形设置,在其他实施方式中N型电极槽的横截面也可以为矩形、正多边形或不规则形状等,此处不再一一举例进行说明。It should be understood that the cross-section of the N-type electrode groove in this embodiment is circular, and in other embodiments, the cross-section of the N-type electrode groove can also be a rectangle, a regular polygon or an irregular shape, etc., which will not be repeated here. Give examples one by one.

参图3a~3e并结合图2b所示,本发明第二实施方式中LED芯片的制造方法,具体包括以下步骤:Referring to Figures 3a to 3e and shown in Figure 2b, the method for manufacturing an LED chip in the second embodiment of the present invention specifically includes the following steps:

参图3a所示,提供一衬底10,在衬底10上依次外延生长N型半导体层20、发光层30、P型半导体层40,优选地,本实施方式中衬底10为蓝宝石衬底,N型半导体层20为N型GaN,发光层30为InGaN/GaN多量子阱有源层,P型半导体层40为P型GaN;As shown in FIG. 3a, a substrate 10 is provided, and an N-type semiconductor layer 20, a light-emitting layer 30, and a P-type semiconductor layer 40 are epitaxially grown on the substrate 10. Preferably, the substrate 10 in this embodiment is a sapphire substrate , the N-type semiconductor layer 20 is N-type GaN, the light-emitting layer 30 is an InGaN/GaN multi-quantum well active layer, and the P-type semiconductor layer 40 is P-type GaN;

参图3b所示,刻蚀外延层至N型半导体层,形成N型台面21及若干N型电极槽50;As shown in FIG. 3b, the epitaxial layer is etched to the N-type semiconductor layer to form an N-type mesa 21 and a number of N-type electrode grooves 50;

参图3c所示,在N型电极槽50的侧壁及P型半导体层上方制备绝缘介质层60,绝缘介质层选自SiO2、Si3N4、SiON等中的一种或多种;As shown in FIG. 3c, an insulating dielectric layer 60 is prepared on the sidewall of the N-type electrode groove 50 and above the P-type semiconductor layer, and the insulating dielectric layer is selected from one or more of SiO 2 , Si 3 N 4 , SiON, etc.;

参图3d所示,在绝缘介质层60上制备第一透明导电层71,第一透明导电层71覆盖N性电极槽50底部并与N型半导体层20电性连接,在P型半导体层40上绝缘介质层60之外的区域制备第二透明导电层72,第一透明导电层和第二透明导电层为ITO、ZITO、ZIO、GIO、ZTO、FTO、AZO、GZO、In4Sn3O12、NiAu等;As shown in FIG. 3d, a first transparent conductive layer 71 is prepared on the insulating medium layer 60. The first transparent conductive layer 71 covers the bottom of the N-type electrode groove 50 and is electrically connected to the N-type semiconductor layer 20. On the P-type semiconductor layer 40 Prepare the second transparent conductive layer 72 in the area other than the upper insulating dielectric layer 60, the first transparent conductive layer and the second transparent conductive layer are ITO, ZITO, ZIO, GIO, ZTO, FTO, AZO, GZO, In 4 Sn 3 O 12. NiAu, etc.;

参图3e并结合图2b所示,在N型台面21上制备第一N电极81,在N型电极槽50中的第一透明导电层71上制备第二N电极82,在第二透明导电层72上制备第一P电极91和第二P电极92,P电极和N电极材料选自Ti、Cr、Au、Ni、Al中的一种或多种。Referring to FIG. 3e and shown in FIG. 2b, a first N electrode 81 is prepared on the N-type mesa 21, a second N electrode 82 is prepared on the first transparent conductive layer 71 in the N-type electrode groove 50, and a second N electrode 82 is prepared on the second transparent conductive layer 71. A first P electrode 91 and a second P electrode 92 are prepared on the layer 72, and the materials of the P electrode and the N electrode are selected from one or more of Ti, Cr, Au, Ni, and Al.

与现有技术相比,本发明具有以下有益效果:Compared with the prior art, the present invention has the following beneficial effects:

N电极围绕P电极分布,且电极结构对称,当LED芯片施加电压时,N电极和P电极之间的电流流向分散,避免了现有技术中电极之间电流流向过于集中,而导致注入有源层内的电流密度分布差异大的情况,有源层的电流密度分布均匀,提高了LED芯片的发光性能;The N electrode is distributed around the P electrode, and the electrode structure is symmetrical. When the voltage is applied to the LED chip, the current flow between the N electrode and the P electrode is scattered, which avoids the current flow between the electrodes in the prior art. In the case of a large difference in current density distribution within the layer, the current density distribution of the active layer is uniform, which improves the luminous performance of the LED chip;

芯片键合点分布合理,可采用倒装共晶焊,提高了芯片可靠性;The distribution of chip bonding points is reasonable, and flip-chip eutectic welding can be used to improve chip reliability;

N电极区域仅刻蚀掉了N型台面及N型电极槽部分,其余N电极区域的有源层仍保留,有效增大了有源层的面积,大大提高了芯片的发光效率。In the N-electrode area, only the N-type mesa and the N-type electrode groove are etched away, and the active layer in the rest of the N-electrode area remains, which effectively increases the area of the active layer and greatly improves the luminous efficiency of the chip.

对于本领域技术人员而言,显然本发明不限于上述示范性实施例的细节,而且在不背离本发明的精神或基本特征的情况下,能够以其他的具体形式实现本发明。因此,无论从哪一点来看,均应将实施例看作是示范性的,而且是非限制性的,本发明的范围由所附权利要求而不是上述说明限定,因此旨在将落在权利要求的等同要件的含义和范围内的所有变化囊括在本发明内。不应将权利要求中的任何附图标记视为限制所涉及的权利要求。It will be apparent to those skilled in the art that the invention is not limited to the details of the above-described exemplary embodiments, but that the invention can be embodied in other specific forms without departing from the spirit or essential characteristics of the invention. Accordingly, the embodiments should be regarded in all points of view as exemplary and not restrictive, the scope of the invention being defined by the appended claims rather than the foregoing description, and it is therefore intended that the scope of the invention be defined by the appended claims rather than by the foregoing description. All changes within the meaning and range of equivalents of the elements are embraced in the present invention. Any reference sign in a claim should not be construed as limiting the claim concerned.

此外,应当理解,虽然本说明书按照实施方式加以描述,但并非每个实施方式仅包含一个独立的技术方案,说明书的这种叙述方式仅仅是为清楚起见,本领域技术人员应当将说明书作为一个整体,各实施例中的技术方案也可以经适当组合,形成本领域技术人员可以理解的其他实施方式。In addition, it should be understood that although this specification is described according to implementation modes, not each implementation mode only contains an independent technical solution, and this description in the specification is only for clarity, and those skilled in the art should take the specification as a whole , the technical solutions in the various embodiments can also be properly combined to form other implementations that can be understood by those skilled in the art.

Claims (9)

1.一种LED芯片,所述LED芯片包括衬底,位于衬底上的N型半导体层、发光层、P型半导体层,以及与N型半导体层和P型半导体层分别电性连接的N电极和P电极,其特征在于,所述LED芯片包括刻蚀至N型半导体层的N型台面及若干N型电极槽,N型电极槽的侧壁及P型半导体层上方设有横跨N型电极槽的绝缘介质层,所述绝缘介质层上形成有连接N性电极槽底部与N型半导体层电性连接的第一透明导电层,所述N型台面上设有第一N电极,N型电极槽中的第一透明导电层上设有第二N电极,第一N电极和第二N电极通过第一透明导电层电性连接。1. A kind of LED chip, described LED chip comprises substrate, is positioned at the N-type semiconductor layer on the substrate, light-emitting layer, P-type semiconductor layer, and the N-type semiconductor layer and the N-type semiconductor layer electrically connected with P-type semiconductor layer respectively The electrode and the P electrode are characterized in that the LED chip includes an N-type mesa etched to the N-type semiconductor layer and a number of N-type electrode grooves, the side walls of the N-type electrode grooves and the top of the P-type semiconductor layer are provided The insulating medium layer of the type electrode groove, the first transparent conductive layer connecting the bottom of the N-type electrode groove and the N-type semiconductor layer is formed on the insulating medium layer, and the first N electrode is provided on the N-type mesa, A second N electrode is provided on the first transparent conductive layer in the N-type electrode groove, and the first N electrode and the second N electrode are electrically connected through the first transparent conductive layer. 2.根据权利要求1所述的LED芯片,其特征在于,所述P型半导体层上在绝缘介质层之外的区域设置有第二透明导电层,所述P电极位于第二透明导电层上,通过第二透明导电层与P型半导体层电性连接。2. The LED chip according to claim 1, wherein a second transparent conductive layer is provided on the P-type semiconductor layer outside the insulating medium layer, and the P electrode is located on the second transparent conductive layer , electrically connected to the P-type semiconductor layer through the second transparent conductive layer. 3.根据权利要求1所述的LED芯片,其特征在于,所述N电极围绕P电极分布。3. The LED chip according to claim 1, wherein the N electrodes are distributed around the P electrodes. 4.根据权利要求3所述的LED芯片,其特征在于,所述P电极包括第一P电极及自第一P电极横向延伸的第二P电极。4. The LED chip according to claim 3, wherein the P-electrode comprises a first P-electrode and a second P-electrode extending laterally from the first P-electrode. 5.根据权利要求3所述的LED芯片,其特征在于,所述第一N电极和第二N电极均设置于LED芯片的侧边部分。5 . The LED chip according to claim 3 , wherein the first N electrode and the second N electrode are both disposed on side portions of the LED chip. 6.根据权利要求5所述的LED芯片,其特征在于,所述第一N电极和第二N电极与P电极等距均匀设置。6 . The LED chip according to claim 5 , wherein the first N electrode and the second N electrode are arranged equidistantly from the P electrode. 7.根据权利要求1所述的LED芯片,其特征在于,所述N型电极槽的横截面呈圆形、矩形、正多边形或不规则形状。7 . The LED chip according to claim 1 , wherein the cross-section of the N-type electrode groove is circular, rectangular, regular polygonal or irregular. 8.一种权利要求1~7中任一项所述的LED芯片的制造方法,其特征在于,所述制造方法包括:8. A method for manufacturing the LED chip according to any one of claims 1 to 7, wherein the method for manufacturing comprises: 提供一衬底,在衬底上依次外延生长N型半导体层、发光层、P型半导体层;A substrate is provided, and an N-type semiconductor layer, a light-emitting layer, and a P-type semiconductor layer are epitaxially grown on the substrate in sequence; 刻蚀外延层至N型半导体层,形成N型台面及若干N型电极槽;Etching the epitaxial layer to the N-type semiconductor layer to form N-type mesa and several N-type electrode grooves; 在N型电极槽的侧壁及P型半导体层上方制备绝缘介质层;preparing an insulating dielectric layer above the sidewall of the N-type electrode groove and the P-type semiconductor layer; 在绝缘介质层上制备第一透明导电层,第一透明导电层覆盖N性电极槽底部并与N型半导体层电性连接,在P型半导体层上绝缘介质层之外的区域制备第二透明导电层;Prepare the first transparent conductive layer on the insulating medium layer, the first transparent conductive layer covers the bottom of the N-type electrode groove and is electrically connected with the N-type semiconductor layer, and prepares the second transparent conductive layer on the area outside the insulating medium layer on the P-type semiconductor layer. conductive layer; 在N型台面上制备第一N电极,在N型电极槽中的第一透明导电层上制备第二N电极,在第二透明导电层上制备P电极。The first N electrode is prepared on the N-type mesa, the second N electrode is prepared on the first transparent conductive layer in the N-type electrode groove, and the P electrode is prepared on the second transparent conductive layer. 9.根据权利要求8所述的LED芯片的制造方法,其特征在于,所述N型电极槽的横截面呈圆形、矩形、正多边形或不规则形状。9 . The method for manufacturing an LED chip according to claim 8 , wherein the cross-section of the N-type electrode groove is in the shape of a circle, a rectangle, a regular polygon or an irregular shape.
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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108429583A (en) * 2018-05-25 2018-08-21 南京艾凯特光电科技有限公司 visible light wireless duplex communication device
CN110062962A (en) * 2016-12-07 2019-07-26 日机装株式会社 Optical semiconductor device
CN111192945A (en) * 2020-02-19 2020-05-22 佛山市国星半导体技术有限公司 Ultraviolet LED chip and manufacturing method thereof
CN112635633A (en) * 2020-12-31 2021-04-09 深圳第三代半导体研究院 Light emitting diode and method for manufacturing the same
CN112635632A (en) * 2020-12-31 2021-04-09 深圳第三代半导体研究院 Light emitting diode and method for manufacturing the same

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014099515A (en) * 2012-11-14 2014-05-29 Toyoda Gosei Co Ltd Semiconductor light-emitting element and light-emitting device
CN104600166A (en) * 2013-10-31 2015-05-06 无锡华润华晶微电子有限公司 LED chip structure and preparation method thereof
CN105264678A (en) * 2013-06-04 2016-01-20 克利公司 LED medium mirror

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014099515A (en) * 2012-11-14 2014-05-29 Toyoda Gosei Co Ltd Semiconductor light-emitting element and light-emitting device
CN105264678A (en) * 2013-06-04 2016-01-20 克利公司 LED medium mirror
CN104600166A (en) * 2013-10-31 2015-05-06 无锡华润华晶微电子有限公司 LED chip structure and preparation method thereof

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CN110062962B (en) * 2016-12-07 2022-05-24 日机装株式会社 Optical semiconductor device
CN108429583A (en) * 2018-05-25 2018-08-21 南京艾凯特光电科技有限公司 visible light wireless duplex communication device
CN111192945A (en) * 2020-02-19 2020-05-22 佛山市国星半导体技术有限公司 Ultraviolet LED chip and manufacturing method thereof
CN112635633A (en) * 2020-12-31 2021-04-09 深圳第三代半导体研究院 Light emitting diode and method for manufacturing the same
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Application publication date: 20161207