CN106158007A - Circuit structure for suppressing electromagnetic radiation interference of double data rate synchronous dynamic random access memory signal - Google Patents

Abstract

The invention provides a circuit structure for inhibiting electromagnetic radiation interference, which is applied to a memory interface unit of a double data rate synchronous dynamic random access memory and comprises: a first conductive line coupled to a reference potential; a second conductive line parallel to the first conductive line and coupled to the reference potential; a third conductive line disposed between and parallel to the first conductive line and the second conductive line for transmitting a signal, wherein the first conductive line, the second conductive line and the third conductive line are disposed on the same plane; and a connecting element having two terminals, wherein one terminal is electrically connected to the first conductive wire, the other terminal is electrically connected to the second conductive wire, and the connecting element crosses over the third conductive wire and is insulated from the third conductive wire.

Description

Circuit Structure for Suppressing Electromagnetic Radiation Interference of Double Data Rate Synchronous Dynamic Random Access Memory Signals

technical field

Circuit structure to suppress electromagnetic interference of DDR SDRAM signals

technical field

The present invention relates to suppressing the electromagnetic radiation interference (electromagnetic interference, EMI) of double data rate synchronous dynamic random access memory (Double Data RateSynchronous Dynamic Random Access Memory, hereinafter referred to as DDR SDRAM) signal, especially about suppressing the electromagnetic interference of DDR SDRAM signal Circuit structure for radiated interference.

Background technique

The winding on the circuit board is often one of the important factors causing electromagnetic radiation interference, and when the DDR SDRAM memory interface unit (Memory Interface Unit, MIU) causes electromagnetic radiation interference when transmitting signals, it often causes the performance of DDR SDRAM to decline. For example, the data transmission rate decreases, or the data error rate increases, and so on. Please refer to FIG. 1 , which is a partial circuit diagram of a memory interface unit of a known DDR SDRAM. Frame selection ranges 110 and 120 indicate that one signal line is surrounded by two ground lines, and frame selection ranges 130 and 140 respectively indicate that two signal lines are surrounded by two ground lines. The signal line may be used to transmit a command signal, an address signal, a data signal DQ or a data strobe signal (Data Strobe Signal) DQS and the like to operate the DDR SDRAM. Electromagnetic radiation interference is related to the operating frequency of DDR SDRAM and the length of the winding wire. When the operating frequency of DDR SDRAM is getting higher and higher, for example, up to 200MHz, the specific winding length will cause quite high electromagnetic radiation interference at this frequency. Taking an actual measured data as an example, the electromagnetic radiation interference at 200MHz may be as high as 44dB. Such high electromagnetic radiation interference has exceeded the standard specification of DDR SDRAM, which can easily lead to data transmission errors or system instability. Traditionally, the following common methods have been proposed to reduce electromagnetic radiation interference.

One of the methods is to couple a capacitor between the signal line and the ground area. The main purpose of coupling the capacitor is to increase the rising time of the signal, so that the energy of the electromagnetic radiation can be reduced. However, its side effect is that the coupling capacitance will reduce the quality of the signal, resulting in poor overall performance of the circuit. Another method is to use the principle of metal shielding effect (shielding effect) to cover the metal box (metalshielding box) or metal sheet on the circuit board, such as copper foil (copper foil), but whether it is covering the metal box or metal sheet, will result in increased costs.

Contents of the invention

In view of the shortcomings of the prior art, an object of the present invention is to provide a circuit structure for suppressing electromagnetic radiation interference, which can reduce electromagnetic radiation interference in a low-cost manner without affecting the performance of the circuit.

The present invention provides a circuit structure applied to a memory interface unit of a double data rate synchronous dynamic random access memory, comprising: a first wire coupled to a reference potential; a second wire parallel to the first a wire, coupled to the reference potential; a third wire, interposed between the first wire and the second wire and parallel to the first wire and the second wire, for transmitting a signal, wherein the first The wire, the second wire and the third wire are located on the same plane; and a connection element has two ends, one end is electrically connected to the first wire, and the other end is electrically connected to the second wire, and the connection element straddles the first wire Three wires are insulated from the third wire.

The circuit structure for suppressing electromagnetic radiation interference of the present invention only needs to simply connect basic passive electronic components, such as resistive elements, capacitive elements, and inductive elements, to the grounding lines or grounding areas on both sides of the signal line, and to cross the signal line Without contact with the signal line, the electromagnetic radiation interference can be effectively reduced. In a preferred embodiment, the electronic element can be a resistance element with an extremely low resistance value, such as a simple copper wire, which can effectively suppress the electromagnetic radiation interference generated by the signal line. Compared with the known technology, the electronic components used in the present invention are simple, low in cost, and easy to install and arrange. Therefore, the present invention provides an effective method that is easier to implement and economical than the known technology.

Regarding the characteristics, implementation and effects of the present invention, preferred embodiments are described in detail below in conjunction with the accompanying drawings.

Description of drawings

Fig. 1 is the local circuit diagram of the memory interface unit of known DDR SDRAM;

Fig. 2 is the schematic diagram of an embodiment of the circuit structure of suppressing electromagnetic radiation interference of the present invention;

Fig. 3 is the schematic diagram of another embodiment of the circuit structure of suppressing electromagnetic radiation interference of the present invention; And

FIG. 4 is a schematic diagram of another embodiment of the circuit structure for suppressing electromagnetic radiation interference according to the present invention.

Symbol Description

110, 120, 130, 140: frame selection range

210, 270, 310, 350, 410, 450, 490: ground wire

230, 250, 330, 430, 470: signal line

220, 320, 420, 440, 460: connecting elements

d1, d2: distance

w: width

detailed description

The technical terms in the following description refer to the customary terms in this technical field. If some terms are explained or defined in this manual, the explanations of these terms shall be based on the descriptions or definitions in this manual.

The content disclosed by the invention includes a circuit structure for suppressing electromagnetic radiation interference, which can effectively suppress electromagnetic radiation interference caused by circuit winding. The circuit structure can be applied to the memory interface unit of DDR SDRAM. On the premise that the implementation is possible, those skilled in the art can select equivalent elements according to the content disclosed in this specification to implement the present invention, that is, the implementation of the present invention is not limited to the following embodiments. Since some elements included in the circuit structure for suppressing electromagnetic radiation interference of the present invention may be known elements individually, so without affecting the full disclosure and practicability of the device invention, the following description is for known elements Details will be omitted.

Please refer to FIG. 2 , which is a schematic diagram of an embodiment of a circuit structure for suppressing electromagnetic radiation interference according to the present invention. FIG. 2 includes a ground wire 210 , a signal wire 230 , a signal wire 250 , a ground wire 270 and a connection element 220 . The ground line 210 is substantially parallel to the ground line 270 . The signal line 230 and the signal line 250 are located between the ground line 210 and the ground line 270 and are substantially parallel to the ground line 210 and the ground line 270 . The ground wire 210 , the signal wire 230 , the signal wire 250 and the ground wire 270 are located on the same plane. In a preferred embodiment, the circuit shown in FIG. 2 is a local circuit of a memory interface unit of a DDR SDRAM. The signal line 230 carries a command signal of the memory, such as a write command or a read command to the memory, and the signal line 250 carries an address signal of the memory, which is used to indicate a memory address corresponding to the write command or the read command. As shown in the figure, the signal line 230 and the signal line 250 are surrounded by the ground line 210 and the ground line 270, the distance between the ground line 210 and the signal line 230 is d2, the width of the signal line 230 is w, and the distance between the signal line 230 and the signal line 250 is The distance is d1, the width of the signal line 250 is w, and the distance between the signal line 250 and the ground line 270 is d2. The width w can be selected between 4-6 mils (mil, one-thousandth of an inch), the spacing d1 can be selected between 8-12 mils, and the spacing d2 can be selected between 4-6 mils between. The above numbers are for illustration only, not for limiting the present invention. In a preferred embodiment, the width w may be determined to be 5 mils, the spacing d1 may be determined to be 10 mils, and the spacing d2 may be determined to be 5 mils.

Because the signal line 230 or the signal line 250 itself is an equivalent antenna, jumping the connection element on the equivalent antenna will change the radiation efficiency of the equivalent antenna, and the two ends of the connection element are preferably connected to the same voltage potential, Such as grounding. Therefore, it is convenient to bridge the connecting element 220 above the signal line 230 and the signal line 250 . One end of the connection element 220 is electrically connected to the ground wire 210 , the other end is electrically connected to the ground wire 270 , and the middle part spans above the signal wire 230 and the signal wire 250 without being electrically connected to the signal wire 230 and the signal wire 250 That is to say, the connection element 220 is electrically insulated from the signal line 230 and the signal line 250 . The connection element 220 can be made of a resistance element, the preferred range of resistance value is below 50 ohms, and the material can be selected from one of copper and tin, for example. In a preferred embodiment, the connection element 220 may use a copper wire with a resistance equal to or close to 0 ohm, or a wire with a resistance of other materials equal to or close to 0 ohm. The portion of the connection element 220 connected to the ground wire 210 and the portion connected to the ground wire 270 can be electrically connected by surface-mount technology (SMT). The present invention can effectively reduce the radiation efficiency of the equivalent antenna of the signal lines 230 and 250 by using a simple connection element 220 to connect the ground lines 210 and 270 surrounding the signal lines 230 and 250 to further suppress electromagnetic radiation interference. In an actual measurement, before the connection element 220 is added, the signals carried by the signal lines 230 and 250 will generate about 44dB of electromagnetic radiation interference at an operating frequency of 200MHz. When this circuit structure is applied to DDR SDRAM, such a large The electromagnetic radiation interference has exceeded the scope established by the specification standard. However, after the connection element 220 is provided in the present invention, the electromagnetic radiation interference remains at about 20 dB at the same frequency, a decrease of about 54%, so that the suppressed electromagnetic radiation interference meets the requirements of the specifications.

In other embodiments, the connecting element 220 can also be implemented by using a capacitive element or an inductive element. When applied to the same operating frequency of the above-mentioned DDR SDRAM, the capacitance value of the capacitive element is preferably selected to be above 0.1 μF, which can achieve a better electromagnetic radiation interference suppression effect. Moreover, whether it is a capacitive element or an inductive element, the connection element 220 can also be electrically connected to the ground wire 210 and the ground wire 270 by using the surface mount technology.

Please refer to FIG. 3 , which is a schematic diagram of another embodiment of the circuit structure for suppressing electromagnetic radiation interference of the present invention. FIG. 3 includes a ground wire 310 , a signal wire 330 , a ground wire 350 and a connection element 320 . The ground line 310 is substantially parallel to the ground line 350 . The signal line 330 is interposed between the ground line 310 and the ground line 350 and is substantially parallel to both. The ground wire 310 , the signal wire 330 and the ground wire 350 are located on the same plane. In a preferred embodiment, the circuit shown in FIG. 3 is a local circuit of a memory interface unit of a DDR SDRAM. The signal line 330 carries a command signal or an address signal of the memory. As shown in the figure, the signal line 330 is surrounded by the ground line 310 and the ground line 350 . One end of the connection element 320 is electrically connected to the ground wire 310, the other end is electrically connected to the ground wire 350, and the middle part is across the top of the signal wire 330, but not electrically connected to the signal wire 330; that is, the connection element 320 It is electrically insulated from the signal line 330 . The connection element 320 can be made of a resistance element, the preferred range of resistance value is below 50 ohms, and the material can be selected from one of copper and tin, for example. The connecting element 320 can also be composed of a capacitive element or an inductive element. The portion of the connection element 320 connected to the ground wire 310 and the portion connected to the ground wire 350 may be bonded by surface mount technology. The present invention can effectively suppress electromagnetic radiation interference by using a simple connection element 320 to connect the ground wires 310 and 350 surrounding the signal wire 330 .

Please refer to FIG. 4 , which is a schematic diagram of another embodiment of the circuit structure for suppressing electromagnetic radiation interference of the present invention. FIG. 4 includes a ground wire 410 , a signal wire 430 , a ground wire 450 , a signal wire 470 , a ground wire 490 , a connecting element 420 , a connecting element 440 and a connecting element 460 . The ground wire 410 , the ground wire 450 and the ground wire 490 are substantially parallel. The signal line 430 is between the ground line 410 and the ground line 450, and is substantially parallel to the ground line 410 and the ground line 450; the signal line 470 is between the ground line 450 and the ground line 490, and is substantially parallel to the ground line 450. and the ground wire 490 in parallel. The ground wire 410 , the signal wire 430 , the ground wire 450 , the signal wire 470 and the ground wire 490 are located on the same plane. In a preferred embodiment, the circuit shown in FIG. 4 is a local circuit of a memory interface unit of a DDR SDRAM. The signal line 430 and the signal line 470 carry command signals or address signals of the memory. One end of the connection element 420 is electrically connected to the ground wire 410 , the other end is electrically connected to the ground wire 490 , and the middle part can be electrically connected to the ground wire 450 or not electrically connected to the ground wire 450 , and straddles the signal wire 430 and above the signal line 470 without being electrically connected to them; that is, the connecting element 420 is electrically insulated from the signal line 430 and the signal line 470 . One end of the connection element 440 is electrically connected to the ground wire 410, the other end is electrically connected to the ground wire 450, and the middle part is across the top of the signal wire 430 without being electrically connected to it; that is, the connection element 440 and the signal wire 430 Electrically insulated. One end of the connection element 460 is electrically connected to the ground wire 450, the other end is electrically connected to the ground wire 490, and the middle part is across the top of the signal wire 470 without being electrically connected to it; that is, the connection element 460 and the signal wire 470 Electrically insulated. Similar to the connecting elements 220 and 320 , the connecting elements 420 , 440 , 460 can be made of resistive elements, and the material can be selected from copper or tin, or can be made of capacitive or inductive elements. The connection parts of the connecting element 420 , the connecting element 440 and the connecting element 460 and the grounding wire 410 , the grounding wire 450 and the grounding wire 490 can be bonded by surface adhesive technology. As shown in the figure, the connection element used to suppress electromagnetic radiation interference in the present invention can not only cross the signal line, but also cross other ground lines at the same time, and any two of the three ground lines can also be connected by other connection elements. In this way, electromagnetic radiation interference can be further effectively suppressed.

To sum up, the present invention utilizes the characteristic that the signal line itself is an equivalent antenna, and simply crosses the passive electronic components coupled to a fixed potential across it to reduce the radiation efficiency of the equivalent antenna, so as to Effective suppression of electromagnetic radiation interference. The invention has the advantages of low cost and simple implementation. Please note that in the preceding figures, the shapes, sizes and proportions of the elements are only for illustration, for those skilled in the art to understand the present invention, and are not intended to limit the present invention. In addition, those skilled in the art can selectively implement some or all of the technical features of any embodiment according to the disclosure of the present invention and their own needs, or selectively implement a combination of some or all of the technical features of multiple embodiments, In this way, the flexibility of the implementation of the present invention is increased. Furthermore, although the above-disclosed embodiments take the memory interface unit of DDR SDRAM as an example, this is not a limitation of the present invention, and those skilled in the art can appropriately apply the present invention to the wiring of other electronic devices according to the disclosure of the present invention.

Although the embodiments of the present invention are as described above, these embodiments are not intended to limit the present invention, and those skilled in the art can make changes to the technical characteristics of the present invention according to the explicit or implicit contents of the present invention. All these changes may belong to the scope of patent protection sought by the present invention. In other words, the scope of patent protection of the present invention should be defined by the claims.

Claims (17)

1. A circuit structure applied to a memory interface unit of a double data rate synchronous dynamic random access memory, comprising: a first wire coupled to a reference potential; a second wire, parallel to the first wire, coupled to the reference potential; a third wire, interposed between the first wire and the second wire and parallel to the first wire and the second wire, for transmitting a signal, wherein the first wire, the second wire and the third wire on the same plane; and A connecting element has two ends, one end is electrically connected to the first wire, and the other end is electrically connected to the second wire, the connecting element spans the third wire and is insulated from the third wire. 2. The circuit structure of claim 1, wherein the signal is one of a command signal and an address signal for accessing the DDR-SDR. 3. The circuit structure according to claim 1, further comprising: a fourth wire, interposed between the first wire and the second wire and parallel to the first wire and the second wire, for transmitting an additional signal; Wherein, the fourth wire is located on the same plane as the first wire, the second wire and the third wire, and the connection element spans the fourth wire and is insulated from the fourth wire. 4. The circuit structure as claimed in claim 3, wherein the signal is one of a command signal and an address signal for accessing the double data rate synchronous dynamic random access memory, and the additional The signal is the other of the command signal and the address signal. 5. The circuit structure according to claim 3, wherein the distance between the first wire and the third wire is equal to the distance between the second wire and the fourth wire. 6 . The circuit structure according to claim 5 , wherein the distance between the first wire and the third wire and the distance between the second wire and the fourth wire are between 4-6 mils. 7. The circuit structure according to claim 6, wherein the distance between the third wire and the fourth wire is 8-12 mils. 8. The circuit structure according to claim 3, further comprising: a fifth wire, interposed between the third wire and the fourth wire and parallel to the first wire and the second wire, coupled to the reference potential; Wherein, the fifth wire is located on the same plane as the first wire, the second wire, the third wire and the fourth wire. 9. The circuit structure as claimed in claim 8, wherein the connecting element straddles the fifth wire and is insulated from the fifth wire. 10. The circuit structure according to claim 8, wherein the connecting element is also electrically connected to the fifth wire. 11. The circuit structure according to claim 8, further comprising: An additional connection element having two ends, one end electrically connected to the fifth wire, the other end electrically connected to one of the first wire and the second wire, and spanning the third wire and the fourth wire One of the wires and insulated from it. 12. The circuit structure of claim 11, wherein the additional connecting element and the connecting element are selected from the group consisting of a resistive element, a capacitive element, and an inductive element. 13. The circuit structure as claimed in claim 12, wherein the resistance of the resistance element is less than 50 ohms. 14. The circuit structure as claimed in claim 11, wherein the additional connecting element is a wire. 15. The circuit structure of claim 1, wherein the connecting element is selected from the group consisting of a resistive element, a capacitive element, and an inductive element. 16. The circuit structure as claimed in claim 15, wherein the resistance of the resistance element is less than 50 ohms. 17. The circuit structure as claimed in claim 1, wherein the connection element is a wire.