CN106057111B - Test circuit and liquid crystal display panel - Google Patents
Test circuit and liquid crystal display panel Download PDFInfo
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- CN106057111B CN106057111B CN201610648332.XA CN201610648332A CN106057111B CN 106057111 B CN106057111 B CN 106057111B CN 201610648332 A CN201610648332 A CN 201610648332A CN 106057111 B CN106057111 B CN 106057111B
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- 238000012360 testing method Methods 0.000 title claims abstract description 53
- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 29
- 230000005540 biological transmission Effects 0.000 claims description 29
- 230000000694 effects Effects 0.000 abstract description 3
- 239000010409 thin film Substances 0.000 description 13
- 238000010586 diagram Methods 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 239000013078 crystal Substances 0.000 description 1
- 238000005034 decoration Methods 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
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- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
It includes: a multichannel allocation unit, a switch unit and a logic control element that the present invention, which provides a kind of test circuit and liquid crystal display panel, the test circuit,；The multichannel allocation unit has a first input end, N number of first output end and P the first control terminal, which has N number of access and one second control terminal, wherein the N and P is positive integer；The first input end is used to access the data voltage of test, which connect with the input terminal of N number of access correspondingly respectively, and the output end of N number of access is connect with a pixel unit respectively；First control terminal and second control terminal are connect with the logic control element respectively.The present invention can prevent adjacent data line short-circuit, improve display effect.
Description
Technical field
The present invention relates to field of liquid crystal display, more particularly to a kind of test circuit and liquid crystal display panel.
Background technique
What liquid crystal display panel test circuit detected the electrical property of liquid crystal display panel after the completion of the array substrate of liquid crystal display panel
Circuit liquid crystal display panel test circuit is typically integrated in single panel, such as in array substrate.Pass through after liquid crystal display panel is finished
The data-signal for filling test outside detecting instrument detects each pixel unit of its dot structure.After panel forms mould group
When normal work, can by the control signal-off of the external testing instrument test circuit, in order to avoid influence liquid crystal display panel it is normal
Work.
The data voltage of successively test can be transferred to by multichannel allocation unit in current test circuit design
Corresponding pixel unit, multichannel allocation unit inside are equipped with thin film transistor (TFT) come the switch for controlling each output channel, use grid
Pole controls signal to control the conducting and cut-off of each thin film transistor (TFT).Film crystal is also devised in the end of the test circuit
Pipe controls its conducting and cut-off with grid control signal as master switch.When testing circuit work, grid control letter
The thin film transistor (TFT) for number opening the test circuit end of its control, makes each pixel unit tested in circuit and liquid crystal display panel
Data line connection；And control inside multichannel allocation unit corresponding thin film transistor (TFT) conducting to select corresponding output channel, with
The data-signal of test is exported to corresponding pixel unit.After being completed, when liquid crystal display panel works normally, grid control
The thin film transistor (TFT) of thin film transistor (TFT) and test circuit end inside signal-off multichannel allocation unit processed, to disconnect test
The connection of circuit and each pixel unit.
But in fact, when poor due to the switching characteristic of the thin film transistor (TFT) as switching tube, multichannel allocation unit
Internal corresponding thin film transistor (TFT) and the thin film transistor (TFT) electric leakage for testing circuit end will lead to the adjacent number of dot structure
According to line short circuit, the normal work of liquid crystal display panel is influenced.
Therefore, the prior art is defective, needs to improve.
Summary of the invention
The purpose of the present invention is to provide a kind of test circuit and liquid crystal display panels；It is existing due to testing circuit to solve
The technical problem of the adjacent data line short circuit of thin film transistor (TFT) leakage conductance addressed pixel structure.
To solve the above problems, technical solution provided by the invention is as follows:
The present invention provides a kind of test circuit, comprising: a multichannel allocation unit, a switch unit and a logic control list
Member；The multichannel allocation unit has a first input end, N number of first output end and P the first control terminal, switch unit tool
There are N number of access and one second control terminal, wherein the N and P is positive integer；
The first input end is used to access the data voltage of test, N number of first output end respectively with N number of access
Input terminal connects correspondingly, and the output end of N number of access is connect with a pixel unit respectively；First control terminal and should
Second control terminal is connect with the logic control element respectively；
When being tested, which controls N number of access and opens, and the P the first control terminals are respectively connected to outer
The control voltage of portion's test equipment, the multichannel allocation unit select one from N number of first output end according to this P control voltage
A first output end exports the data voltage to the corresponding access, so that output is to corresponding pixel unit；It tests
Bi Hou, the logic control element export the first predetermined level to the P the first control terminals to close the multichannel allocation unit, and
The second predetermined level is exported to second control terminal to close the individual channel of the switch unit.
In test circuit of the present invention, the multichannel allocation unit includes one first distribution subelement, M second
Subelement is distributed, which is provided with M second output terminal, M first control terminals and described first
Input terminal, the second distribution subelement have one second input terminal, L first control terminal and L first outputs
End, wherein M and L is positive integer, M*L=N, M+L=P；
Each second output terminal is connect with the second input terminal of the second distribution subelement respectively, first distribution
Subelement is selected from M second output terminal of the first distribution subelement according to the control voltage of the M the first control terminal inputs
Select a second output terminal with by the data voltage export to it is corresponding second distribution subelement the second input terminal, this second point
L first output of voltage from the second distribution subelement is controlled with what subelement was used to input according to the L the first control terminals
Select first output end exporting the data voltage to the corresponding access in end.
In test circuit of the present invention, the first distribution subelement includes M first switch tube, the M a the
The input terminal of one switching tube is connected to a common node, and with the common node for the first input end；The M first switch
The control terminal of pipe is connect with M first control terminals correspondingly respectively, the output end of the M first switch tube respectively with
The second input terminal connection of the one second distribution subelement.
In test circuit of the present invention, the second distribution subelement includes L second switch；
The M second distribution subelement has L the first control terminals, every one first control in the L the first control terminals
End is connect with the control terminal of a second switch of every one second distribution subelement respectively.
In test circuit of the present invention, the logic control element includes the first logic control subelement, this
One logic control subelement includes P transmission gate and a phase inverter, and each transmission gate all has the first logic control end, second
Logic control end, voltage input end and voltage output end, the first logic control end of the P transmission gate respectively with the reverse phase
The input terminal of device connects, and the second logic control end of the P transmission gate is connect with the output end of the phase inverter respectively, this P biography
The voltage input end of defeated door is respectively connected to the first predetermined level, and the voltage output end of the P transmission gate is controlled with the P second respectively
End connection processed.
In test circuit of the present invention, the logic control element includes the second logic control subelement, this
Two logic control subelements are used to be completed the second predetermined level of output to N number of second control terminal with by the switch unit
Individual channel close.
The present invention also provides a kind of liquid crystal display panel, including multiple pixel units and for testing multiple pixel unit
Test circuit, which includes: a multichannel allocation unit, a switch unit and a logic control element；The multichannel
Allocation unit has a first input end, N number of first output end and P the first control terminal, which has N number of access
And one second control terminal, wherein the N and P is positive integer；
The first input end is used to access the data voltage of test, N number of first output end respectively with N number of access
Input terminal connects correspondingly, and the output end of N number of access is connect with a pixel unit respectively；First control terminal and should
Second control terminal is connect with the logic control element respectively；
When being tested, which controls N number of access and opens, and the P the first control terminals are respectively connected to outer
The control voltage of portion's test equipment, the multichannel allocation unit select one from N number of first output end according to this P control voltage
A first output end exports the data voltage to the corresponding access, so that output is to corresponding pixel unit；It tests
Bi Hou, the logic control element export the first predetermined level to the P the first control terminals to close the multichannel allocation unit, and
The second predetermined level is exported to second control terminal to close the individual channel of the switch unit.
In liquid crystal display panel of the present invention, the multichannel allocation unit includes one first distribution subelement, M second
Subelement is distributed, which is provided with M second output terminal, M first control terminals and described first
Input terminal, the second distribution subelement have one second input terminal, L first control terminal and L first outputs
End, wherein M and L is positive integer, M*L=N, M+L=P；
Each second output terminal is connect with the second input terminal of the second distribution subelement respectively, first distribution
Subelement is selected from M second output terminal of the first distribution subelement according to the control voltage of the M the first control terminal inputs
Select a second output terminal with by the data voltage export to it is corresponding second distribution subelement the second input terminal, this second point
L first output of voltage from the second distribution subelement is controlled with what subelement was used to input according to the L the first control terminals
Select first output end exporting the data voltage to the corresponding access in end.
In liquid crystal display panel of the present invention, the first distribution subelement includes M first switch tube, the M a the
The input terminal of one switching tube is connected to a common node, and with the common node for the first input end；The M first switch
The control terminal of pipe is connect with M first control terminals correspondingly respectively, the output end of the M first switch tube respectively with
The second input terminal connection of the one second distribution subelement.
In liquid crystal display panel of the present invention, the logic control element includes the first logic control subelement and the
Two logic control subelements；
The first logic control subelement includes P transmission gate and a phase inverter, and each transmission gate all has first and patrols
Collect control terminal, the second logic control end, voltage input end and voltage output end, the first logic control end of the P transmission gate
Connect respectively with the input terminal of the phase inverter, the second logic control end of the P transmission gate respectively with the output of the phase inverter
End connection, the voltage input end of the P transmission gate are respectively connected to the first predetermined level, the voltage output end point of the P transmission gate
It is not connect with the P the second control terminals；
The second logic control subelement is for exporting the second predetermined level to N number of second control terminal with by the switch list
The individual channel of member is closed.
Liquid crystal display panel provided by the invention and test circuit are distributed the multichannel by one logic control element of setting
Each output end of unit and the individual channel of switch unit forcibly close, and avoid the adjacent signals connecting with dot structure
Occur short circuit between line, the display effect of liquid crystal display panel can be improved.
For above content of the invention can be clearer and more comprehensible, preferred embodiment is cited below particularly, and cooperate institute's accompanying drawings, makees
Detailed description are as follows.
Detailed description of the invention
Fig. 1 is the functional block diagram of the liquid crystal display panel in one embodiment of the present invention.
Fig. 2 is the structure chart of the liquid crystal display panel in embodiment illustrated in fig. 1 of the present invention.
Fig. 3 is the circuit diagram of the test circuit of the liquid crystal display panel in embodiment illustrated in fig. 1 of the present invention.
Specific embodiment
The explanation of following embodiment is to can be used to the particular implementation of implementation to illustrate the present invention with reference to additional schema
Example.The direction term that the present invention is previously mentioned, such as "upper", "lower", "front", "rear", "left", "right", "inner", "outside", " side "
Deng being only the direction with reference to annexed drawings.Therefore, the direction term used be to illustrate and understand the present invention, rather than to
The limitation present invention.
The similar unit of structure is to be given the same reference numerals in the figure.
Referring to Fig. 1, Fig. 2 and Fig. 3, in a preferred embodiment of the invention, which includes: test electricity
Road 10, driving circuit 20, dot structure 30, wherein the test circuit 10 is connect with the dot structure 30, multiple for testing
Whether the electrical property of multiple pixel units 31 of dot structure 30 is normal.The driving circuit 20 is electrically connected with the dot structure 30,
For driving multiple pixel units 31 of the dot structure 30 to work normally.
The test circuit 10 includes a multichannel allocation unit 11, a switch unit 13 and a logic control element 12.It should
Dot structure 30 includes multiple pixel units 31.The multichannel allocation unit 11 has a first input end A1, N number of first output
B1 and P the first control terminal C1 are held, which has N number of access and one second control terminal D1, wherein the N and P
It is positive integer.In the present embodiment, P=10, N=24.
Specifically, first input end A1 is used to provide device 200 with data voltage and be electrically connected, to access the number of test
According to voltage, which connect with the input terminal of N number of access of the switch unit 13 correspondingly respectively, the N
The output end of a access is connect with a pixel unit 31 respectively.The first control terminal C1 and second control terminal D1 respectively with this
Logic control element 12 connects.
When being tested, N number of access which controls the switch unit 13 is opened, the P first control
End C1 processed is respectively connected to the control voltage of external test facility 100, the multichannel allocation unit 11 according to this P control voltage from this
A first output end B1 is selected to export the data voltage to corresponding access in multiple first output end B1, to pass through
The access is exported to corresponding pixel unit 31.After being completed, which exports the first predetermined level to the P
A first control terminal C1 that is to say that any one output end of the multichannel allocation unit 11 is equal to close the multichannel allocation unit 11
Not output voltage, and the second control terminal D1 of the second predetermined level to the switch unit 13 is exported with by each of the switch unit 13
A path blockade.
Specifically, as shown in figure 3, the multichannel allocation unit 11 includes one first distribution subelement 111, M second distribution
Subelement 112.The first distribution subelement 111 is provided with M second output terminal, M the first control terminal C1 and the first input
A1 is held, which has C1 and L the first output end B1 of one second input terminal, L the first control terminals,
Wherein, M and L is positive integer, M*L=N, M+L=P.In the present embodiment, this this first distribution subelement 111 has 4 the
Two output ends, every one second distribution subelement 112 have 6 the first output end B1, that is to say L=6, and 4 second point in total
With subelement 112, therefore, a total of 24 the first output end B1, that is to say the multichannel allocation unit 11 have 24 it is first defeated
Outlet B1.
Each second output terminal of first distribution subelement 111 distributes each the second of subelement 112 with one second respectively
Input terminal connection, the first distribution subelement 111 are defeated from the M a second according to the control voltage of the M the first control terminal C1 inputs
A second output terminal is selected in outlet, which is exported to the second defeated of corresponding second distribution subelement 112
Enter end.The second distribution subelement 112 is according to the control voltage of the L the first control terminal C1 input from corresponding second distribution
Select a first output end B1 exporting the data voltage to corresponding picture in 6 the first output end B1 of subelement 112
Plain unit 31 is tested, to judge the electrical functionality of the pixel unit 31.
Wherein, this first distribution subelement 111 include M first switch tube 1111, the M first switch tube 1111 it is defeated
Enter end and be connected to a common node, and using the common node as first input end A1.The control terminal of the M first switch tube 1111
Connect correspondingly with M the first control terminal C1 respectively, the output end of the M first switch tube 1111 respectively with one second point
The second input terminal connection with subelement 112.In the present embodiment, which includes 4 first switch tubes
1111.This preferably, the switching tube be thin film transistor (TFT).
Wherein, every one second distribution subelement 112 includes L second switch 1121.One second distribution subelement 112
The input terminal of L second switch 1121 is connected to a common node, and using the common node as the second input terminal；One second
The output end for distributing the L second switch 1121 of subelement 112 is connect with an access of switch unit 13 respectively；The M the
Two distribution subelements 112 have L the first control terminal C1, every one first control terminal C1 difference in the L the first control terminal C1
It is connect with the control terminal of a second switch 1121 of every one second distribution subelement 112.The second switch 1121 is preferred
For thin film transistor (TFT).
Wherein, logic control element 12 includes the first logic control subelement 121 and the second logic control subelement
122.For controlling the multichannel allocation unit 11, which uses the first logic control subelement 121
In the on-off for controlling the switch unit 13.
The first logic control subelement 121 includes P transmission gate 1211 and a phase inverter 1212.Each transmission gate
1211 all have the first logic control end, the second logic control end, voltage input end and voltage output end, the P transmission gate
1211 the first logic control end is connect with the input terminal of the phase inverter 1212 respectively, and the second of the P transmission gate 1211 is patrolled
Volume control terminal is connect with the output end of the phase inverter 1212 respectively, and the voltage input end of the P transmission gate 1211 is respectively connected to the
One predetermined level, the voltage output end of the P transmission gate 1211 are connect with the P the second control terminal D1 respectively.This is first default
Level and the second predetermined level all can be -3.3V to -3.7V, to guarantee that each switching tube is in off state.
The second logic control subelement 122 be for providing switching voltage to the switch unit 13, test when should
Switch unit 13 is opened, and closes the switch unit 13 after being completed.
The switch unit 13 includes including P third switching tube 131.The input terminal of the P third switching tube 131 respectively with
The output end of the P second switch 1121 connects, the output end of the P switching tube respectively with a pixel list of dot structure 30
Member 31 connects.The control terminal of the P third switching tube 131 be connected to same node and with the second logic control subelement
122 connections.The third switching tube 131 is preferably thin film transistor (TFT)
From the foregoing, it will be observed that liquid crystal display panel provided by the invention and test circuit should by one logic control element of setting
The individual channel of each output end of multichannel allocation unit and switch unit forcibly closes, and avoids and connect with dot structure
Occur short circuit between adjacent signals line, the display effect of liquid crystal display panel can be improved.
Specifically, opening for circuit end by the switching tube in multichannel allocation unit and is tested by the logic control element
The each switching tube closed in unit forcibly closes, thus caused by preventing due to each switching tube electric leakage between adjacent data line
Short circuit problem.
In conclusion although the present invention has been disclosed above in the preferred embodiment, but above preferred embodiment is not to limit
The system present invention, those skilled in the art can make various changes and profit without departing from the spirit and scope of the present invention
Decorations, therefore protection scope of the present invention subjects to the scope of the claims.
Claims (7)
1. a kind of test circuit characterized by comprising a multichannel allocation unit, a switch unit and a logic control list
Member；The multichannel allocation unit has a first input end, N number of first output end and P the first control terminal, switch unit tool
There are N number of access and one second control terminal, wherein the N and P is positive integer；
The first input end is used to access the data voltage of test, N number of first output end input with N number of access respectively
The one-to-one connection in end, the output end of N number of access are connect with a pixel unit respectively；First control terminal and this second
Control terminal is connect with the logic control element respectively；
When being tested, which controls N number of access and opens, and the P the first control terminals are respectively connected to external survey
Try the control voltage of equipment, which selects one the according to this P control voltage from N number of first output end
One output end exports the data voltage to the corresponding access, so that output is to corresponding pixel unit；After being completed,
The logic control element exports the first predetermined level to the P the first control terminals to close the multichannel allocation unit, and exports
Second predetermined level is to second control terminal to close the individual channel of the switch unit；
The logic control element includes the first logic control subelement, which includes P transmission gate
And a phase inverter, each transmission gate all have the first logic control end, the second logic control end, voltage input end and voltage
First logic control end of output end, the P transmission gate is connect with the input terminal of the phase inverter respectively, the P transmission gate
Second logic control end is connect with the output end of the phase inverter respectively, and the voltage input end of the P transmission gate is respectively connected to first
Predetermined level, the voltage output end of the P transmission gate are connect with the P the first control terminals respectively；
The logic control element includes the second logic control subelement, and the second logic control subelement is for being completed
The second predetermined level is exported to second control terminal to close the individual channel of the switch unit.
2. test circuit according to claim 1, which is characterized in that the multichannel allocation unit includes one first distribution
Unit, M the second distribution subelements, the first distribution subelement are provided with M second output terminal, M first control terminals
And the first input end, the second distribution subelement have one second input terminal, L first control terminal and L
First output end, wherein M and L is positive integer, M*L=N, M+L=P；
Each second output terminal is connect with the second input terminal of the second distribution subelement respectively, and the first distribution is single
Member selects one from M second output terminal of the first distribution subelement according to the control voltage of the M the first control terminal inputs
A second output terminal is exporting the data voltage to the second input terminal of corresponding second distribution subelement, the second distribution
Unit is used for the control voltage according to the L the first control terminal inputs from L the first output ends of the second distribution subelement
Select first output end exporting the data voltage to the corresponding access.
3. test circuit according to claim 2, which is characterized in that the first distribution subelement includes M first and opens
Guan Guan, the input terminal of the M first switch tube are connected to a common node, and with the common node for the first input end；
The control terminal of the M first switch tube is connect with M first control terminals correspondingly respectively, the M first switch tube
Output end respectively with one it is described second distribution subelement the second input terminal connect.
4. test circuit according to claim 3, which is characterized in that the second distribution subelement includes L second and opens
Guan Guan；
The M second distribution subelement has L the first control terminals, every one first control terminal point in the L the first control terminals
It is not connect with the control terminal of a second switch of every one second distribution subelement.
5. a kind of liquid crystal display panel, which is characterized in that the survey including multiple pixel units and for testing multiple pixel unit
Circuit is tried, which includes: a multichannel allocation unit, a switch unit and a logic control element；Multichannel distribution
Unit has a first input end, N number of first output end and P the first control terminals, the switch unit have N number of access and
One second control terminal, wherein the N and P is positive integer；
The first input end is used to access the data voltage of test, N number of first output end input with N number of access respectively
The one-to-one connection in end, the output end of N number of access are connect with a pixel unit respectively；First control terminal and this second
Control terminal is connect with the logic control element respectively；
When being tested, which controls N number of access and opens, and the P the first control terminals are respectively connected to external survey
Try the control voltage of equipment, which selects one the according to this P control voltage from N number of first output end
One output end exports the data voltage to the corresponding access, so that output is to corresponding pixel unit；After being completed,
The logic control element exports the first predetermined level to the P the first control terminals to close the multichannel allocation unit, and exports
Second predetermined level is to second control terminal to close the individual channel of the switch unit；
The logic control element includes the first logic control subelement and the second logic control subelement；
The first logic control subelement includes P transmission gate and a phase inverter, and each transmission gate all has the first logic control
End, the second logic control end, voltage input end and voltage output end processed, the first logic control end of the P transmission gate are divided equally
It is not connect with the input terminal of the phase inverter, the second logic control end of the P transmission gate connects with the output end of the phase inverter respectively
Connect, the voltage input end of the P transmission gate is respectively connected to the first predetermined level, the voltage output end of the P transmission gate respectively with
The P the second control terminal connections；
The second logic control subelement is for exporting the second predetermined level to N number of second control terminal with by the switch unit
Individual channel is closed.
6. liquid crystal display panel according to claim 5, which is characterized in that the multichannel allocation unit includes one first distribution
Unit, M the second distribution subelements, the first distribution subelement are provided with M second output terminal, M first control terminals
And the first input end, the second distribution subelement have one second input terminal, L first control terminal and L
First output end, wherein M and L is positive integer, M*L=N, M+L=P；
Each second output terminal is connect with the second input terminal of the second distribution subelement respectively, and the first distribution is single
Member selects one from M second output terminal of the first distribution subelement according to the control voltage of the M the first control terminal inputs
A second output terminal is exporting the data voltage to the second input terminal of corresponding second distribution subelement, the second distribution
Unit is used for the control voltage according to the L the first control terminal inputs from L the first output ends of the second distribution subelement
Select first output end exporting the data voltage to the corresponding access.
7. liquid crystal display panel according to claim 6, which is characterized in that the first distribution subelement includes M first and opens
Guan Guan, the input terminal of the M first switch tube are connected to a common node, and with the common node for the first input end；
The control terminal of the M first switch tube is connect with M first control terminals correspondingly respectively, the M first switch tube
Output end respectively with one it is described second distribution subelement the second input terminal connect.
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| CN201610648332.XA CN106057111B (en) | 2016-08-09 | 2016-08-09 | Test circuit and liquid crystal display panel |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI742846B (en) | 2020-09-03 | 2021-10-11 | 大陸商業成科技（成都）有限公司 | Array substrate and display panel |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107024785B (en) * | 2017-04-21 | 2020-06-05 | 武汉华星光电技术有限公司 | Lighting fixture and lighting test method for display panel |
| US10290247B2 (en) | 2017-04-21 | 2019-05-14 | Wuhan China Star Optoelectronics Technology Co., Ltd | Lighting jig of display panel and lighting test method |
| CN107316596B (en) * | 2017-07-24 | 2019-10-25 | 武汉华星光电技术有限公司 | Array substrate tests circuit |
| US10497294B2 (en) | 2017-07-24 | 2019-12-03 | Wuhan China Star Optoelectronics Technology Co., Ltd. | Array test circuit |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101458405A (en) * | 2007-12-12 | 2009-06-17 | 群康科技(深圳)有限公司 | Liquid crystal display panel and test method thereof |
| CN102968946A (en) * | 2012-08-23 | 2013-03-13 | 友达光电股份有限公司 | Detection circuit of display panel |
| CN103345914A (en) * | 2013-07-19 | 2013-10-09 | 深圳市华星光电技术有限公司 | Detection circuit for display panel |
| CN105807518A (en) * | 2016-05-19 | 2016-07-27 | 武汉华星光电技术有限公司 | Liquid crystal display panel |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100924143B1 (en) * | 2008-04-02 | 2009-10-28 | 삼성모바일디스플레이주식회사 | Flat Panel Display and Driving Method |
| KR101943069B1 (en) * | 2011-12-01 | 2019-04-18 | 삼성디스플레이 주식회사 | Detecting method of defects of line and demultiplexer, defect detecting device, and display panel comprising the defect detecting device |
| CN104992651B (en) * | 2015-07-24 | 2018-09-07 | 上海和辉光电有限公司 | A kind of AMOLED panel test circuit |
| CN105810136B (en) * | 2016-05-23 | 2019-04-02 | 武汉华星光电技术有限公司 | Array substrate tests circuit, display panel and flat display apparatus |
-
2016
- 2016-08-09 CN CN201610648332.XA patent/CN106057111B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101458405A (en) * | 2007-12-12 | 2009-06-17 | 群康科技(深圳)有限公司 | Liquid crystal display panel and test method thereof |
| CN102968946A (en) * | 2012-08-23 | 2013-03-13 | 友达光电股份有限公司 | Detection circuit of display panel |
| CN103345914A (en) * | 2013-07-19 | 2013-10-09 | 深圳市华星光电技术有限公司 | Detection circuit for display panel |
| CN105807518A (en) * | 2016-05-19 | 2016-07-27 | 武汉华星光电技术有限公司 | Liquid crystal display panel |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI742846B (en) | 2020-09-03 | 2021-10-11 | 大陸商業成科技（成都）有限公司 | Array substrate and display panel |
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