CN106026955A - Multistage harmonic control high-efficiency monolithic microwave integrated power amplification matching circuit - Google Patents

Abstract

The invention discloses a matching circuit for a multi-stage harmonic control high-efficiency microwave monolithic integrated power amplifier. The power amplifier matching circuit includes a third-level output matching circuit, a second-level and third-level matching circuit, a first-level and second-level matching circuit, and a first-level input matching circuit; each level of matching circuit includes a second harmonic impedance matching circuit; the said The second harmonic impedance matching circuit mainly adopts the parallel structure of inductance and resistance, and only the third-stage output circuit adopts the structure of parallel inductance to ground. The second harmonic matching circuit of the present invention can effectively control waveform overlapping, reduce circuit loss, reduce the space of the power amplifier matching circuit, and improve power amplifier efficiency.

Description

A Matching Circuit for High Efficiency Microwave Monolithic Integrated Power Amplifier with Multi-level Harmonic Control

technical field

The present invention relates to the technical field of harmonic control, in particular to a method for realizing a multi-stage harmonic control high-efficiency microwave monolithic integrated circuit (Monolithic Microwave Integrated Circuit: MMIC) power amplifier matching circuit.

Background technique

The improvement of power amplifier efficiency is of great significance to the improvement of communication system performance. As a technology to effectively improve the efficiency of power amplifiers, the application of harmonic control in power amplifiers has been frequently reported in recent years. Related harmonic control structures have also sprung up in power amplifier circuits. The harmonic control structure is not only applied to single-stage power amplifiers, but also the application of harmonic control structures to multi-stage power amplifiers has been reported.

In order to achieve high efficiency, in the prior art, in the Institute of Electrical and Electronics Engineers (IEEE) Microwave and Wireless Components Letters 2015, pages 133 to 135, it is proposed to adopt a bow-tie harmonic control structure at the output stage of a single-stage power amplifier, The third harmonic stop band is formed. At the same time, for the second harmonic, a quarter-wavelength transmission line structure is connected in series between the drain feed network and the drain port of the tube, so that the second impedance is approximately short-circuited, and the third impedance is approximately open, realizing the output circuit. A technique for controlling harmonics in Although bow-tie and transmission line structures can effectively control harmonics, they require a large space; Microwave and Wireless Components Letters 2016, pages 137 to 139, propose a single-stage harmonic control at the output stage For power amplifiers, in order to achieve harmonic control, four open-circuit branches are connected in parallel between the drain feed network and the drain port of the tube, and impedance transformation lines are connected in series between the branches; the European Microwave Integrated Circuit Conference 2011 proposed that the input and output of a single-stage power amplifier At the same time, the parallel open-circuit stub structure is used to realize the second harmonic control; although the parallel open-circuit stub harmonic matching circuit adopted in the Microwave and Wireless Component Letters 2016, pages 137 to 139 and the European Microwave Integrated Circuit Conference 2011 is currently the most commonly used structure, but because of the transmission line structure, such a matching circuit has a narrow frequency band, and at the same time the transmission line used is longer and needs to occupy more space; Microwave and Wireless Components Letters 2014, pages 185 to 187 use parallel capacitors to The ground structure realizes the second harmonic control with a wide frequency band. The above harmonic control matching structures are implemented in a Hybrid Microwave Integrated Circuit (HMIC), which has a large space and is easy to implement. However, achieving high efficiency, high power and small size at the same time is the goal of power amplifier designers, that is, to achieve harmonic control of multi-stage power amplifiers in MMICs that are much smaller than HMICs. Electronic Express 2016, pages 219 to 221 propose a multi-stage MMIC power amplifier for harmonic control of the final stage, using impedance transformation lines, parallel inductors and series switched capacitor structures to achieve harmonic control, but this power amplifier only realizes Harmonic tuning of the final stage. Although the harmonic control of the final stage is realized on a single chip, the harmonic matching structure is complex and requires more matching components, which cannot be used in the pre-stage drive circuit; Sun Huan, Ou Rongde, Xu Ruimin, etc. in 2015 The harmonic control technology of multi-level MMIC power amplifier was proposed in the National Microwave and Millimeter Wave Conference, but the specific implementation structure and method of the harmonic matching circuit were not described in the paper.

Contents of the invention

The purpose of the present invention is to provide a multi-stage harmonic control high-efficiency MMIC power amplifier matching circuit. In order to realize harmonic control in multi-stage MMIC power amplifiers, a simple resistance-inductance (RL) parallel structure is proposed for inter-stage and input The second harmonic impedance of the stage is optimally matched, and the RL structure is embedded in the feed network between the stages to effectively reduce the area, and the circuit loss is greatly reduced after the harmonic is controlled, which improves the efficiency of the power amplifier matching circuit. Simultaneously, the parallel inductance is adopted for the output stage, and the loss introduced by the structure of the present invention is relatively small for the fundamental wave, effectively realizing the harmonic control technology of the multi-stage power amplifier. Among them, the RL parallel structure is applied in the input matching circuit, the matching circuit between the first and second stages, and the matching circuit between the second and third stages, which proves the flexibility of this structure, the flexibility of occupying space and the flexibility of harmonic matching. It is very suitable in Harmonic control for use in multi-stage MMIC power amplifiers.

To achieve the above object, the present invention provides the following scheme:

A matching circuit for a multi-level harmonic control high-efficiency microwave single-chip integrated power amplifier, the matching circuit includes a first-level input matching circuit, a first-level and second-level matching circuit, a second-level and third-level matching circuit, and a third-level output matching circuit ;

The first-level input matching circuit includes a first-level transistor gate feed network, a first-level fundamental wave impedance matching circuit, and a second harmonic impedance matching circuit;

The first-stage inter-stage matching circuit includes a first-stage transistor drain feed network, a first-stage inter-stage fundamental wave impedance matching circuit, a second harmonic impedance matching circuit, and a second-stage transistor gate feed network;

The matching circuit between the second and third stages includes a second-stage transistor drain feed network, a fundamental wave impedance matching circuit between the second and third stages, a second harmonic matching circuit, and a third-stage transistor gate feed network;

The second harmonic impedance matching circuit includes an inductor and a resistor, and the inductor and the resistor are connected in parallel (parallel RL).

The third-stage output matching circuit includes a third-stage transistor drain feed network, a fundamental wave and a harmonic impedance matching circuit;

The third-level second harmonic matching circuit in the third-level output matching circuit adopts an inductance grounding structure, and the inductance is connected in parallel between the microstrip line and the DC blocking capacitor.

Optionally, in the first-stage input matching circuit, one end of the parallel RL second harmonic impedance matching circuit is connected to the gate of the first-stage transistor, and the other end is grounded.

Optionally, in the first-stage inter-stage matching circuit, the parallel RL second harmonic impedance matching circuit is embedded in the second-stage transistor gate feed network, and one end is connected to the second-stage transistor gate A DC bias port, the other end is connected to the gate of the second-stage transistor. The second-stage transistor gate feed network acts on four transistors in total, so there are four parallel RL second harmonic impedance matching structures in the first-stage inter-stage matching circuit.

Optionally, in the matching circuit between the second and third stages, two parallel RL structures are connected in series to form a set of second harmonic impedance matching circuits embedded in the gate feed network of the third-stage transistors, which jointly act on One transistor, the gate feed network of the third-level transistor acts on 8 transistors in total, so there are eight sets of second harmonic matching circuits in total, that is, 16 parallel RL structures, and the parallel RL structures are embedded in the feed network wherein, the two ends of each group of second harmonic impedance matching circuits are connected to the capacitance connected in parallel to the ground in the gate feed network of the third-stage transistor, and the middle tap is connected to the gate of the third-stage transistor.

Optionally, in the third-stage output matching circuit, the inductor uses a spiral inductor to perform impedance matching on the second harmonic, and one end is grounded and the other end is connected to the output port.

According to the specific embodiments provided by the present invention, the present invention discloses the following technical effects: the second harmonic matching circuit in the present invention does not adopt the traditional transmission line structure that takes up a large space, but adopts a new parallel RL structure. After choosing the structure of the inductor, the harmonic control in the MMIC power amplifier is carried out in a small space. At the same time, the parallel RL structure is effectively applied in the input stage and the matching circuit between stages, which has strong flexibility and is suitable for use in multi-stage power amplifiers. The parallel RL structure is combined with the feed network, and the dual-purpose concept of one channel further reduces the power amplifier space. And this simple RL parallel structure can well control the second harmonic, and the loss of the circuit is reduced after the second harmonic is controlled. Thereby achieving high efficiency of the power amplifier.

Description of drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the accompanying drawings required in the embodiments. Obviously, the accompanying drawings in the following description are only some of the present invention. Embodiments, for those of ordinary skill in the art, other drawings can also be obtained according to these drawings without paying creative labor.

FIG. 1 is a load-pull diagram of high electron mobility transistors at various levels in an embodiment of the present application;

Fig. 2 is the multistage power amplifier MMIC power amplifier matching circuit diagram of the embodiment of the present application;

Fig. 3 (a) is the composition unit diagram of the first stage input matching circuit of the embodiment of the present application;

Fig. 3 (b) is the complete layout of the first stage input matching circuit of the embodiment of the present application;

Fig. 4 (a) is the composition unit diagram of the matching circuit between the first and second stages of the embodiment of the present application;

Fig. 4 (b) is the complete layout of the matching circuit between the first and second stages of the embodiment of the present application;

Fig. 5 (a) is the composition unit diagram of the matching circuit between the second and third stages of the embodiment of the present application;

Fig. 5 (b) is the complete layout of the matching circuit between the second and third stages of the embodiment of the present application;

Fig. 6 (a) is the composition unit diagram of the third stage output matching circuit of the embodiment of the present application;

FIG. 6( b ) is a complete layout of the third-stage output matching circuit of the embodiment of the present application.

detailed description

The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

The purpose of the present invention is to provide a multi-level harmonic control high-efficiency MMIC power amplifier matching circuit. The parallel RL structure can reduce the space of the power amplifier matching circuit, and effectively control the second harmonic, thereby reducing the consumption of the circuit and realizing the power amplifier matching circuit. efficient.

In order to make the above objects, features and advantages of the present invention more comprehensible, the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

After the fundamental wave source/load pull is performed on the high electron mobility transistors at all levels, the second harmonic load pull is performed on the high electron mobility transistors at all levels, and the load pull results of the second harmonic are obtained, as shown in the figure 1 is the load-pull diagram of high electron mobility transistors at various levels in the embodiment of the present application, as shown in FIG. 1 , it can be seen from FIG. 1 that the best impedance matching point of the second harmonic of each level is located at the edge of the impedance circle diagram, such Impedance matching is more difficult. Therefore, the present invention uses parallel inductors to ground in the output circuit, and uses RL parallel structures between stages and the input stage to pull the second harmonic impedance to the edge of the corresponding impedance circle diagram to achieve matching.

Fig. 2 is the multistage power amplifier MMIC power amplifier matching circuit diagram of the embodiment of the present application, as shown in Fig. 2, a kind of multistage harmonic control high-efficiency monolithic microwave integrated circuit power amplifier matching circuit includes the first stage input matching circuit 104, one and two An inter-stage matching circuit 103 , a second- and third-stage inter-stage matching circuit 102 , and a third-stage output matching circuit 101 .

FIG. 3( a ) is a diagram of the constituent units of the first-stage input matching circuit of the embodiment of the present application. The first-stage input matching circuit 104 is composed of two constituent units with the same structure. As shown in Figure 3 (a), the constituent unit diagram of the first-stage input matching circuit 104 includes a first-stage transistor gate feed network 1042, a second harmonic impedance matching circuit 105, a first-stage fundamental wave impedance matching circuit 1041. Fig. 3 (b) is the complete layout of the first-stage input matching circuit of the embodiment of the present application. The design of the second harmonic impedance matching circuit 105 adopts the RL structure, as shown in the black dashed box in Fig. 3 (b), parallel RL The occupied area is 0.4*0.2mm ² . For the first-stage fundamental wave impedance matching circuit 1041, a resistor-capacitor (RC) structure and a short-circuit stub are used to convert the fundamental wave impedance to 50Ω and ensure the stability of the amplifier.

Wherein, the gate feed network 1042 of the first-stage transistor is divided into two symmetrical parts, left and right. The gate DC feed port Vg ₁ of the transistor on the left is connected to one end of the resistor R ₁ , and the other end of the resistor R ₁ is connected to the micro One end of the strip line TL ₁ is connected to one end of the capacitor C ₁ , and the other end of the capacitor C ₁ is grounded; the other end of the microstrip line TL ₁ is connected to the microstrip line TL ₂ and one end of the capacitor C ₂ at the same time, and the other end of the capacitor C ₂ One end is grounded; the other end of the microstrip line TL ₂ is connected to the gate of the transistor, one end of the capacitor C ₅ , and one end of the second harmonic impedance matching circuit, and the other end of the second harmonic impedance matching circuit is connected to the ground; The gate DC feed port Vg ₂ of some transistors is connected to one end of the resistor R ₂ , and the other end of the resistor R ₂ is connected to one end of the microstrip line TL ₃ and one end of the capacitor C ₃ at the same time, and the other end of the capacitor C ₃ is grounded; The other end of the strip line TL ₃ is connected to the microstrip line TL ₄ and one end of the capacitor C ₄ at the same time, and the other end of the capacitor C ₄ is grounded; the other end of the microstrip line TL ₄ is connected to the gate of the transistor, one end of the capacitor C ₅ , One end of the second harmonic impedance matching circuit is connected, and the other end of the second harmonic impedance matching circuit is connected to ground; the other end of the capacitor _C5 is connected to the first-stage fundamental wave impedance matching circuit.

The second harmonic impedance matching circuit includes a resistor R ₃ and an inductor L ₁ , and the resistor R ₃ and the inductor L ₁ are connected in parallel to ground (parallel connection RL).

In the first-stage fundamental wave impedance matching circuit 1041, one end of the microstrip line TL ₅ is grounded, and the other end of the microstrip line TL ₅ is respectively connected to one end of the capacitor C ₅ and one end of the parallel resistor R ₄ capacitor C ₆ , and the parallel resistor The other end of R ₄ capacitor C ₆ is connected to the input end.

FIG. 4( a ) is a diagram of the constituent units of the first-stage inter-stage matching circuit 103 of the embodiment of the present application. The first-stage inter-stage matching circuit 103 is composed of two constituent units with the same structure. As shown in Figure 4 (a), the constituent unit diagram of the first-level inter-level matching circuit 103 includes a first-level transistor drain feed network 1043, a second harmonic impedance matching circuit 106, a second harmonic impedance matching circuit 107 . The fundamental wave impedance matching circuit 1031 between the first and second stages, and the gate feeding network 1022 of the transistors of the second stage. In the constituent units of the first-level inter-level matching circuit 103, the second harmonic impedance matching circuit is embedded in the second-level transistor gate feed network, one end is connected to the DC bias port of the second-level transistor gate, and the other One end is connected to the port of the gate of the second-stage transistor. The RL parallel structure is used to pull the second harmonic impedance to the edge of the circular diagram (such as the Marker point in FIG. 1( a )), and also serves as a part of the second-stage transistor gate feed network 1022 . The fundamental wave impedance matching circuit uses the series capacitance and the grounding resistance to realize the fundamental wave conjugate impedance matching. Figure 4(b) is the complete layout of the first-level and second-level matching circuit of the embodiment of the present application. The specific second harmonic matching structure is shown in the circuit inside the black dotted box in Figure 4(b), and the area occupied by the parallel RL is only It is 0.11*0.1mm ² . The second harmonic is controlled, thereby improving the efficiency of the power amplifier matching circuit.

Wherein, the second-stage transistor gate feed network 1022 is similar to the first-stage transistor gate feed network 1042, and is divided into two symmetrical parts. One end of the left part second harmonic impedance matching circuit 106 is connected to the transistor gate The pole DC feed port Vg ₃ is connected to the capacitor C ₇ , the other end of the capacitor C ₇ is grounded, the other end of the second harmonic impedance matching circuit 106 is connected to the resistor R ₅ , and one end of the right part of the second harmonic impedance matching circuit 107 It is connected to the transistor gate DC feed port Vg ₄ and the capacitor C ₉ , the other end of the capacitor C ₉ is grounded, and the other end of the second harmonic impedance matching circuit 107 is connected to the resistor R ₅ .

One end of the capacitor C ₁₀ in the primary-secondary fundamental wave impedance matching circuit is connected to the resistor R ₆ and the microstrip line TL ₇ , and the other end of the resistor R ₆ is grounded. One end of the capacitor C8 is connected to the resistor _R8 and the _microstrip line _TL6 , and the other end of the resistor _R8 is grounded.

One end of the microstrip line _TL8 in the first-stage transistor drain feed network 1043 is connected to the capacitor _C11 and the resistor _R7 , the other end of the microstrip line _TL8 is connected to the DC blocking capacitor _C13 , and the resistor _R7 It is connected to the transistor drain DC feed port _Vd1 and the capacitor C12, the other end _of the capacitor _C11 is grounded, and the other end _of the capacitor C12 is grounded.

FIG. 5( a ) is a diagram of the constituent units of the second and third stage matching circuits according to the embodiment of the present application. The second and third stage matching circuits 102 are composed of four constituent units with the same structure. As shown in Figure 5(a), the composition unit diagram of the second and third stage matching circuit 102 includes the third stage transistor gate feed network 1013, the second and third stage fundamental wave impedance matching circuit 1021, the second harmonic matching circuit, the second stage transistor drain feed network 1023 . In the constituent units of the second and third stage matching circuits 102, two parallel RL structures are connected in series to form a group of second harmonic impedance matching circuits, which work together on one transistor. The third-level grid feed network 1013 acts on two transistors in total, and there are four sets of second harmonic impedance matching circuits in total. Wherein, one end of the second harmonic matching circuit in series is connected to the DC feed port of the gate of the third-stage transistor, and the other end is connected to the gate of the third-stage transistor, serving as a part of the third-stage transistor feed network 1013 . Figure 5(b) is the complete layout of the matching circuit between the second and third stages of the embodiment of the present application. The specific second harmonic matching structure is shown in the black dashed box in Figure 5(b), and the area occupied by the parallel RL is only 0.2* 0.28mm ² . Such a dual-use method saves area very well, and controls the second harmonic, thereby improving the efficiency of the power amplifier matching circuit.

Wherein, the third-stage transistor grid feed network 1013 is divided into two symmetrical parts, one end of the first second harmonic impedance matching circuit 108 in the left part is respectively connected to the gate DC feed port Vg ₅ Connect with capacitor C ₁₄ , one end of the second second harmonic impedance matching circuit 109 is connected with one end of the fourth second harmonic impedance matching circuit 111, on the right part, the third second harmonic impedance matching circuit 110 One end of the gate DC feed port Vg ₆ and capacitor C ₁₅ are respectively connected, and the other end of the fourth second harmonic impedance matching circuit 111 is connected to the other end of the third second harmonic impedance matching circuit 110 .

In the second-to-third-stage fundamental wave impedance matching circuit 1021, one end of the microstrip line _TL9 is connected to the gate of the transistor, and the other end is respectively connected to one end of the capacitor _C16 and one end of the capacitor _C17 , and the other end of the capacitor _C16 One end is grounded, the other end of the capacitor C ₁₇ is connected to one end of the microstrip line TL ₁₀ and one end of the microstrip line TL ₂₂ , and the other end of the microstrip line TL ₂₂ is respectively connected to the microstrip line TL ₁₉ and one end of the DC blocking capacitor C ₁₉ The other end of the microstrip line TL ₁₀ is grounded. One end of the microstrip line TL ₂₁ is connected to the gate of the transistor, the other end is connected to one end of the capacitor C ₂₅ and one end of the capacitor C ₂₆ respectively, the other end of the capacitor C ₂₅ is grounded, and the other end of the capacitor C ₂₆ is respectively connected to the microstrip line One end of the TL ₂₀ is connected to one end of the microstrip line TL ₁₉ , and the other end of the microstrip line TL ₂₀ is grounded.

In the _second -stage transistor drain feed network 1023, one end of the microstrip line TL11 is connected to the capacitor _C18 and the transistor drain DC bias circuit _Vd2 , and the other end of the microstrip line _TL11 is connected to the transistor drain and The other end of the DC blocking capacitor _C19 is connected.

FIG. 6( a ) is a unit diagram of the third-level output matching circuit of the embodiment of the present application. The third-level output matching circuit 101 is composed of two units with the same structure. As shown in FIG. 6( a ), the constituent unit diagram of the third-stage output matching circuit 101 includes a fundamental and harmonic impedance matching circuit 1011 , and a third-stage transistor drain feed network 1012 . In the third-stage output matching circuit 101, the fundamental wave and harmonic impedance matching circuit 1011 uses grounded capacitors to filter frequencies above the second harmonic, and uses capacitors and transmission lines to achieve conjugate matching of the fundamental wave impedance, and the inductors are connected in parallel to the ground Match the second harmonic impedance to the edge of the impedance circle diagram (as shown in Figure 1 (c) Marker point), Figure 6 (b) is the complete layout of the third-stage output matching circuit of the embodiment of the present application, Figure 6 (b) The circuit inside the middle black dotted line box is the shunt inductor controlling the second harmonic, occupying an area of only 0.34*0.4mm ² .

Wherein, the fundamental wave and harmonic impedance matching circuit 1011 has three microstrip lines, one end of the microstrip line TL ₁₂ is connected to the capacitor C ₂₁ and the microstrip line TL ₁₃ respectively, and the other end is respectively connected to the capacitor C ₂₀ and the inductance L ₂ , the other end of the inductance L ₂ is grounded, the other end of the microstrip line TL ₁₃ is respectively connected to the microstrip line TL ₁₄ and the capacitor C ₂₂ , the other end of the capacitor C ₂₂ is grounded, and the other end of the microstrip line TL ₁₄ is respectively connected to the _The microstrip line _TL15 and the microstrip line TL16 in the third-stage transistor drain feed network are connected.

The third-stage transistor drain feed network 1012 is divided into two symmetrical parts, one end of the microstrip line TL ₁₅ is respectively connected to one end of the microstrip line TL ₁₆ and the microstrip line TL ₁₄ , and the end of the microstrip line TL ₁₅ The other end is respectively connected with the drain of the transistor and one end of the microstrip line TL ₁₈ , the other end of the TL ₁₆ is respectively connected with one end of the microstrip line TL ₁₇ and another transistor drain, and the other end of the microstrip line TL ₁₇ is connected with the transistor The drain DC feed port Vd ₃ is connected to the capacitor C ₂₃ , the other end of the capacitor C ₂₃ is grounded, the other end of the microstrip line TL ₁₈ is connected to the transistor drain DC feed port Vd ₄ and the capacitor C ₂₄ , and the capacitor C ₂₄ The other end is grounded.

From the above second harmonic matching circuit, it can be found that the space occupied by the RL parallel structure of each stage is very small. The superiority of the RL parallel structure is reflected here. In the second harmonic matching circuit, the inductance plays a key role in the matching of all levels. For the selection of the inductance structure, the available space of the chip and the inductance value required in the circuit should be considered comprehensively to select the type and shape of the inductance. In the embodiment of the present invention, the inductance adopts the inductance formed by spiral inductors and thin strips.

Each embodiment in this specification is described in a progressive manner, each embodiment focuses on the difference from other embodiments, and the same and similar parts of each embodiment can be referred to each other.

In this paper, specific examples have been used to illustrate the principle and implementation of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea; meanwhile, for those of ordinary skill in the art, according to the present invention Thoughts, there will be changes in specific implementation methods and application ranges. In summary, the contents of this specification should not be construed as limiting the present invention.

Claims (5)

1. a kind of matching circuit of multistage harmonic control high-efficiency microwave monolithic integrated power amplifier, it is characterized in that, described matching circuit comprises the first stage input matching circuit, one and two between matching circuits, two and three between matching circuits, The third stage output matching circuit; The first-level input matching circuit includes a first-level transistor gate feed network, a first-level fundamental wave impedance matching circuit, and a second harmonic impedance matching circuit; The first-stage inter-stage matching circuit includes a first-stage transistor drain feed network, a first-stage inter-stage fundamental wave impedance matching circuit, a second harmonic impedance matching circuit, and a second-stage transistor gate feed network; The matching circuit between the second and third stages includes a second-stage transistor drain feed network, a fundamental wave impedance matching circuit between the second and third stages, a second harmonic matching circuit, and a third-stage transistor gate feed network; The second harmonic impedance matching circuit includes an inductor and a resistor, and the inductor and the resistor are connected in parallel (parallel RL). The third-stage output matching circuit includes a third-stage transistor drain feed network, a fundamental wave and a harmonic impedance matching circuit; The third-level second harmonic matching circuit in the third-level output matching circuit adopts an inductance grounding structure, and the inductance is connected in parallel between the microstrip line and the DC blocking capacitor. 2. A kind of multi-stage harmonic control high-efficiency microwave monolithic integrated power amplifier matching circuit according to claim 1, characterized in that, in the first stage input matching circuit, the parallel RL second harmonic impedance matching circuit One end is connected to the gate of the first-stage transistor, and the other end is grounded. 3. a kind of multistage harmonic control high-efficiency microwave monolithic integrated power amplifier matching circuit according to claim 1, is characterized in that, in described one-stage two-stage matching circuit, The parallel RL second harmonic impedance matching circuit is embedded in the second-stage transistor gate feed network, one end is connected to the DC bias port of the second-stage transistor gate, and the other end is connected to the second-stage transistor gate grid. The second-stage transistor gate feed network acts on four transistors in total, so there are four parallel RL second harmonic impedance matching structures in the first-stage inter-stage matching circuit. 4. a kind of multistage harmonic control high-efficiency microwave monolithic integrated power amplifier matching circuit according to claim 1 is characterized in that, in the matching circuit between two and three stages, two parallel RL structures are connected in series to form a A group of second harmonic impedance matching circuits are embedded in the third-stage transistor gate feed network, and act together on one transistor, and the third-stage transistor gate feed network acts on 8 transistors in total, so there are a total of Eight groups of second harmonic matching circuits, that is, 16 parallel RL structures, the parallel RL structures are embedded in the feed network, and the two ends of each group of second harmonic impedance matching circuits are connected to the gate feed of the third-stage transistor The capacitor connected in parallel to the ground in the network, and the center tap is connected to the gate of the third-stage transistor. 5. a kind of multistage harmonic control high-efficiency microwave monolithic integrated power amplifier matching circuit according to claim 1 is characterized in that, in the described third stage output matching circuit, described inductance adopts spiral inductance pair two Impedance matching is performed on the subharmonic, and one end is grounded and the other end is connected to the output port.