CN105974301A - Chip testing system - Google Patents
Chip testing system Download PDFInfo
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- CN105974301A CN105974301A CN201610494850.0A CN201610494850A CN105974301A CN 105974301 A CN105974301 A CN 105974301A CN 201610494850 A CN201610494850 A CN 201610494850A CN 105974301 A CN105974301 A CN 105974301A
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- 238000012360 testing method Methods 0.000 title claims abstract description 62
- 238000001514 detection method Methods 0.000 claims abstract description 46
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims description 41
- 238000005259 measurement Methods 0.000 claims description 10
- 238000010586 diagram Methods 0.000 description 8
- 101710082795 30S ribosomal protein S17, chloroplastic Proteins 0.000 description 2
- 238000004088 simulation Methods 0.000 description 2
- 239000004615 ingredient Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
Classifications
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2855—Environmental, reliability or burn-in testing
- G01R31/2856—Internal circuit aspects, e.g. built-in test features; Test chips; Measuring material aspects, e.g. electro migration [EM]
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2894—Aspects of quality control [QC]
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- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Environmental & Geological Engineering (AREA)
- Monitoring And Testing Of Transmission In General (AREA)
Abstract
The invention relates to a chip testing system, and the system is used for testing an S parameter of a chip. The system comprises a radio frequency generation module, an RF power detection module, a DC voltage reading module. The radio frequency generation module is used for generating a radio frequency signal for testing the chip. The RF power detection module is used for converting an RF signal generated by the chip into a DC voltage. The DC voltage reading module is used for reading the DC voltage generated by the RF power detection module, and converting the DC voltage into the S parameter. The system can achieve the low-cost testing of the chip.
Description
Technical field
The present invention relates to the test system (including but not limited to LNA, PA, switch) of all chips comprising S parameter in volume production is tested.
Background technology
Comprise the chip of S parameter, such as during the test of LNA chip volume production, need test to open short circuit, cut-off current, operating current and S parameter.Test S parameter needs to use radio frequency special test equipment, and model is Credence PAX, Advantest V93000 etc..Test S parameter needs the radio frequency special test equipment rent used expensive, and the generally the least expensive unit type of current rent of machine is Credence PAX, but hour rent is also up to $ 40.00.Additionally, PAX equipment recoverable amount is few, volume production needed to queue up in rush season on the device, production capacity critical constraints.
Summary of the invention
In order to solve above-mentioned technical problem, one aspect of the present invention provides a kind of chip test system, this system is for testing the S parameter of chip, this system includes radiofrequency signal generation module, RF power detection module, DC voltage read module, described radiofrequency signal generation module is for producing the radiofrequency signal of chip testing, described RF power detection module is for being converted to DC voltage by the RF signal that chip produces, described DC voltage read module is for reading the DC voltage that RF power detection module produces, and DC voltage is scaled S parameter.
Described radiofrequency signal generation module includes agitator and the attenuator being connected with oscillator output end.
Described radiofrequency signal generation module includes agitator and is connected several attenuator with oscillator output end, and described several attenuators are connected in series.
The quantity of described attenuator is 2.
Described attenuator is the adjustable attenuator of pad value, and described attenuator regulates pad value by adjusting part.
Described agitator is that output frequency is adjustable, the high frequency voltage controlled oscillator of output+7.0dbm.
Described attenuator is power 0-31.5dB adjustable, the digital pad of stepping 0.5dB of decay.
Described RF power detection module is to carry out 50MHz to the 3GHz monolithic RF power detector of RF signal measurement in a 60dB dynamic range.
A kind of chip test circuit, this circuit includes chip, radiofrequency signal generation module, RF power detection module, radiofrequency signal generation module is connected with the RF input port of chip, described RF power detection module is connected with the RF output port of chip, described radiofrequency signal generation module is for producing the radiofrequency signal of chip testing, and described RF power detection module is for being converted to DC voltage by the RF signal that chip produces.
Described radiofrequency signal generation module includes agitator and the attenuator being connected with oscillator output end.
The present invention is capable of the chip testing of low cost.
It is more readily understood the above-mentioned of the application and other features, aspect and advantage with reference to described further below.
Accompanying drawing explanation
Fig. 1 is the module diagram of chip test system.
Fig. 2 is a kind of module diagram of chip test system.
Fig. 3 is the another kind of module diagram of chip test system.
Fig. 4 is the JTOS-1750+ high frequency voltage controlled oscillator circuit diagram of Mini-Circuits company.
The RFSA2614 digital pad chip circuit figure of the RFMD company that Fig. 5 is.
Fig. 6 is the circuit diagram of GPS-LNA chip AW5005DNR to be measured and 50MHz to 3GHz monolithic RF power detector LT5534.
Fig. 7 is the schematic diagram of chip test circuit.
Fig. 8 is a kind of schematic diagram of chip test circuit.
Fig. 9 is the another kind of schematic diagram of chip test circuit.
Detailed description of the invention
For making the purpose of the embodiment of the present invention, technical scheme and advantage clearer, below in conjunction with the accompanying drawing of the embodiment of the present invention, the technical scheme of the embodiment of the present invention is clearly and completely described.Obviously, described embodiment is a part of embodiment of the present invention rather than whole embodiments.Based on described embodiments of the invention, all other embodiments that those of ordinary skill in the art are obtained on the premise of without creative work, broadly fall into the scope of protection of the invention.
Unless otherwise defined, technical term used herein or scientific terminology have the ordinary meaning that the personage of general technical ability is understood in shoulding be art of the present invention." first ", " second " and the similar word that use in present patent application description and claims are not offered as any order, quantity or importance, and are used only to distinguish different ingredients.Equally, the similar word such as " " or " " does not indicates that quantity limits yet, but represents and there is at least one.
A kind of chip test system, this system is for testing the S parameter of chip, this system includes radiofrequency signal generation module, RF power detection module, DC voltage read module, described radiofrequency signal generation module is for producing the radiofrequency signal of chip testing, described RF power detection module is for being converted to DC voltage by the RF signal that chip produces, described DC voltage read module is for reading the DC voltage that RF power detection module produces, and DC voltage is scaled S parameter.
As a kind of preferably technical scheme of the present invention, described radiofrequency signal generation module includes agitator and the attenuator being connected with oscillator output end.
As a kind of preferably technical scheme of the present invention, described radiofrequency signal generation module includes agitator and is connected several attenuator with oscillator output end, and described several attenuators are connected in series.
As a kind of preferably technical scheme of the present invention, described agitator is that output frequency is adjustable, the high frequency voltage controlled oscillator of output+7.0dbm.High frequency voltage controlled oscillator adds digital pad and produces 1.575GHz, the radiofrequency signal of-30dbm.As a example by the JTOS-1750+ of the Mini-Circuits company used in this programme, high frequency voltage controlled oscillator has following characteristics: output frequency is adjustable, output+7.0dbm, and when temperature and voltage constant, output signal changes hardly.
As a kind of preferably technical scheme of the present invention, described attenuator is power 0-31.5dB adjustable, the digital pad of stepping 0.5dB of decay.As a example by the RFSA2614 of the RFMD company used in this programme, digital pad chip has power attenuation adjustable (0-31.5dB), the feature of stepping 0.5dB.
As a kind of preferably technical scheme of the present invention, the quantity of described attenuator is 2.After 1 JTOS-1750+ and two RFSA2614 chip portfolios are got up, even if the loss that the difference of every piece of PCB is brought to radiofrequency signal with the interference of each use environment is different, it is also possible to finally obtained the radiofrequency signal (simulating general gps signal) of a 1.575GHz ,-40dBm by allotment pad value.
As a kind of preferably technical scheme of the present invention, described attenuator is the adjustable attenuator of pad value, and described attenuator regulates pad value by adjusting part.It is high or low that the RFSA2614 of the present invention uses jump cap to select correspondence to control pin current potential.
As a kind of preferably technical scheme of the present invention, described RF power detection module is to carry out 50MHz to the 3GHz monolithic RF power detector of RF signal measurement in a 60dB dynamic range.It is a 50MHz to the 3GHz monolithic RF power detector that can carry out RF signal measurement in a 60dB dynamic range with the LT5534 used in this programme.RF signal in units of dB is accurately converted to the D/C voltage in a linear graduation.The input dynamic range of 60dB uses cascade RF cymoscope and RF amplitude limiter to realize.Their output is added, to generate an accurate log-linear D/C voltage proportional to input rf signal (unit: dB).Utilize a low output impedance driver that output is buffered.LT5534 provides preeminent temperature stability (the typical exporting change in whole temperature range ± 1dB within).For a big RF input signal, output will respond in less than the time of 40ns.Further, from the relation table of DC voltage and power it can be seen that power bracket is between-40dBm to-10dBm time, output voltage linearly changes, furthermore, the gain design representative value of GPS-LNA chip to be measured is 15dB, therefore by the power adjustments of signal source to-40dBm.
After performance number is converted into direct voltage output, it is only necessary to read this magnitude of voltage with common simulation test machine and i.e. can obtain the RF signal power value after GPS-LNA chip, then deduct-40dBm the power gain S21 parameter of GPS-LNA chip.And common simulation test machine all has large number quipments in any packaging and testing factory, and hour unit price is all at 10-15, even has equipment component hour unit price below 10.The tester model that this testing scheme is selected is Credence
ASL1000, this test equipment hour unit price is $ 8.00.
The present invention also provides for a kind of chip test circuit, this circuit can be used for the test of volume production chip, this circuit includes chip, radiofrequency signal generation module, RF power detection module, radiofrequency signal generation module is connected with the RF input port of chip, described RF power detection module is connected with the RF output port of chip, described radiofrequency signal generation module is for producing the radiofrequency signal of chip testing, and described RF power detection module is for being converted to DC voltage by the RF signal that chip produces.
As a kind of preferably technical scheme of the present invention, described radiofrequency signal generation module includes agitator and the attenuator being connected with oscillator output end.
This circuit in the case of external 12V and 5V power supply, the exportable DC voltage for the chip S parameter to be measured that converts.This circuit external world vdct equipment can realize the test of S parameter.
As shown in Figure 4, attenuator is the RFSA2614 of RFMD company, and this digital pad power 0-31.5dB decays adjustable, the digital pad of stepping 0.5dB.nullThe pin 1 of this attenuator，17，18 is unsettled，Pin 3，5，12，14，16 ground connection，Pin 2 is VCC pin，Introduce the voltage source of+5V，Switch 0.5，Switch 1，Switch 2，Switch 4，Switch 8，Switch 16 one end and introduce the voltage source of+5V，Pin 2 is by electric capacity CS8 and CS7 ground connection，Pin 6，7，8，9 pass through electric capacity CS1，CS2CS3 ground connection，The pin 10 electric capacity CS4 ground connection by 680pF，The pin 11 electric capacity CS5 ground connection by 680pF，The pin 13 electric capacity CS6 ground connection by 680pF，Pin 19 is by resistance RS6 and electric capacity CS17 ground connection，Resistance RS6、The other end of electric capacity CS17 is connected with one end of switch 16，Pin 20 is by resistance RS5 and electric capacity CS18 ground connection，The other end of resistance RS5 and electric capacity CS18 is connected with one end of switch 8，Pin 21 is by resistance RS4 and electric capacity CS19 ground connection，The other end of resistance RS4 and electric capacity CS19 is connected with one end of switch 4，Pin 22 is by resistance RS3 and electric capacity CS20 ground connection，The other end of resistance RS3 and electric capacity CS20 is connected with one end of switch 2，Pin 23 is by resistance RS2 and electric capacity CS21 ground connection，The other end of resistance RS2 and electric capacity CS21 is connected with one end of switch 1，Pin 24 is by resistance RS1 and electric capacity CS22 ground connection，The other end of resistance RS1 and electric capacity CS22 is connected with one end of switch 0.5.The pin 15 electric capacity input rf signal by a 470pF, pin 4 exports RF signal by the electric capacity CS1 of a 470pF.
As it is shown in figure 5, the JTOS-1750+ that agitator is Mini-Circuits company, this oscillator output frequencies is adjustable, the high frequency voltage controlled oscillator of output+7.0dbm.High frequency voltage controlled oscillator adds digital pad and produces 1.575GHz, the radiofrequency signal of-30dbm.Pin 1,3,4,6,7,8,9,10,11,12,14 ground connection, pin 2 introduces the voltage source of+12V, and pin 13 exports RF signal.
As shown in Figure 6, RF power detection module be LT5534, LT5534 be the RF power detector of a 50MHz to the 3GHz monolithic that can carry out RF signal measurement in a 60dB dynamic range.GPS-LNA chip to be measured is AW5005DNR.
Pin 2 ground connection of AW5005DNR, pin 1 accesses the OVI1-0F port of Credence ASL1000, pin 3 input rf signal, it is connected by the inductance L1 of a 10nH between pin 3 with pin 4, pin 5 accesses the OVI1-1F port of Credence ASL1000, pin 6 exports RF signal, is connected by the pin 6 of electric capacity C3, C4 and LT5534.
The pin 1 and 4 of LT5534 introduces the voltage source of+5V, pin 6 input rf signal, pin 2,5 ground connection, pin 3 exports DC voltage, and pin 3 connects one end of resistance R1, the other end of resistance R1 is connected with the OVI1-2F port of Credence ASL1000, and the other end of resistance R1 passes through electric capacity C1 ground connection.
As it is shown in figure 1, a kind of chip test system, this system is for testing the S parameter of chip, and this system includes radiofrequency signal generation module, RF power detection module, DC voltage read module.As shown in Figure 6, the RF signal that radiofrequency signal generation module produces inputs the pin 3 of GPS-LNA chip AW5005DNR to be measured, RF signal is exported at pin 6, the RF signal input RF power detection module of AW5005DNR output, RF power detection module be LT5534, LT5534 be the RF power detector of a 50MHz to the 3GHz monolithic that can carry out RF signal measurement in a 60dB dynamic range.LT5534 exports DC voltage, and DC voltage uses DC voltage read module Credence ASL1000 to read and be converted into the S21 parameter of GPS-LNA chip to be measured.
As shown in Figure 2, a kind of chip test system, this system is for testing the S parameter of chip, and this system includes radiofrequency signal generation module, RF power detection module, DC voltage read module, and radiofrequency signal generation module includes agitator and the attenuator being connected with oscillator output end.nullSuch as Fig. 4，5，Shown in 6，Agitator is the JTOS-1750+ of Mini-Circuits company，This oscillator output frequencies is adjustable，The high frequency voltage controlled oscillator of output+7.0dbm，JTOS-1750+ output RF signal also inputs digital pad RFSA2614，The RF signal that digital pad RFSA2614 produces inputs the pin 3 of GPS-LNA chip AW5005DNR to be measured，RF signal is exported at pin 6，The RF signal input RF power detection module of AW5005DNR output，RF power detection module is LT5534，LT5534 is the RF power detector of a 50MHz to the 3GHz monolithic that can carry out RF signal measurement in a 60dB dynamic range.LT5534 exports DC voltage, and DC voltage uses DC voltage read module Credence
ASL1000 reads and is converted into the S parameter of GPS-LNA chip to be measured.
As shown in Figure 3, a kind of chip test system, this system is for testing the S parameter of chip, this system includes radiofrequency signal generation module, RF power detection module, DC voltage read module, radiofrequency signal generation module agitator and be connected 2 attenuators with oscillator output end, 2 attenuators are connected in series.nullSuch as Fig. 4，5，Shown in 6，Agitator is the JTOS-1750+ of Mini-Circuits company，This oscillator output frequencies is adjustable，The high frequency voltage controlled oscillator of output+7.0dbm，JTOS-1750+ output RF signal also inputs two digital pad RFSA2614 connected，The RF signal that digital pad RFSA2614 produces inputs the pin 3 of GPS-LNA chip AW5005DNR to be measured，RF signal is exported at pin 6，The RF signal input RF power detection module of AW5005DNR output，RF power detection module is LT5534，LT5534 is the RF power detector of a 50MHz to the 3GHz monolithic that can carry out RF signal measurement in a 60dB dynamic range.LT5534 exports DC voltage, and DC voltage uses DC voltage read module Credence
ASL1000 reads and is converted into the S parameter of GPS-LNA chip to be measured.
As shown in Figure 7, present invention also offers a kind of chip test circuit, this circuit includes chip, radiofrequency signal generation module, RF power detection module, radiofrequency signal generation module is connected with the RF input port of chip, described RF power detection module is connected with the RF output port of chip, described radiofrequency signal generation module is for producing the radiofrequency signal of chip testing, and described RF power detection module is for being converted to DC voltage by the RF signal that chip produces.RF power detection module is LT5534, and GPS-LNA chip to be measured is AW5005DNR.Its circuit structure is as shown in Figure 6.
As shown in Figure 8, present invention also offers a kind of chip test circuit, this circuit includes chip, radiofrequency signal generation module, RF power detection module, radiofrequency signal generation module is connected with the RF input port of chip, described RF power detection module is connected with the RF output port of chip, described radiofrequency signal generation module is for producing the radiofrequency signal of chip testing, and radiofrequency signal generation module includes agitator and the attenuator being connected with oscillator output end.nullSuch as Fig. 4，5，Shown in 6，Agitator is the JTOS-1750+ of Mini-Circuits company，This oscillator output frequencies is adjustable，The high frequency voltage controlled oscillator of output+7.0dbm，JTOS-1750+ output RF signal also inputs digital pad RFSA2614，The RF signal that digital pad RFSA2614 produces inputs the pin 3 of GPS-LNA chip AW5005DNR to be measured，RF signal is exported at pin 6，The RF signal input RF power detection module of AW5005DNR output，RF power detection module is LT5534，LT5534 is the RF power detector of a 50MHz to the 3GHz monolithic that can carry out RF signal measurement in a 60dB dynamic range.LT5534 exports DC voltage.
As shown in Figure 9, present invention also offers a kind of chip test circuit, this circuit includes chip, radiofrequency signal generation module, RF power detection module, radiofrequency signal generation module is connected with the RF input port of chip, described RF power detection module is connected with the RF output port of chip, described radiofrequency signal generation module is for producing the radiofrequency signal of chip testing, and radiofrequency signal generation module agitator and be connected 2 attenuators with oscillator output end, 2 attenuators are connected in series.nullSuch as Fig. 4，5，Shown in 6，Agitator is the JTOS-1750+ of Mini-Circuits company，This oscillator output frequencies is adjustable，The high frequency voltage controlled oscillator of output+7.0dbm，JTOS-1750+ output RF signal also inputs digital pad RFSA2614，The RF signal that digital pad RFSA2614 produces inputs the pin 3 of GPS-LNA chip AW5005DNR to be measured，RF signal is exported at pin 6，The RF signal input RF power detection module of AW5005DNR output，RF power detection module is LT5534，LT5534 is the RF power detector of a 50MHz to the 3GHz monolithic that can carry out RF signal measurement in a 60dB dynamic range.LT5534 exports DC voltage.
The above, only presently preferred embodiments of the present invention, it is not intended to limit protection scope of the present invention.Every impartial change done according to present invention and modification, be encompassed by the scope of the claims of the present invention.
Claims (10)
1. a chip test system, this system is for testing the S parameter of chip, this system includes radiofrequency signal generation module, RF power detection module, DC voltage read module, described radiofrequency signal generation module is for producing the radiofrequency signal of chip testing, described RF power detection module is for being converted to DC voltage by the RF signal that chip produces, described DC voltage read module is for reading the DC voltage that RF power detection module produces, and DC voltage is scaled S parameter.
Chip test system the most according to claim 1, it is characterised in that described radiofrequency signal generation module includes agitator and the attenuator being connected with oscillator output end.
Chip test system the most according to claim 1, it is characterised in that described radiofrequency signal generation module includes agitator and is connected several attenuator with oscillator output end, and described several attenuators are connected in series.
Chip test system the most according to claim 3, it is characterised in that the quantity of described attenuator is 2.
Chip test system the most according to claim 2, it is characterised in that described attenuator is the adjustable attenuator of pad value, and described attenuator regulates pad value by adjusting part.
Chip test system the most according to claim 2, it is characterised in that described agitator is that output frequency is adjustable, the high frequency voltage controlled oscillator of output+7.0dbm.
Chip test system the most according to claim 2, it is characterised in that described attenuator is power 0-31.5dB adjustable, the digital pad of stepping 0.5dB of decay.
Chip test system the most according to claim 1, it is characterised in that described RF power detection module is to carry out 50MHz to the 3GHz monolithic RF power detector of RF signal measurement in a 60dB dynamic range.
9. a chip test circuit, this circuit includes chip, radiofrequency signal generation module, RF power detection module, radiofrequency signal generation module is connected with the RF input port of chip, described RF power detection module is connected with the RF output port of chip, described radiofrequency signal generation module is for producing the radiofrequency signal of chip testing, described
RF power detection module is for being converted to DC voltage by the RF signal that chip produces.
Chip test circuit the most according to claim 1, it is characterised in that described radiofrequency signal generation module includes agitator and the attenuator being connected with oscillator output end.
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| CN201610494850.0A CN105974301A (en) | 2016-06-30 | 2016-06-30 | Chip testing system |
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| CN201610494850.0A CN105974301A (en) | 2016-06-30 | 2016-06-30 | Chip testing system |
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| CN106452398A (en) * | 2016-10-14 | 2017-02-22 | 上海旻艾信息科技有限公司 | Hub module |
| CN111060811A (en) * | 2020-01-16 | 2020-04-24 | 珠海市运泰利自动化设备有限公司 | Chip pin position identification module and identification method thereof |
| CN116184174A (en) * | 2023-03-10 | 2023-05-30 | 深圳市创达电子有限公司 | Chip testing system and chip testing device |
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