CN105810144A - Pixel circuit and driving method for the same, and active matrix organic light emitting displayer - Google Patents
Pixel circuit and driving method for the same, and active matrix organic light emitting displayer Download PDFInfo
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Abstract
In the invention, a first film transistor is arranged between a third node and a fourth node of a pixel circuit and a corresponding time sequence of the driving method is combined, which forms a charging circuit to realize the charging for the first node; the compensation on the discharge of the first node is performed, which enables the grid voltage of the third film transistor maintains the same, reduces the leak current, and improves the contrast ratio of the organic light emitting displayer of the active matrix.
Description
Technical field
The present invention relates to technical field of flat panel display, particularly to a kind of image element circuit and driving method thereof and active matrix/organic light emitting display.
Background technology
Active matrix/organic light emitting display (English full name ActiveMatrixOrganicLightingEmittingDisplay, it is called for short AMOLED) utilize thin film transistor (TFT) (English full name ThinFilmTransistor, it is called for short TFT), collocation electric capacity storage signal, control Organic Light Emitting Diode (English full name OrganicLightingEmittingDiode, be called for short OLED) brightness and GTG performance, thus showing image.Owing to active matrix/organic light emitting display can self-luminescence, unlike Thin Film Transistor-LCD (English full name ThinFilmTransistorliquidcrystaldisplay, it is called for short TFT-LCD) need back light system (backlightsystem) just can light, therefore visibility and brightness are all higher, and more frivolous.At present, active matrix/organic light emitting display is described as the display of new generation that can replace Thin Film Transistor-LCD.
In active matrix/organic light emitting display, each pixel includes Organic Light Emitting Diode (English full name OrganicLightingEmittingDiode, it is called for short OLED) and for driving the image element circuit of described Organic Light Emitting Diode, described image element circuit generally includes storage electric capacity, drives transistor and switch transistors pipe, when opening switch transistors pipe by scanning line, the data voltage that data wire provides stores electric capacity via switch transistors pipe, thus controlling to drive transistor to produce electric current, to drive organic light-emitting diode.The brightness of each pixel is to be determined by the electric current flowing through Organic Light Emitting Diode, and the electric current flowing through Organic Light Emitting Diode is to be controlled by the image element circuit of its correspondence.
The image element circuit of active matrix/organic light emitting display is to be built by thin film transistor (TFT) (English full name ThinFilmTransistor, be called for short TFT), and therefore, image element circuit can be produced to have a strong impact on by transistor characteristic.There is threshold voltage offset issue because of manufacturing technology level restriction in the driving transistor in image element circuit, threshold voltage deviation can cause that described Organic Light Emitting Diode OLED still launches the light of different brightness for the data signal of same brightness with identical external power source.Therefore, described active matrix/organic light emitting display is difficult to show the image with uniform luminance.There is leakage problem in the switch transistors pipe in image element circuit, there is leakage current in glow phase and can reduce drive transistor gate voltage so that display brightness increases.Particularly, when display is in dark-state, pixel but sends the light that naked eyes can be distinguished, can affect the contrast of display.
At present, the image element circuit with threshold voltage compensation effect is generally adopted, to improve show uniformity.Such as, existing 6T1C type image element circuit and 6T2C type image element circuit.But, although existing 6T1C type image element circuit and 6T2C type image element circuit all have threshold voltage compensation effect, but all without the leakage problem solved existing for switch transistors pipe.Existing 6T1C type image element circuit has two drain current paths, and the leakage current flow through via drain current path can be substantially reduced the contrast of display.6T2C type image element circuit is additionally arranged capacitor on the basis of 6T1C type image element circuit, is raised the grid voltage driving transistor by the capacitor set up, thus delaying electric leakage.The leakage problem of 6T2C type image element circuit still exists, and does not obtain the improvement of reality.And, adopt 6T2C type image element circuit also can affect display brightness so that display brightness substantially reduces.
Base this, how to solve existing active matrix/organic light emitting display affects the problem of contrast because there is dark-state leakage current, has become the technical problem that those skilled in the art are urgently to be resolved hurrily.
Summary of the invention
It is an object of the invention to provide a kind of image element circuit and driving method thereof and active matrix/organic light emitting display, to solve the problem that existing active matrix/organic light emitting display affects contrast because there is dark-state leakage current.
For solving the problems referred to above, the present invention provides a kind of image element circuit, described image element circuit includes the first film transistor, the second thin film transistor (TFT), the 3rd thin film transistor (TFT), the 4th thin film transistor (TFT), the 5th thin film transistor (TFT), the 6th thin film transistor (TFT), the 7th thin film transistor (TFT), the 8th thin film transistor (TFT), the 9th thin film transistor (TFT) and the first electric capacity, wherein:
The first film transistor, is connected between the 3rd node and fourth node, and its grid is connected to the 3rd node；
Second thin film transistor (TFT), is connected between secondary nodal point and fourth node, and its grid is connected to the second scanning line；
3rd thin film transistor (TFT), is connected between the source electrode of secondary nodal point and the 6th thin film transistor (TFT), and its grid receives primary nodal point；
4th thin film transistor (TFT), is connected between primary nodal point and the 3rd node, and its grid is connected to the second scanning line；
5th thin film transistor (TFT), is connected between the first power supply and secondary nodal point, and its grid is connected to three scan line；
6th thin film transistor (TFT), is connected between drain electrode and the anode of Organic Light Emitting Diode of the 3rd thin film transistor (TFT), and its grid is connected to three scan line；
7th thin film transistor (TFT), is connected between primary nodal point and the 3rd power supply, and its grid is connected to scan line；
8th thin film transistor (TFT), is connected between the 3rd node and the source electrode of the 6th thin film transistor (TFT), and its grid is connected to the second scanning line；
9th thin film transistor (TFT), is connected between data wire and fourth node, and its grid is connected to the second scanning line；
First electric capacity, is connected between the first power supply and primary nodal point.
Optionally, in described image element circuit, the negative electrode of Organic Light Emitting Diode is connected with second source, and described first power supply and second source are used as the driving power supply of described Organic Light Emitting Diode, and described 3rd power supply is used for providing initialization voltage.
Optionally, in described image element circuit, described initialization voltage is negative voltage.
Optionally, in described image element circuit, described the first film transistor is P-type TFT to the 9th thin film transistor (TFT).
Optionally, in described image element circuit, also including the tenth thin film transistor (TFT), described tenth thin film transistor (TFT) is connected between described 7th thin film transistor (TFT) and primary nodal point, and its grid is connected to scan line.
Optionally, in described image element circuit, described tenth thin film transistor (TFT) is P-type TFT.
Accordingly, present invention also offers the driving method of a kind of image element circuit, the driving method of described image element circuit includes:
Scan period includes first time period, the second time period and the 3rd time period, wherein,
In first time period, the scanning signal that scan line provides is low level, scanning signal and the data signal of data wire offer that second scanning line and three scan line provide are high level, open the 7th thin film transistor (TFT), by the 3rd power supply, the voltage of primary nodal point are initialized；
In the second time period, the scanning signal that second scanning line provides is low level, scanning signal and the data signal of data wire offer that scan line and three scan line provide are high level, open the 9th thin film transistor (TFT), the second thin film transistor (TFT), the 4th thin film transistor (TFT) and the 8th thin film transistor (TFT), data signal is write the first electric capacity；
In the 3rd time period, scanning signal and the data signal of data wire offer that three scan line provides are low level, the scanning signal that scan line and the second scanning line provide is high level, open the 5th thin film transistor (TFT) and the 6th thin film transistor (TFT), drive electric current to flow second source along the first power supply through the path of the 5th thin film transistor (TFT), the 3rd thin film transistor (TFT), the 6th thin film transistor (TFT) and Organic Light Emitting Diode, cause Organic Light Emitting Diode to light luminescence.
Optionally, in the driving method of described image element circuit, when the second time period terminated, the scanning signal that the second scanning line provides is high level by low transition, and the voltage of described 3rd node raises and starts described primary nodal point is charged.
Optionally, in the driving method of described image element circuit, described first power supply and second source are used as the driving power supply of described Organic Light Emitting Diode, and described 3rd power supply is used for providing initialization voltage.
Accordingly, present invention also offers a kind of active matrix/organic light emitting display, described active matrix/organic light emitting display includes image element circuit as above.
In image element circuit provided by the invention and driving method and active matrix/organic light emitting display thereof, by arranging the first film transistor between described image element circuit the 3rd node and fourth node, and coordinate the sequential of corresponding driving method, define charge circuit and realize the charging to primary nodal point, the electric discharge of primary nodal point has been made up, the grid voltage making the 3rd thin film transistor (TFT) is held essentially constant, thus decreasing leakage current, and then improve the contrast of active matrix/organic light emitting display.
Accompanying drawing explanation
Fig. 1 is the circuit diagram of the image element circuit of the embodiment of the present invention one；
Fig. 2 is the sequential chart of the driving method of the image element circuit of the embodiment of the present invention one；
Fig. 3 is the circuit diagram of the image element circuit of the embodiment of the present invention two；
The image element circuit that Fig. 4 is the embodiment of the present invention is in simulation waveform figure during dark-state with 6T1C type image element circuit.
Fig. 5 is simulation waveform figure when being on state of of image element circuit and the 6T2C type image element circuit of the embodiment of the present invention；
Fig. 6 is the structural representation of the active matrix/organic light emitting display of the embodiment of the present invention.
Detailed description of the invention
Below in conjunction with the drawings and specific embodiments, the present invention proposed a kind of image element circuit and driving method thereof and active matrix/organic light emitting display is described in further detail.According to the following describes and claims, advantages and features of the invention will be apparent from.It should be noted that, accompanying drawing all adopts the form simplified very much and all uses non-ratio accurately, only in order to convenience, the purpose aiding in illustrating the embodiment of the present invention lucidly.
[embodiment one]
Refer to Fig. 1, it is the structural representation of image element circuit of the embodiment of the present invention one.As it is shown in figure 1, described image element circuit 20 includes: the first film transistor M1, being connected between the 3rd node N3 and fourth node N4, its grid is connected to the 3rd node N3；Second thin film transistor (TFT) M2, is connected between secondary nodal point N2 and fourth node N4, and its grid is connected to the second scanning line Sn2；3rd thin film transistor (TFT) M3, is connected between the source electrode of secondary nodal point N2 and the six thin film transistor (TFT) M6, and its grid receives primary nodal point N1；4th thin film transistor (TFT) T4, is connected between primary nodal point N1 and the three node N3, and its grid is connected to the second scanning line Sn2；5th thin film transistor (TFT) M5, is connected between the first power supply ELVDD and secondary nodal point N2, and its grid is connected to three scan line Sn3；6th thin film transistor (TFT) M6, is connected between drain electrode and the anode of Organic Light Emitting Diode OLED of the 3rd thin film transistor (TFT) M3, and its grid is connected to three scan line Sn3；7th thin film transistor (TFT) M7, is connected between primary nodal point N1 and the three power supply Vref, and its grid is connected to scan line Sn1；8th thin film transistor (TFT) M8, is connected between the source electrode of the 3rd node N3 and the six thin film transistor (TFT) M6, and its grid is connected to the second scanning line Sn2；9th thin film transistor (TFT) M9, is connected between data wire Data and fourth node N4, and its grid is connected to the second scanning line Sn2；First electric capacity CS, it is connected between the first power supply ELVDD and primary nodal point N1.
Concrete, described image element circuit 20 receives the first power supply signal ELVDD, second source signal ELVSS and the three power supply signal Vref that provide from outside (such as, from power supply).Wherein, described first power supply ELVDD and second source ELVSS is used as the driving power supply of Organic Light Emitting Diode OLED, and the 3rd power supply Vref is used for providing initialization voltage.Described first power supply ELVDD is generally high level voltage source, and described second source ELVSS and the three power supply Vref is generally low level voltage source.In the present embodiment, the initialization voltage that described 3rd power supply Vref provides is negative voltage.
As it is shown in figure 1, the negative electrode of Organic Light Emitting Diode OLED is connected with second source ELVSS, the anode of Organic Light Emitting Diode OLED is connected with described image element circuit 20, and described image element circuit 20 includes 9 thin film transistor (TFT)s and 1 electric capacity.Wherein, 7th thin film transistor (TFT) M7 is controlled by scan line Sn1, second thin film transistor (TFT) M2, the 4th thin film transistor (TFT) M4, the 8th thin film transistor (TFT) M8 and the nine thin film transistor (TFT) M9 scan line Sn2 by second and control, and the 5th thin film transistor (TFT) M5 and the six thin film transistor (TFT) M6 controls by three scan line Sn3.In the present embodiment, described the first film transistor M1 to the 9th thin film transistor (TFT) M9 is P-type TFT.
When the scan line Sn1 scanning signal transition provided is to low level, the 7th thin film transistor (TFT) M7 conducting, described primary nodal point N1 is connected to the 3rd power supply Vref.The time period of scanning signal is provided, due to described 7th thin film transistor (TFT) M7 conducting, thus the voltage by the 3rd power supply Vref is supplied to primary nodal point N1 at scan line Sn1.
When second scans the line Sn2 scanning signal transition provided to low level, the second thin film transistor (TFT) M2 and the nine thin film transistor (TFT) M9 conducting, thus being supplied to secondary nodal point N2 by the data signal that data wire Data provides.Scan line Sn2 second and the time period of scanning signal is provided, 9th thin film transistor (TFT) M9, the second thin film transistor (TFT) M2, the 3rd thin film transistor (TFT) M3, the 4th thin film transistor (TFT) M4 and the eight thin film transistor (TFT) M8 are both turned on, thus the data signal that data wire Data provides being supplied to primary nodal point N1, and the corresponding voltage of data signal institute sequentially passing through the 9th thin film transistor (TFT) M9, the second thin film transistor (TFT) M2, the 3rd thin film transistor (TFT) M3 and the four thin film transistor (TFT) M4 provide is stored in the first electric capacity CSIn.
In the present embodiment, described 3rd thin film transistor (TFT) M3 is as driving transistor.Owing to voltage corresponding with the threshold voltage of described 3rd thin film transistor (TFT) M3 is also stored on the first electric capacity CSIn, therefore, it is possible to realize the compensation to threshold voltage.
Please continue to refer to Fig. 1, when the second scanning signal scanning line Sn2 offer is transitted to high level by low level, fourth node is coupled as high level, now the first film transistor M1 opens, the voltage of the 3rd node N3 raises rapidly, owing to thin film transistor (TFT) exists electric leakage, namely primary nodal point N1 can pass through the 7th thin film transistor (TFT) electric leakage, now the 3rd node N3 of high level slowly can charge toward primary nodal point N1, finally make the voltage voltage close to primary nodal point N1 of the 3rd node N3, compensate for primary nodal point N1 by the electric discharge to the 3rd power supply Vref of the 7th thin film transistor (TFT).By above-mentioned charge and discharge process so that the voltage (i.e. the grid voltage of the 3rd thin film transistor (TFT) M3) of primary nodal point N1 is kept essentially constant, thus reducing the leakage current of primary nodal point N1.
When the three scan line Sn3 scanning signal transition provided is to low level, 5th thin film transistor (TFT) M5 and the six thin film transistor (TFT) M6 is both turned on, thus the source electrode of the 3rd thin film transistor (TFT) M3 is connected to the first power supply ELVDD, the drain electrode of the 3rd thin film transistor (TFT) M3 is connected to the anode of Organic Light Emitting Diode OLED.There is provided the time period of scanning signal at three scan line Sn3, the 3rd thin film transistor (TFT) M3 provides to Organic Light Emitting Diode OLED and drives electric current, and described Organic Light Emitting Diode OLED sends the light of corresponding brightness according to described driving electric current.
When the three scan line Sn3 scanning signal transition provided is to high level, the 6th thin film transistor (TFT) M6 cut-off, thus preventing from driving electric current is supplied to Organic Light Emitting Diode OLED.
In the present embodiment, by arranging the first film transistor M1 between the 3rd node N3 and fourth node N4, by the first film transistor M1, the high level of fourth node N4 is coupled to the 3rd node N3, the voltage making the 3rd node N3 raises rapidly, and utilize transistor leakage characteristic, realize the slow charging to primary nodal point N1, thus making up primary nodal point N1 via the 7th thin film transistor (TFT) M7 to the electric discharge of the 3rd power supply Vref, thus reduce primary nodal point N1 leakage current.
In the present embodiment, described image element circuit 20 is a kind of 9T1C type circuit structure, including 9 thin film transistor (TFT)s and 1 electric capacity.Described image element circuit 20 utilizes the charging and discharging circuit at primary nodal point N1 place, slackens the change of the grid voltage driving transistor, thus reducing leakage current.And need not by additionally setting up electric capacity, it becomes possible to existing threshold voltage compensation function, have a negative impact thus without to display brightness.
Accordingly, present invention also offers the driving method of a kind of image element circuit.Incorporated by reference to reference Fig. 1 and Fig. 2, the driving method of described image element circuit includes:
Scan period includes first time period t1, the second time period t 2 and the 3rd time period t 3；
At first time period t1, the scanning signal that scan line Sn1 provides is low level, scanning signal and the data signal Data of data wire Data offer that second scanning line Sn2 and three scan line Sn3 provides are high level, open the 7th thin film transistor (TFT) M7, by the 3rd power supply Vref, the voltage of primary nodal point N1 is initialized；
In the second time period t 2, the scanning signal that second scanning line Sn2 provides is low level, scanning signal and the data signal of data wire Data offer that scan line Sn1 and three scan line Sn3 provides are high level, open the 9th thin film transistor (TFT) M9, the second thin film transistor (TFT) M2, the 4th thin film transistor (TFT) M4 and the eight thin film transistor (TFT) M8, data signal is write the first electric capacity CS；
In the 3rd time period t 3, scanning signal and the data signal of data wire Data offer that three scan line Sn3 provides are low level, the scanning signal that scan line Sn1 and the second scanning line Sn2 provides is high level, open the 5th thin film transistor (TFT) M5 and the six thin film transistor (TFT) M6, drive electric current along the first power supply ELVDD through the 5th thin film transistor (TFT) M5, the 3rd thin film transistor (TFT) M3, the 6th thin film transistor (TFT) M6 and Organic Light Emitting Diode OLED path flow second source ELVSS, cause Organic Light Emitting Diode OLED to light luminescence.
Concrete, first, the scan period includes first time period t1, the second time period t 2 and the 3rd time period t 3.
At first time period t1, owing to the scan line Sn1 scanning signal provided is low level, being opened by scan line Sn1 the 7th thin film transistor (TFT) M7 controlled, the voltage of primary nodal point N1 is initialized by the 3rd power supply Vref by described 7th thin film transistor (TFT) M7, namely refreshes the first electric capacity CSThe data signal in the upper cycle stored, the data signal for writing next cycle is prepared.After initialization, the voltage of described primary nodal point N1 is low level.In the second time period t 2, owing to the second scanning signal scanning line Sn2 offer is low level, line Sn2 the 9th thin film transistor (TFT) M9 controlled is scanned by second, second thin film transistor (TFT) M2, 4th thin film transistor (TFT) M4 and the eight thin film transistor (TFT) M8 is fully open, simultaneously because primary nodal point N1 is initialized by described 3rd power supply Vref at first time period t1, described 3rd thin film transistor (TFT) M3 is opened, therefore the data signal Data that data wire Data provides can pass sequentially through described 9th thin film transistor (TFT) M9, second thin film transistor (TFT) M2, 3rd thin film transistor (TFT) M3, 4th thin film transistor (TFT) M4 and the eight thin film transistor (TFT) M8, and to described first electric capacity CSIt is charged, in the process described first electric capacity CSWrite new data signal.
In the process, owing to voltage corresponding with the threshold voltage of the 3rd thin film transistor (TFT) M3 is stored in the first electric capacity Cs, therefore, the threshold voltage of the 3rd thin film transistor (TFT) M3 can be compensated during this period.
When the second time period t 2 terminates, due to second, to scan the line Sn2 scanning signal provided be high level by low transition, high level signal is coupled to fourth node N4, by the first film transistor M1 of conducting diode connected mode, high level is coupled to the 3rd node N3, the voltage of the 3rd node N3 raises rapidly, utilize the electric leakage of transistor, 3rd node N3 starts slowly to charge toward primary nodal point N1, the voltage of final 3rd node N3 is close to the voltage of primary nodal point N1, compensate for primary nodal point N1 to be discharged to the 3rd power supply Vref by the 7th thin film transistor (TFT) M7, by above-mentioned charge and discharge process, the voltage making primary nodal point N1 is held essentially constant, thus reducing the leakage current of primary nodal point N1, solve the problem that during dark-state, leakage current is too high.
In the 3rd time period t 3, owing to the three scan line Sn3 scanning signal provided is low level, fully open by three scan line Sn3 the 5th thin film transistor (TFT) M5 and the six thin film transistor (TFT) M6 controlled, drive electric current to flow through the anode of described 5th thin film transistor (TFT) M5, the 3rd thin film transistor (TFT) M3 and the six thin film transistor (TFT) M6 thin film transistor (TFT) described Organic Light Emitting Diode OLED of arrival successively along described first power supply ELVDD, cause described Organic Light Emitting Diode OLED to light luminescence.At the 3rd time period t 3, pixel normal luminous display image.
[embodiment two]
Refer to Fig. 3, it is the structural representation of image element circuit of the embodiment of the present invention two.As it is shown on figure 3, described image element circuit 30 includes: the first film transistor M1, being connected between the 3rd node N3 and fourth node N4, its grid is connected to the 3rd node N3；Second thin film transistor (TFT) M2, is connected between secondary nodal point N2 and fourth node N4, and its grid is connected to the second scanning line Sn2；3rd thin film transistor (TFT) M3, is connected between the source electrode of secondary nodal point N2 and the six thin film transistor (TFT) M6, and its grid receives primary nodal point N1；4th thin film transistor (TFT) T4, is connected between primary nodal point N1 and the three node N3, and its grid is connected to the second scanning line Sn2；5th thin film transistor (TFT) M5, is connected between the first power supply ELVDD and secondary nodal point N2, and its grid is connected to three scan line Sn3；6th thin film transistor (TFT) M6, is connected between drain electrode and the anode of Organic Light Emitting Diode OLED of the 3rd thin film transistor (TFT) M3, and its grid is connected to three scan line Sn3；7th thin film transistor (TFT) M7, is connected between primary nodal point N1 and the three power supply Vref, and its grid is connected to scan line Sn1；8th thin film transistor (TFT) M8, is connected between the source electrode of the 3rd node N3 and the six thin film transistor (TFT) M6, and its grid is connected to the second scanning line Sn2；9th thin film transistor (TFT) M9, is connected between data wire Data and fourth node N4, and its grid is connected to the second scanning line Sn2；First electric capacity CS, it is connected between the first power supply ELVDD and primary nodal point N1.
Concrete, described image element circuit 30 comprises all features of image element circuit 20 described in embodiment one, the present embodiment and embodiment one are distinctive in that, described image element circuit 30 also includes the tenth thin film transistor (TFT) M10, described tenth thin film transistor (TFT) M10 is connected between the 7th thin film transistor (TFT) M7 and primary nodal point N1, and its grid is connected to scan line Sn1.
In the present embodiment, described image element circuit 30 is a kind of 10T1C type circuit structure, including 10 thin film transistor (TFT)s and 1 electric capacity.Wherein, described tenth thin film transistor (TFT) M10 is also P-type TFT, described tenth thin film transistor (TFT) M10 and described 7th thin film transistor (TFT) M7 constitutes a double-gated transistor, described double-gated transistor is connected between reference power source Vref and primary nodal point N1, and the grid of described double-gated transistor and scan line Sn1 connect.
When the scan line Sn1 scanning signal transition provided is to low level, the 7th thin film transistor (TFT) M7 and the ten thin film transistor (TFT) M10 is both turned on, and described primary nodal point N1 is connected to the 3rd power supply Vref.The time period of scanning signal is provided, owing to described 7th thin film transistor (TFT) M7 and the ten thin film transistor (TFT) M10 is both turned on, thus the voltage by the 3rd power supply Vref is supplied to primary nodal point N1 at scan line Sn1.
When second, to scan the line Sn2 scanning signal provided be high level by low transition, high level signal is coupled to fourth node N4, by the first film transistor M1 of conducting diode connected mode, high level is coupled to the 3rd node N3, the voltage of the 3rd node N3 raises rapidly and starts slowly to charge toward primary nodal point N1, compensate for primary nodal point N1 by the 7th thin film transistor (TFT) M7 and the ten thin film transistor (TFT) M1 to the electric discharge of the 3rd power supply Vref, by above-mentioned charge and discharge process, the voltage making primary nodal point N1 is held essentially constant, thus reducing the leakage current of primary nodal point N1.In the present embodiment, between reference power source Vref and primary nodal point N1, it is provided with double-gated transistor, therefore, it is possible to reduce the leakage current of described primary nodal point N1 further, improves contrast.
Refer to Fig. 4, it is image element circuit and the 6T1C type image element circuit of embodiment of the present invention simulation waveform figure when being in dark-state.As shown in Figure 4, respectively the image element circuit 30 and 6T1C type image element circuit being in dark-state being carried out emulation testing, the leakage current A of described image element circuit 30 is less than the leakage current B of 6T1C type image element circuit.
Refer to Fig. 5, it is image element circuit and the 6T2C type image element circuit of embodiment of the present invention simulation waveform figure when being on state of.As it is shown in figure 5, respectively the image element circuit 30 and 6T2C type image element circuit being on state of is carried out emulation testing, the display brightness C of described image element circuit 30 is higher than the display brightness D of 6T2C type image element circuit.
Accordingly, present invention also offers a kind of active matrix/organic light emitting display.Refer to Fig. 6, as shown in Figure 6, described active matrix/organic light emitting display includes: display unit 100, scanner driver 200 and data driver 300；Described display unit 100 includes multiple pixel 110, the plurality of pixel 110 is arranged in the intersection region of scanning line Sn1, Sn2 and Sn3 and data wire D1 to Dm in the matrix form, each pixel 110 is connected with scanning line and data wire, and described pixel 110 includes image element circuit as above.
Concrete, described display unit 100 receive from outside (such as, from power supply) provide from the first power supply signal ELVDD and second source signal ELVSS.First power supply ELVDD and second source ELVSS is used separately as high level voltage source and low level voltage source.First power supply ELVDD and second source ELVSS is used as the driving power supply of pixel 110.
As shown in Figure 6, described display unit 100 includes multiple pixel 110, and the plurality of pixel 110 array distribution in m × n, wherein, m is the columns of pixel 110, and n is the line number of pixel 110, m >=1, n >=1.Each pixel 110 is connected to scanning line (such as, Sn1, Sn2 and Sn3) and the data wire string pixel 110 of the place of pixel 110 own (the described data wire be connected to).Such as, will be located in the pixel 110 of ith row and jth column and be connected to the i-th scanning line Si1, Si2, Si3 and Si4 and jth data wire Dj.
Wherein, scanning line is all connected with scanner driver 200, and described scanner driver 200 results from the corresponding scan control signal of scan control signal of outside offer (such as, providing) from timing control unit.The scan control signal that described scanning monitor 200 produces sequentially is supplied to pixel 110 respectively through scanning line Si1 to Sin.Data wire is all connected with data driver 300, and described data driver 300 produces and the outside data providing (such as, providing) from timing control unit and the corresponding data signal of data controlling signal.The data signal that described data driver 300 produces is provided synchronously to pixel 110 by data wire D1 to Dm with scanning signal.
Incorporated by reference to referring to figs. 2 and 6, scanning line provide scan control signal first time period t1 during, each pixel 110 is initialised；During the second time period t 2 of the scan control signal of scanning line offer, described pixel 110 accepts the data signal provided from data wire；During the 3rd time period t 3, described pixel 110 has brightness light corresponding with data signal by transmitting and shows image.
Owing to described pixel 110 includes image element circuit as above, when the second scanning signal scanning line Sn2 offer is high level by low transition, high level signal is coupled to the 3rd node N3 of image element circuit so that the voltage of described 3rd node N3 raises rapidly and starts primary nodal point N1 is charged.In glow phase, the voltage of described 3rd node N3 slowly reduces.Compensate for the primary nodal point N1 double-gated transistor constituted by described 7th thin film transistor (TFT) M7 or described 7th thin film transistor (TFT) M7 and the ten thin film transistor (TFT) M10 to the electric discharge of the 3rd power supply Vref, by above-mentioned charge and discharge process, the voltage (i.e. the grid voltage of the 3rd thin film transistor (TFT) M3) making primary nodal point N1 is held essentially constant, thus solving dark-state leakage problem, improve the contrast of described active matrix/organic light emitting display.
To sum up, in image element circuit provided by the invention and driving method and active matrix/organic light emitting display thereof, by arranging the first film transistor between the 3rd node and the fourth node of described image element circuit, and coordinate the sequential of corresponding driving method, define charge circuit and realize the charging to primary nodal point, thus compensate for the electric discharge of primary nodal point, the grid voltage making the 3rd thin film transistor (TFT) is held essentially constant, thus decreasing leakage current, and then improve the contrast of active matrix/organic light emitting display.
Foregoing description is only the description to present pre-ferred embodiments, not any restriction to the scope of the invention, any change that the those of ordinary skill in field of the present invention does according to the disclosure above content, modification, belongs to the protection domain of claims.
Claims (10)
1. an image element circuit, including the first film transistor, the second thin film transistor (TFT), the 3rd thin film transistor (TFT), the 4th thin film transistor (TFT), the 5th thin film transistor (TFT), the 6th thin film transistor (TFT), the 7th thin film transistor (TFT), the 8th thin film transistor (TFT), the 9th thin film transistor (TFT) and the first electric capacity, it is characterised in that:
Described the first film transistor, is connected between the 3rd node and fourth node, and its grid is connected to the 3rd node；
Described second thin film transistor (TFT), is connected between secondary nodal point and fourth node, and its grid is connected to the second scanning line；
Described 3rd thin film transistor (TFT), is connected between the source electrode of secondary nodal point and the 6th thin film transistor (TFT), and its grid receives primary nodal point；
Described 4th thin film transistor (TFT), is connected between primary nodal point and the 3rd node, and its grid is connected to the second scanning line；
Described 5th thin film transistor (TFT), is connected between the first power supply and secondary nodal point, and its grid is connected to three scan line；
Described 6th thin film transistor (TFT), is connected between drain electrode and the anode of Organic Light Emitting Diode of the 3rd thin film transistor (TFT), and its grid is connected to three scan line；
Described 7th thin film transistor (TFT), is connected between primary nodal point and the 3rd power supply, and its grid is connected to scan line；
Described 8th thin film transistor (TFT), is connected between the 3rd node and the source electrode of the 6th thin film transistor (TFT), and its grid is connected to the second scanning line；
Described 9th thin film transistor (TFT), is connected between data wire and fourth node, and its grid is connected to the second scanning line；
Described first electric capacity, is connected between the first power supply and primary nodal point.
2. image element circuit as claimed in claim 1, it is characterised in that the negative electrode of Organic Light Emitting Diode is connected with second source, described first power supply and second source are used as the driving power supply of described Organic Light Emitting Diode, and described 3rd power supply is used for providing initialization voltage.
3. image element circuit as claimed in claim 2, it is characterised in that described initialization voltage is negative voltage.
4. image element circuit as claimed in claim 1, it is characterised in that described the first film transistor is P-type TFT to the 9th thin film transistor (TFT).
5. image element circuit as claimed in claim 1, it is characterised in that also including the tenth thin film transistor (TFT), described tenth thin film transistor (TFT) is connected between described 7th thin film transistor (TFT) and primary nodal point, and its grid is connected to scan line.
6. image element circuit as claimed in claim 5, it is characterised in that described tenth thin film transistor (TFT) is P-type TFT.
7. the driving method of the image element circuit as according to any one of claim 1 to 6, it is characterised in that the scan period includes first time period, the second time period and the 3rd time period, wherein,
In first time period, the scanning signal that scan line provides is low level, scanning signal and the data signal of data wire offer that second scanning line and three scan line provide are high level, open the 7th thin film transistor (TFT), by the 3rd power supply, the voltage of primary nodal point are initialized；
In the second time period, the scanning signal that second scanning line provides is low level, scanning signal and the data signal of data wire offer that scan line and three scan line provide are high level, open the 9th thin film transistor (TFT), the second thin film transistor (TFT), the 4th thin film transistor (TFT) and the 8th thin film transistor (TFT), data signal is write the first electric capacity；
In the 3rd time period, scanning signal and the data signal of data wire offer that three scan line provides are low level, the scanning signal that scan line and the second scanning line provide is high level, open the 5th thin film transistor (TFT) and the 6th thin film transistor (TFT), drive electric current to flow second source along the first power supply through the path of the 5th thin film transistor (TFT), the 3rd thin film transistor (TFT), the 6th thin film transistor (TFT) and Organic Light Emitting Diode, cause Organic Light Emitting Diode to light luminescence.
8. the driving method of image element circuit as claimed in claim 7, it is characterized in that, when the second time period terminated, the scanning signal that the second scanning line provides is high level by low transition, and the voltage of described 3rd node raises and starts described primary nodal point is charged.
9. the driving method of image element circuit as claimed in claim 7 or 8, it is characterised in that described first power supply and second source are used as the driving power supply of described Organic Light Emitting Diode, and described 3rd power supply is used for providing initialization voltage.
10. an active matrix/organic light emitting display, it is characterised in that including: the image element circuit as according to any one of claim 1 to 6.
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