CN105718277B - Protection method, device and system for BIOS update - Google Patents
Protection method, device and system for BIOS update Download PDFInfo
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Abstract
The invention is suitable for the field of computer security, and provides a protection method, a device and a system for BIOS update, wherein the method comprises the following steps: when the equipment is in a power-on self-test POST stage, after the programmable logic device is started, a control signal is output only once, and a write protection pin of a ROM chip storing the BIOS is controlled to be in a write protection invalid state or a write protection valid state; when the BIOS is not needed to be updated and the write protection pin of the ROM chip is in a write protection valid state, the device enters an operating system and inhibits the BIOS from being updated through hardware protection. The write protection state of the ROM chip can be modified only once in the power-on self-test state, and when the BIOS is not required to be updated, the BIOS program is protected from being infected by viruses through hardware, so that the running safety of equipment is effectively improved.
Description
Technical Field
The invention belongs to the field of computer security, and particularly relates to a protection method, device and system for BIOS update.
Background
The BIOS (english is called Basic Input Output System, and chinese is called Basic Input Output System) is a set of programs that are solidified on a ROM chip on a computer motherboard. The BIOS stores the most important basic input and output programs of the computer, system setting information, power-on self-test program and system startup self-test program. The primary function of the BIOS is to provide the lowest level, most direct hardware setup and control for the computer. The use of the BIOS setup program may also troubleshoot system failures or diagnose system problems, allowing the system to operate in the best state.
At present, a Flash Rom chip is generally adopted to store a BIOS program, the Flash chip is generally used for reading and writing BIOS firmware by an SPI controller, and for software, an operating system and the firmware of the SPI controller can access the SPI controller at any time so as to realize updating and upgrading of the BIOS.
In a network environment, a computer may be infected with viruses, and when malicious viruses affect data in a ROM and modify BIOS contents, normal operation of the device may be affected. Therefore, an effective anti-virus method is needed to prevent the BIOS program from infecting virus.
Disclosure of Invention
The invention aims to provide a protection method, a device and a system for BIOS updating, which aim to solve the problem that in the prior art, when malicious virus execution influences data in a ROM and modifies BIOS content, normal operation of equipment is influenced.
The invention is realized in such a way that a BIOS updating method comprises the following steps:
when the equipment is in a power-on self-test POST stage, after the programmable logic device is started, a control signal is output only once, and a write protection pin of a ROM chip storing the BIOS is controlled to be in a write protection invalid state or a write protection valid state;
when the write protection pin of the ROM chip is in a write protection invalid state, the device enters an operating system to update the BIOS;
when the BIOS is not needed to be updated and the write protection pin of the ROM chip is in a write protection valid state, the device enters an operating system and inhibits the BIOS from being updated through hardware protection.
Another object of the present invention is to provide a protection device for BIOS update, the device comprising:
the control command output unit is used for outputting a control signal only once after the programmable logic device is started when the equipment is in a power-on self-test POST stage, and controlling a write protection pin of a ROM chip for storing the BIOS to be in a write protection invalid state or a write protection valid state;
the first BIOS updating unit is used for entering the operating system to update the BIOS when the write protection pin of the ROM chip is in a write protection invalid state;
and the BIOS updating forbidding unit is used for forbidding the BIOS updating by the equipment entering the operating system through hardware protection when the BIOS updating is not needed and the write protection pin of the ROM chip is in a write protection effective state.
The invention also provides a protection system for BIOS update, which comprises a CPU, a logic programmable device and a ROM chip, wherein a write protection pin of the ROM chip is connected with a general purpose input/output GPIO interface of the programmable logic device, an input pin of the programmable logic device is connected with the general purpose input/output GPIO interface of the CPU, and the protection system comprises:
when the equipment is in a power-on self-test POST stage, after the CPU programmable logic device is started, a control signal is output only once, and a write protection pin of a ROM chip storing the BIOS is controlled to be in a write protection invalid state or a write protection valid state;
when the write protection pin of the ROM chip is in a write protection invalid state, the device can enter an operating system to update the BIOS;
when the BIOS is not needed to be updated and the write protection pin of the ROM chip is in a write protection valid state, the device enters an operating system and inhibits the BIOS from being updated through hardware protection.
In the invention, when the device is in a power-on self-test POST stage, the programmable logic device can only send a write protection pin state modification instruction to the ROM chip once, when the write protection of the ROM chip is in an invalid state, the device can enter a system to carry out BIOS updating operation, when the BIOS updating is not needed, the ROM chip is in a write protection state, and the BIOS updating is prohibited in the system, so that the write protection state of the ROM chip can only be modified in a power-on self-test state, and when the BIOS updating is not needed, a BIOS program is protected from being infected by viruses through hardware, and the running safety of the device is effectively improved.
Drawings
FIG. 1 is a flow chart of an implementation of a method for protecting a BIOS update according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a hardware structure for implementing a protection method for BIOS update according to an embodiment of the present invention;
FIG. 3 is a flow chart of an implementation of controlling a write protect pin status of a ROM chip according to an embodiment of the present invention;
FIG. 4 is a flowchart illustrating an implementation of a method for protecting a BIOS update according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of a protection device for BIOS update according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
The embodiment of the invention is mainly used for solving the problems that the BIOS program is possibly infected by viruses in the prior art, and the viruses of the infected BIOS program are very difficult to check and kill. Because the consequences of BIOS infection with viruses are very serious, there is a need for an effective method to protect the BIOS program from viruses.
The BIOS updating method comprises the following steps: when the equipment is in a power-on self-test POST stage, after the programmable logic device is started, a control signal is output only once, and a write protection pin of a ROM chip storing the BIOS is controlled to be in a write protection invalid state or a write protection valid state; when the write protection pin of the ROM chip is in a write protection invalid state, the device enters an operating system to update the BIOS; when the BIOS is not needed to be updated and the write protection pin of the ROM chip is in a write protection valid state, the device enters an operating system and inhibits the BIOS from being updated through hardware protection.
By controlling the write protection pin of the ROM chip in the power-on self-test POST stage, the write protection state of the ROM chip can be modified only once in the power-on self-test state, and when BIOS updating is not needed, the BIOS program is protected from being infected by virus through hardware, the system can not modify the write protection state of the ROM chip, and the running safety of equipment can be improved. The following detailed description is made with reference to the accompanying drawings:
fig. 1 shows an implementation flow of the protection method for BIOS update according to the embodiment of the present invention, which is detailed as follows:
in step S101, when the device is in the power-on self-test POST stage, after the programmable logic device is started, a control signal is output only once to control the write protection pin of the ROM chip storing the BIOS to be in the write protection invalid state or the write protection valid state.
Specifically, the device may be a computer with a BIOS program.
The BIOS is used for storing a most important basic input and output program of the computer, system setting information, a post-power-on self-test program, and a system self-start program, and mainly includes:
self-diagnosis program: identifying hardware configuration by reading the content in the CMOSRAM, and carrying out self-inspection and initialization on the hardware configuration;
CMOS setting program: in the guiding process, the system is started by a special hot key, and is stored into a CMOS RAM after being set;
the system bootstrap loader: after the self-checking is successful, loading a bootstrap program on a disk relative to 0 track and 0 sector into a memory, and operating the bootstrap program to load a system;
drivers and interrupt servicing for primary I/O devices: because the BIOS directly interacts with system hardware resources, it is always specific to a certain type of hardware system, and various hardware systems are different, so there are various different types of BIOS.
The Power-On Self-Test (hereinafter referred to as Power On Self Test) stage refers to a process in which the system checks each internal device after the computer device is powered On. The complete POST self-test comprises a CPU, a 640K basic memory, an extended memory above 1M, a ROM, a mainboard, a CMOS memory, a serial-parallel port, a display card, a soft-hard disk subsystem and a keyboard test. If the problem is found in the self-checking, the system gives out prompt information or a warning sound signal is sent out by a loudspeaker.
In the invention, after the programmable logic device is started, a control signal is output only once, and the programmable logic device can receive control instructions sent by other controllers, such as a CPU, in a POST stage, or can also receive other trigger instructions, such as a hot key instruction received in the POST stage.
One specific implementation manner of the method may be to implement the protection method for BIOS update according to the hardware connection structure shown in fig. 2, as shown in fig. 2, the write protection pin of the ROM chip is connected to a general purpose input/output GPIO interface of the programmable logic device, and the input pin of the programmable logic device is connected to a general purpose input/output GPIO interface of the CPU.
When the device is in the power-on self-test POST stage, after the programmable logic device is started, a control signal is output only once, and the step of controlling the write protection pin of the ROM chip storing the BIOS to be in the write protection invalid state or the write protection valid state may include the steps shown in fig. 3:
in step S301, when the device is in the power-on self-test POST stage, the programmable logic device sends a read-write control instruction to the programmable logic device to start the programmable logic device.
In step S302, after the programmable logic device is started, a read/write control command is sent to the ROM chip only once, and the write protection pin of the ROM chip storing the BIOS is controlled to be in a write protection invalid state or a write protection valid state.
That is, in the present invention, after each startup of the programmable logic device (referred to as "PLD" for short), the programmable logic device can only control the output pin to output a control instruction once, where the control instruction may be to control the write protection pin of the ROM chip storing the BIOS to be in a write protection invalid state when the BIOS needs to be updated, or to control the write protection pin of the ROM chip storing the BIOS to be in a write protection valid state when the BIOS does not need to be updated.
The programmable logic device can only control the write protection pin once after being started, so that the write protection invalid state of the ROM chip can be prevented from being started under an operating system through the general input and output GPIO of the CPU.
In a preferred embodiment, the ROM chip is a Flash ROM chip, a write protection valid state is set when a write protection pin of the Flash ROM chip is at a low level, and a write protection invalid state is set when the write protection pin of the Flash ROM chip is at a high level.
In step S102, when the write protection pin of the ROM chip is in a write protection invalid state, the device enters an operating system to perform BIOS update.
When the write protection pin of the ROM chip is in a write protection invalid state, after the device enters an operating system, the BIOS can be updated by using a BIOS updating tool. Because the number of times of updating the BIOS is very small, the write protection pin of the Flash ROM is set to be in a write protection invalid state only when the BIOS needs to be updated in practice. And after the updating is finished and the equipment is restarted, the write protection pin of the Flash ROM is set to be in a write protection effective state, namely, only the BIOS program can be read, and the state of the BIOS program cannot be modified.
In step S103, when the BIOS does not need to be updated and the write protection pin of the ROM chip is in a write protection valid state, the device enters the operating system and prohibits the BIOS from being updated through hardware protection.
In the normal use process of the equipment, the state of the write protection pin of the Flash ROM can not be modified by a system through a programmable logic device. Therefore, virus program infection is effectively prevented from modifying data in the Flash ROM, and the safety of BIOS updating is ensured.
Fig. 4 shows an implementation flow of a protection method for a BIOS update according to an embodiment of the present invention, which is detailed as follows:
in step S401, when the device is in the power-on self-test POST stage, after the programmable logic device is started, a control signal is output only once to control the write protection pin of the ROM chip storing the BIOS to be in the write protection invalid state or the write protection valid state.
In step S402, when the write protection pin of the ROM chip is in a write protection invalid state, the device enters an operating system to perform BIOS update.
In step S403, when the BIOS does not need to be updated and the write protection pin of the ROM chip is in a write protection valid state, the device enters the operating system and prohibits the BIOS from being updated through hardware protection.
Steps S401 to S403 are substantially the same as steps S101 to S103 shown in fig. 1, and are not repeated herein.
In step S404, when the BIOS does not need to be updated and the write protection pin of the ROM chip is in a write protection valid state, a hot key instruction input by a user is received in a driver execution environment DXE phase in a power-on self-test POST phase of the device.
In step S405, a BIOS is updated in the DXE phase of the driver execution environment according to the received hotkey command.
Specifically, when the write protection pin of the current ROM chip of the device is in the write protection state, the device may be restarted or when the device is powered on, specifically, the driver in the POST phase executes the DXE phase, and receives a hot key instruction input by a user, where the hot key instruction may be a preset hot key or a hot key combination, such as ALT + F8, and after receiving the set hot key instruction, the BIOS update is directly completed in this phase. And setting the write protection pin to be in a write protection valid state after the BIOS is updated.
Fig. 5 is a schematic structural diagram of a protection device for BIOS update according to an embodiment of the present invention, where the protection device includes:
the control command output unit 501 is configured to output a control signal only once after the programmable logic device is started when the device is in a power-on self-test POST stage, and control a write protection pin of a ROM chip storing the BIOS to be in a write protection invalid state or a write protection valid state;
a first BIOS updating unit 502, configured to, when a write protection pin of the ROM chip is in a write protection invalid state, enter an operating system by the device to perform BIOS updating;
the BIOS prohibition updating unit 503 is configured to, when the BIOS does not need to be updated and the write protection pin of the ROM chip is in a write protection valid state, enter the operating system of the device and prohibit the BIOS from being updated through hardware protection.
Preferably, the control command output unit includes:
the read-write command sending subunit is used for sending a read-write control command to the programmable logic device by the CPU when the equipment is in a power-on self-test POST stage, and starting the programmable logic device;
and the write protection state changing subunit is used for sending a read-write control instruction only once to the ROM chip by the programmable logic device after the programmable logic device is started, and controlling a write protection pin of the ROM chip for storing the BIOS to be in a write protection invalid state or a write protection valid state.
Preferably, when the BIOS update is not required and the write protection pin of the ROM chip is in a write protection valid state, the apparatus further includes:
the hot key instruction receiving unit is used for receiving a hot key instruction input by a user in a DXE (driver execution environment) stage when the equipment is in a power-on self-test POST (POST) stage;
and the second BIOS updating unit is used for updating the BIOS in a DXE stage of the driver program execution environment according to the received hot key instruction.
Preferably, the ROM chip is a Flash ROM chip, the write protection valid state is when the write protection pin of the Flash ROM chip is at a low level, and the write protection invalid state is when the write protection pin of the Flash ROM chip is at a high level.
The BIOS update protection device shown in fig. 5 corresponds to the BIOS update protection method shown in fig. 1 and fig. 4.
In addition, as shown in fig. 2, the protection system for BIOS update provided in the embodiment of the present invention includes a CPU, a logic programmable device PLD, and a ROM chip, where a write protection pin of the ROM chip is connected to a general purpose input/output GPIO interface of the programmable logic device, and an input pin of the programmable logic device is connected to a general purpose input/output GPIO interface of the CPU, where:
when the equipment is in a power-on self-test POST stage, after the CPU programmable logic device is started, a control signal is output only once, and a write protection pin of a ROM chip storing the BIOS is controlled to be in a write protection invalid state or a write protection valid state;
when the write protection pin of the ROM chip is in a write protection invalid state, the device can enter an operating system to update the BIOS;
when the BIOS is not needed to be updated and the write protection pin of the ROM chip is in a write protection valid state, the device enters an operating system and inhibits the BIOS from being updated through hardware protection.
Preferably, the ROM chip is a Flash ROM chip, the write protection valid state is when the write protection pin of the Flash ROM chip is at a low level, and the write protection invalid state is when the write protection pin of the Flash ROM chip is at a high level.
In the embodiments provided in the present invention, it should be understood that the disclosed system, apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the units is only one logical division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents and improvements made within the spirit and principle of the present invention are intended to be included within the scope of the present invention.
Claims (10)
1. A protection method for BIOS update is characterized in that the method comprises the following steps:
when the equipment is in a power-on self-test POST stage, after the programmable logic device is started, a control signal is output only once, and a write protection pin of a ROM chip storing the BIOS is controlled to be in a write protection invalid state or a write protection valid state;
the programmable logic device receives control instructions sent by other controllers or receives other trigger instructions in a POST stage; when a write protection pin of a current ROM chip of the equipment is in a write protection state, through restarting or when the equipment is started, a driver in a POST stage executes DXE stage, receives a hot key instruction input by a user, directly completes BIOS updating in the driver executing DXE stage, and sets the write protection pin to be in a write protection effective state after completing BIOS updating;
when the write protection pin of the ROM chip is in a write protection invalid state, the device enters an operating system to update the BIOS;
when the BIOS is not needed to be updated and the write protection pin of the ROM chip is in a write protection valid state, the device enters an operating system and inhibits the BIOS from being updated through hardware protection.
2. The method of claim 1, wherein the write protection pin of the ROM chip is connected to a general purpose input output GPIO interface of a programmable logic device, and the input pin of the programmable logic device is connected to a general purpose input output GPIO interface of a CPU, wherein:
when the equipment is in a power-on self-test POST stage, outputting a primary control signal through a programmable logic device, and controlling a write protection pin of a ROM chip for storing the BIOS to be in a write protection invalid state or a write protection valid state, wherein the steps specifically comprise:
when the equipment is in a power-on self-test POST stage, the programmable logic device sends a read-write control instruction to the programmable logic device from the CPU, and the programmable logic device is started;
after the programmable logic device is started, a read-write control instruction which has only one time is sent to the ROM chip, and a write protection pin of the ROM chip storing the BIOS is controlled to be in a write protection invalid state or a write protection valid state.
3. The method of claim 1, wherein when the write protection pin of the ROM chip is in a write protection enabled state without requiring a BIOS update, the method further comprises:
receiving a hot key instruction input by a user at a driver execution environment DXE stage when the equipment is in a power-on self-test POST stage;
and updating the BIOS in a driver execution environment DXE stage according to the received hot key instruction.
4. The method according to claim 1, wherein the ROM chip is a Flash ROM chip, a write protection active state is performed when a write protection pin of the Flash ROM chip is at a low level, and a write protection inactive state is performed when the write protection pin of the Flash ROM chip is at a high level.
5. An apparatus for protecting BIOS updates, the apparatus comprising:
the control command output unit is used for outputting a control signal only once after the programmable logic device is started when the equipment is in a power-on self-test POST stage, and controlling a write protection pin of a ROM chip for storing the BIOS to be in a write protection invalid state or a write protection valid state; the programmable logic device receives control instructions sent by other controllers or receives other trigger instructions in a POST stage; when a write protection pin of a current ROM chip of the equipment is in a write protection state, through restarting or when the equipment is started, a driver in a POST stage executes DXE stage, receives a hot key instruction input by a user, directly completes BIOS updating in the driver executing DXE stage, and sets the write protection pin to be in a write protection effective state after completing BIOS updating;
the first BIOS updating unit is used for entering the operating system to update the BIOS when the write protection pin of the ROM chip is in a write protection invalid state;
and the BIOS updating forbidding unit is used for forbidding the BIOS updating by the equipment entering the operating system through hardware protection when the BIOS updating is not needed and the write protection pin of the ROM chip is in a write protection effective state.
6. The apparatus of claim 5, wherein the control command output unit comprises:
the read-write command sending subunit is used for sending a read-write control command to the programmable logic device by the CPU when the equipment is in a power-on self-test POST stage, and starting the programmable logic device;
and the write protection state changing subunit is used for sending a read-write control instruction only once to the ROM chip by the programmable logic device after the programmable logic device is started, and controlling a write protection pin of the ROM chip for storing the BIOS to be in a write protection invalid state or a write protection valid state.
7. The apparatus of claim 5, wherein when the write protection pin of the ROM chip is in a write protection enabled state without requiring a BIOS update, the apparatus further comprises:
the hot key instruction receiving unit is used for receiving a hot key instruction input by a user in a DXE (driver execution environment) stage when the equipment is in a power-on self-test POST (POST) stage;
and the second BIOS updating unit is used for updating the BIOS in a DXE stage of the driver program execution environment according to the received hot key instruction.
8. The apparatus according to claim 5, wherein the ROM chip is a Flash ROM chip, a write protect active state is performed when a write protect pin of the Flash ROM chip is at a low level, and a write protect inactive state is performed when the write protect pin of the Flash ROM chip is at a high level.
9. A protection system for BIOS update is characterized in that the system comprises a CPU, a logic programmable device and a ROM chip, wherein a write protection pin of the ROM chip is connected with a general purpose input/output GPIO interface of the programmable logic device, an input pin of the programmable logic device is connected with the general purpose input/output GPIO interface of the CPU, and the protection system comprises:
when the equipment is in a power-on self-test POST stage, after the CPU programmable logic device is started, a control signal is output only once, and a write protection pin of a ROM chip storing the BIOS is controlled to be in a write protection invalid state or a write protection valid state; the programmable logic device receives control instructions sent by other controllers or receives other trigger instructions in a POST stage; when a write protection pin of a current ROM chip of the equipment is in a write protection state, through restarting or when the equipment is started, a driver in a POST stage executes DXE stage, receives a hot key instruction input by a user, directly completes BIOS updating in the driver executing DXE stage, and sets the write protection pin to be in a write protection effective state after completing BIOS updating;
when the write protection pin of the ROM chip is in a write protection invalid state, the device can enter an operating system to update the BIOS;
when the BIOS is not needed to be updated and the write protection pin of the ROM chip is in a write protection valid state, the device enters an operating system and inhibits the BIOS from being updated through hardware protection.
10. The system according to claim 9, wherein the ROM chip is a Flash ROM chip, a write protect active state is performed when a write protect pin of the Flash ROM chip is at a low level, and a write protect inactive state is performed when the write protect pin of the Flash ROM chip is at a high level.
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