CN105511803A - Processing method of erasing interruption of storage mediums - Google Patents
Processing method of erasing interruption of storage mediums Download PDFInfo
- Publication number
- CN105511803A CN105511803A CN201510835180.XA CN201510835180A CN105511803A CN 105511803 A CN105511803 A CN 105511803A CN 201510835180 A CN201510835180 A CN 201510835180A CN 105511803 A CN105511803 A CN 105511803A
- Authority
- CN
- China
- Prior art keywords
- storage unit
- erasing
- storage medium
- interruption
- soft programming
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0891—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches using clearing, invalidating or resetting means
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1668—Details of memory controller
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Read Only Memory (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Abstract
The invention discloses a processing method of erasing interruption of storage mediums. The method comprises following steps of: S1, receiving an erasing instruction and starting to perform erasing operation to a target storage unit; S2, receiving an interruption instruction and performing electric operation to storage mediums; S3, S3, determining whether interruption exists in the erasing process and executing the step S4 if does and ending operation this time if not; and S4, erasing and correcting or performing soft programming operation on the target storage unit. The embodiment of the processing method of erasing interruption of storage mediums tends to perform erasing and correcting or performing soft programming operation on the target storage unit if interruption exists in the erasing process in order to reduce occurrences of read errors of a storage unit.
Description
Technical field
The embodiment of the present invention relates to technical field of memory, is specifically related to a kind of erasing interruption processing method of storage medium.
Background technology
Nonvolatile flash memory medium (norflash/nandflash) is a kind of very common storage chip, have random access memory (RandomAccessMemory concurrently, and ROM (read-only memory) (ReadOnlyMemory RAM), ROM) advantage, data power down can not be lost, be a kind ofly can carry out the erasable storer of electricity in system, its high integration and low cost make it become the market mainstream simultaneously.
Flash chip is made up of thousands of of inside storage unit, each storage element stores a data, multiple storage unit forms page, multiple pages of blockings, just because of the physical arrangement that this is special, be read and write data in units of page in norflash/nandflash, in units of block, carry out obliterated data.
But in the process of carrying out wiping in units of block, user may send interrupt instruction and carry out interrupted-erase operation, and like this in the block of erasing, some storage unit will be in erase status, these unit were called erase unit.The existence of crossing erase unit can cause some storage unit generation read error events, is therefore necessary to design a kind of method to reduce the generation of read error event.
Summary of the invention
The invention provides a kind of erasing interruption processing method of storage medium, to reduce the generation of read error event.
Embodiments provide a kind of erasing interruption processing method of storage medium, the method comprises:
S1, reception erasing instruction, start to perform erase operation to Destination Storage Unit;
S2, receive interruption instruction lower electricity operation is performed to described storage medium;
S3, judge interrupt whether occur in erase process, if then perform step S4, otherwise terminate this operation;
S4, erasure correction or soft programming were performed to described Destination Storage Unit.
Preferably, described receive interruption instruction lower electricity operation is performed to described storage medium comprise:
Receive interruption instruction also closes the reference circuit of described storage medium.
Erasure correction was performed to described Destination Storage Unit or soft programming comprises:
If when to recognize described storage medium be norflash, then performed erasure correction to described Destination Storage Unit;
If when to recognize described storage medium be nandflash, then soft programming is performed to described Destination Storage Unit.
Further, erasure correction was performed to described Destination Storage Unit or soft programming comprises:
Change the threshold voltage of Destination Storage Unit.
Embodiments provide a kind of erasing interruption processing method of storage medium, by judging to interrupt whether occurring in erase process, if so, then erasure correction or soft programming were performed to Destination Storage Unit, to reduce the generation of the read error event of storage unit.
Accompanying drawing explanation
Fig. 1 is the erasing interruption processing method process flow diagram of a kind of storage medium in the embodiment of the present invention one.
Embodiment
Below in conjunction with drawings and Examples, the present invention is described in further detail.Be understandable that, specific embodiment described herein is only for explaining the present invention, but not limitation of the invention.It also should be noted that, for convenience of description, illustrate only part related to the present invention in accompanying drawing but not entire infrastructure.
Embodiment one
The erasing interruption processing method process flow diagram of a kind of storage medium that Fig. 1 provides for the embodiment of the present invention one, the present embodiment is applicable to the situation receiving suddenly interrupt instruction in the process of wiping storage chip, the method can be performed by the device of obliterated data, and this device can adopt the form of hardware and/or software to realize.
The method is specific as follows:
S1, reception erasing instruction, start to perform erase operation to Destination Storage Unit;
S2, receive interruption instruction lower electricity operation is performed to described storage medium;
Preferably, described receive interruption instruction lower electricity operation is performed to described storage medium comprise:
Receive interruption instruction also closes the reference circuit of described storage medium.
Interrupt instruction is the instruction that a priority is very high, and when system is performing a certain operation, if the interrupt instruction of receiving, so system can stop described operation immediately, responds interrupt instruction at once, goes to perform another operation.Such as, in norflash, when system performs erase operation, if the interrupt instruction of receiving and 66H+99H, then system will stop erase operation going to respond interrupt instruction immediately, some reference circuits etc. so participating in erase operation just need not work on, and can close, i.e. receive interruption instruction perform lower electricity operation to described storage medium.In nandflash, interrupt instruction is FFH.
S3, judge interrupt whether occur in erase process, if then perform step S4, otherwise terminate this operation;
Preferably, judge to interrupt whether occurring in erase process, can be by arranging zone bit, when system performs erase operation, zone bit is set to 1, and after erase operation completes, zone bit is set to 0, if detect that zone bit is 1, then execution step S4-erasure correction or soft programming were performed to described Destination Storage Unit, otherwise terminate this operation.
It should be noted that, erase operation is write as 1 storage unit from 0, the threshold voltage of storage unit reduces, because erasing is wiped in units of block, therefore the threshold voltage of some storage unit can be pulled down to negative value, and these threshold voltages are that the storage unit of negative value was called as erase unit.These cross erase unit when word line voltage is 0, and bit line just has electric leakage, just because of the existence of electric leakage, when carrying out read operation, will affect the read operation of storage unit, misreading into 10, and read error event occurs.Normal erase process can these threshold voltages crossing erase unit raise again on the occasion of, if but interrupt in erase process, erase operation can be stopped, so described electric leakage will exist, read error event will occur, so need to perform erasure correction or soft programming to described erase unit of crossing.
S4, erasure correction or soft programming were performed to described Destination Storage Unit.
Preferably, erasure correction was performed to described Destination Storage Unit or soft programming comprises:
If when to recognize described storage medium be norflash, then performed erasure correction to described Destination Storage Unit;
If when to recognize described storage medium be nandflash, then soft programming is performed to described Destination Storage Unit.
Further, erasure correction was performed to described Destination Storage Unit or soft programming comprises: the threshold voltage changing Destination Storage Unit.Eliminated the existence of electric leakage by the threshold voltage improving storage unit, reduce the generation of read error event.
Embodiments provide a kind of erasing interruption processing method of storage medium, by judging to interrupt whether occurring in erase process, if, then erasure correction or soft programming were performed to Destination Storage Unit, the existence of electric leakage is eliminated, to reduce the generation of the read error event of storage unit by the threshold voltage improving described storage unit.
Note, above are only preferred embodiment of the present invention and institute's application technology principle.Skilled person in the art will appreciate that and the invention is not restricted to specific embodiment described here, various obvious change can be carried out for a person skilled in the art, readjust and substitute and can not protection scope of the present invention be departed from.Therefore, although be described in further detail invention has been by above embodiment, the present invention is not limited only to above embodiment, when not departing from the present invention's design, can also comprise other Equivalent embodiments more, and scope of the present invention is determined by appended right.
Claims (4)
1. an erasing interruption processing method for storage medium, is characterized in that, comprising:
S1, reception erasing instruction, start to perform erase operation to Destination Storage Unit;
S2, receive interruption instruction lower electricity operation is performed to described storage medium;
S3, judge interrupt whether occur in erase process, if then perform step S4, otherwise terminate this operation;
S4, erasure correction or soft programming were performed to described Destination Storage Unit.
2. method according to claim 1, is characterized in that, described receive interruption instruction also comprises the lower electricity operation of described storage medium execution:
Receive interruption instruction also closes the reference circuit of described storage medium.
3. method according to claim 1, is characterized in that, performs erasure correction or soft programming comprises to described Destination Storage Unit:
If when to recognize described storage medium be norflash, then performed erasure correction to described Destination Storage Unit;
If when to recognize described storage medium be nandflash, then soft programming is performed to described Destination Storage Unit.
4. method according to claim 3, is characterized in that, performs erasure correction or soft programming comprises to described Destination Storage Unit:
Change the threshold voltage of Destination Storage Unit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510835180.XA CN105511803A (en) | 2015-11-26 | 2015-11-26 | Processing method of erasing interruption of storage mediums |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510835180.XA CN105511803A (en) | 2015-11-26 | 2015-11-26 | Processing method of erasing interruption of storage mediums |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN105511803A true CN105511803A (en) | 2016-04-20 |
Family
ID=55719823
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510835180.XA Pending CN105511803A (en) | 2015-11-26 | 2015-11-26 | Processing method of erasing interruption of storage mediums |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105511803A (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106205722A (en) * | 2016-07-07 | 2016-12-07 | 北京兆易创新科技股份有限公司 | The restoration methods of a kind of nonvolatile memory and device |
| CN110827906A (en) * | 2018-08-10 | 2020-02-21 | 爱思开海力士有限公司 | Memory system and operating method thereof |
| CN113409853A (en) * | 2021-05-21 | 2021-09-17 | 芯天下技术股份有限公司 | Method, device, storage medium and terminal for reducing probability of reading error after power failure |
| CN113409859A (en) * | 2021-05-21 | 2021-09-17 | 芯天下技术股份有限公司 | Method, device, storage medium and terminal for preventing reading error caused by over-erasure |
| CN113409862A (en) * | 2021-06-28 | 2021-09-17 | 芯天下技术股份有限公司 | Memory erasing method and device, electronic equipment and storage medium |
| CN115132256A (en) * | 2022-07-11 | 2022-09-30 | 南京优存科技有限公司 | NOR type flash memory chip and erasing operation control system and method thereof |
| CN115312108A (en) * | 2022-09-30 | 2022-11-08 | 芯天下技术股份有限公司 | Read-write method of memory chip, electronic device and storage medium |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030202776A1 (en) * | 2002-04-24 | 2003-10-30 | Kendall Scott Allan | Continuous digital recording through channel changes with user selectable buffer erase |
| CN104376872A (en) * | 2013-08-16 | 2015-02-25 | 北京兆易创新科技股份有限公司 | Method for processing erase interrupt of flash memory |
| CN104751885A (en) * | 2013-12-30 | 2015-07-01 | 北京兆易创新科技股份有限公司 | FLASH chip and erasure or programming method for responding to FLASH chip abnormal power-down |
-
2015
- 2015-11-26 CN CN201510835180.XA patent/CN105511803A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030202776A1 (en) * | 2002-04-24 | 2003-10-30 | Kendall Scott Allan | Continuous digital recording through channel changes with user selectable buffer erase |
| CN104376872A (en) * | 2013-08-16 | 2015-02-25 | 北京兆易创新科技股份有限公司 | Method for processing erase interrupt of flash memory |
| CN104751885A (en) * | 2013-12-30 | 2015-07-01 | 北京兆易创新科技股份有限公司 | FLASH chip and erasure or programming method for responding to FLASH chip abnormal power-down |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106205722A (en) * | 2016-07-07 | 2016-12-07 | 北京兆易创新科技股份有限公司 | The restoration methods of a kind of nonvolatile memory and device |
| CN110827906A (en) * | 2018-08-10 | 2020-02-21 | 爱思开海力士有限公司 | Memory system and operating method thereof |
| CN110827906B (en) * | 2018-08-10 | 2023-11-07 | 爱思开海力士有限公司 | Memory system and method of operating the same |
| CN113409853A (en) * | 2021-05-21 | 2021-09-17 | 芯天下技术股份有限公司 | Method, device, storage medium and terminal for reducing probability of reading error after power failure |
| CN113409859A (en) * | 2021-05-21 | 2021-09-17 | 芯天下技术股份有限公司 | Method, device, storage medium and terminal for preventing reading error caused by over-erasure |
| CN113409853B (en) * | 2021-05-21 | 2023-08-25 | 芯天下技术股份有限公司 | Method, device, storage medium and terminal for reducing probability of reading error after power failure |
| CN113409862A (en) * | 2021-06-28 | 2021-09-17 | 芯天下技术股份有限公司 | Memory erasing method and device, electronic equipment and storage medium |
| CN115132256A (en) * | 2022-07-11 | 2022-09-30 | 南京优存科技有限公司 | NOR type flash memory chip and erasing operation control system and method thereof |
| CN115312108A (en) * | 2022-09-30 | 2022-11-08 | 芯天下技术股份有限公司 | Read-write method of memory chip, electronic device and storage medium |
| CN115312108B (en) * | 2022-09-30 | 2022-12-16 | 芯天下技术股份有限公司 | Read-write method of memory chip, electronic device and storage medium |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN105511803A (en) | Processing method of erasing interruption of storage mediums | |
| US8832530B2 (en) | Techniques associated with a read and write window budget for a two level memory system | |
| US10120751B2 (en) | Techniques to recover data using exclusive OR (XOR) parity information | |
| US10310772B2 (en) | Memory control method and memory control apparatus | |
| US9324435B2 (en) | Data transmitting method, memory control circuit unit and memory storage apparatus | |
| KR20140093227A (en) | Systems and methods of generating a replacement default read threshold | |
| US8897092B2 (en) | Memory storage device, memory controller and controlling method | |
| US9208021B2 (en) | Data writing method, memory storage device, and memory controller | |
| CN103745753A (en) | Error correction method and system based on flash memory | |
| CN111429960B (en) | Method, controller and related storage device for improving read retry of flash memory | |
| CN106205722A (en) | The restoration methods of a kind of nonvolatile memory and device | |
| CN105489244A (en) | Erasing method of nonvolatile storage | |
| CN106776104A (en) | A kind of method of Nand Flash controllers and terminal and control Nand Flash | |
| CN104376872A (en) | Method for processing erase interrupt of flash memory | |
| EP3176789A1 (en) | Memory control method and apparatus | |
| CN104751897A (en) | Programming method of nonvolatile memory | |
| CN105575430A (en) | Erasing method of nonvolatile memory | |
| CN105575427A (en) | Erasing method of nonvolatile memory | |
| CN104751889A (en) | Nonvolatile memory reset method | |
| CN108255633B (en) | Storage control method and storage device | |
| US9229798B2 (en) | Error handling method, memory storage device and memory controlling circuit unit | |
| CN104217757B (en) | Programming method of nonvolatile memory | |
| CN110364211B (en) | Method, device and equipment for reducing erasing interference time of nonvolatile memory | |
| CN110908825B (en) | A data reading method, device, storage device and storage medium | |
| US20130272068A1 (en) | Managing of the erasing of operative pages of a flash memory device through service pages |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20160420 |
|
| RJ01 | Rejection of invention patent application after publication |