CN105406700A - Photovoltaic inverter bus capacitance pressure equalization and bus overvoltage protection control circuit and system - Google Patents
Photovoltaic inverter bus capacitance pressure equalization and bus overvoltage protection control circuit and system Download PDFInfo
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- CN105406700A CN105406700A CN201510976311.6A CN201510976311A CN105406700A CN 105406700 A CN105406700 A CN 105406700A CN 201510976311 A CN201510976311 A CN 201510976311A CN 105406700 A CN105406700 A CN 105406700A
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- H—ELECTRICITY
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- H—ELECTRICITY
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- H02H7/12—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers
- H02H7/122—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers for inverters, i.e. DC/AC converters
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Abstract
本发明公开一种光伏逆变器母线电容均压及母线过压保护控制电路,包括有与光伏阵列电性连接的升压模块、与市电网电性连接的逆变模块和连接上述模块的正极母线与负极母线,还包括有:母线电容组,包括至少一组串联电容器组,各组串联电容器组并联在正极母线和负极母线之间;电容电压均衡模块,其并联在正极母线和负极母线之间,用以均衡母线电容组的各电容器电压;过压保护模块,用以检测正负极母线间的电压,当电压超过设定值时通过反馈升压模块以降低其输出电压。本发明的保护电路,电路简单,无需复杂的控制电路就能够实现电容电压的均衡,而且电容电压的均衡是自平衡过程;硬件保护电路具备高低压隔离,对母线电压响应快速,具备可靠的保护措施。
The invention discloses a photovoltaic inverter bus capacitor voltage equalization and bus overvoltage protection control circuit, which includes a boost module electrically connected to a photovoltaic array, an inverter module electrically connected to a municipal power grid, and a positive electrode connected to the module The bus bar and the negative bus bar also include: a bus capacitor group, including at least one series capacitor group, and each series capacitor group is connected in parallel between the positive bus bar and the negative bus bar; a capacitor voltage equalization module, which is connected in parallel between the positive bus bar and the negative bus bar Between them, it is used to equalize the voltage of each capacitor in the bus capacitor group; the overvoltage protection module is used to detect the voltage between the positive and negative bus bars, and when the voltage exceeds the set value, the output voltage is reduced through the feedback boost module. The protection circuit of the present invention has a simple circuit and can realize the balance of capacitor voltage without complex control circuit, and the balance of capacitor voltage is a self-balancing process; the hardware protection circuit has high and low voltage isolation, fast response to bus voltage, and reliable protection measure.
Description
技术领域technical field
本发明涉及光伏逆变器技术领域,具体涉及了一种光伏逆变器母线电容均压及母线过压保护控制电路。The invention relates to the technical field of photovoltaic inverters, in particular to a photovoltaic inverter bus capacitor voltage equalization and bus overvoltage protection control circuit.
背景技术Background technique
在光伏逆变器中,需要通过直流母线与逆变单元连接,直流母线提供高幅值的脉动电流给逆变器,并在母线上产生脉动电压,故需要电容对直流母线作为支撑。母线电容主要吸收直流母线上的高幅值脉动电流,使输入电压波动保持在允许范围。同时母线电容作为光伏输入功率和并网输出功率之间的缓冲,实现输入能量和输出能量的平衡,是输入直流功率和输出交流功率解耦必须的元件。母线电容的可靠性直接影响逆变器工作的可靠性,成为逆变器性能的重要一环。In the photovoltaic inverter, it needs to be connected to the inverter unit through the DC bus. The DC bus provides high-amplitude pulsating current to the inverter and generates pulsating voltage on the bus. Therefore, capacitors are required to support the DC bus. The bus capacitor mainly absorbs the high-amplitude pulsating current on the DC bus to keep the input voltage fluctuation within the allowable range. At the same time, the bus capacitor acts as a buffer between photovoltaic input power and grid-connected output power to achieve a balance between input energy and output energy. It is a necessary component for decoupling input DC power and output AC power. The reliability of the bus capacitor directly affects the reliability of the inverter and becomes an important part of the inverter performance.
光伏逆变器中,由于直流母线工作电压较高,而且该耐压等级的电容不容易选型,通常将两个耐压较低的、耐压和容量相同的电解电容进行串联并且多组进行并联的方式,使总电压适应母线工作电压等级。由于电容的个体差异,逆变器工作中,两个分压电容上的电压会不同,一个电压高一个电压低,电压高的可能超过电容的耐压值,引起电容的损坏。现有技术中,通常采取直接在两个串联电容上分别并联相同的电阻的方法,通过电阻消耗掉电容上过多的能量,以此抑制过高电压,但该方法不能实现电容上的电压均等。In photovoltaic inverters, due to the high operating voltage of the DC bus and the difficulty in selecting capacitors of this withstand voltage level, two electrolytic capacitors with lower withstand voltage and the same withstand voltage and capacity are usually connected in series and multiple groups are connected. The way of parallel connection makes the total voltage adapt to the working voltage level of the busbar. Due to individual differences in capacitance, the voltages on the two voltage-dividing capacitors will be different during the operation of the inverter. One voltage is higher and the other is lower. The higher voltage may exceed the withstand voltage value of the capacitor, causing damage to the capacitor. In the prior art, the method of directly connecting the same resistors in parallel to the two series capacitors is usually adopted, and the excess energy on the capacitors is consumed through the resistors, thereby suppressing excessive high voltage, but this method cannot achieve equal voltage on the capacitors .
中小功率光伏逆变器一般采用升压加逆变的两级功率拓扑,母线电压由前级升压电路对光伏输入进行升压得到,通常母线过压保护由程序软件实现,而缺乏相应的硬件保护电路,实际上软件保护响应速度相对较慢。针对上述问题,现有技术还有待改进。Small and medium power photovoltaic inverters generally adopt a two-stage power topology of boost and inverter. The bus voltage is obtained by boosting the photovoltaic input by the previous step-up circuit. Usually, the bus overvoltage protection is implemented by program software, and lacks corresponding hardware. Protection circuit, in fact, the response speed of software protection is relatively slow. For the above problems, the prior art still needs to be improved.
发明内容Contents of the invention
本发明的目的在于克服上述不足,提供一种实现各电容电压均衡和母线电压过压保护的光伏逆变器保护电路。The purpose of the present invention is to overcome the above disadvantages, and provide a photovoltaic inverter protection circuit that realizes the voltage balance of each capacitor and the overvoltage protection of the bus voltage.
为达到上述发明的目的,本发明通过以下技术方案实现:In order to achieve the purpose of the foregoing invention, the present invention is realized through the following technical solutions:
本发明的一种光伏逆变器母线电容均压及母线过压保护控制电路,包括有与光伏阵列电性连接的升压模块、与市电网电性连接的逆变模块和连接上述模块的正极母线与负极母线,还包括有:A photovoltaic inverter bus capacitor voltage equalization and bus overvoltage protection control circuit of the present invention includes a boost module electrically connected to the photovoltaic array, an inverter module electrically connected to the mains grid, and a positive electrode connected to the modules The busbar and the negative busbar also include:
母线电容组,包括至少一组串联电容器组,各组串联电容器组并联在正极母线和负极母线之间;The bus capacitor group includes at least one series capacitor group, and each series capacitor group is connected in parallel between the positive bus bar and the negative bus bar;
电容电压均衡模块,其并联在正极母线和负极母线之间,用以均衡母线电容组的各电容器电压;A capacitor voltage equalization module, which is connected in parallel between the positive bus and the negative bus, to balance the voltage of each capacitor in the bus capacitor group;
过压保护模块,用以检测正负极母线间的电压,当电压超过设定值时通过反馈升压模块以降低其输出电压。The overvoltage protection module is used to detect the voltage between the positive and negative bus bars, and when the voltage exceeds the set value, the output voltage is reduced by feeding back the boost module.
进一步,所述母线电容组的各组串联电容的共点端相连接,还包括有第一耗散电阻和第二耗散电阻,第一耗散电阻的一端连接负极母线,另一端连接串联电容的共点端,第二耗散电阻的一端连接正极母线,另一端连接串联电容的共点端。Further, the common points of each group of series capacitors of the bus capacitor group are connected, and also include a first dissipation resistor and a second dissipation resistor, one end of the first dissipation resistor is connected to the negative bus, and the other end is connected to the series capacitor One end of the second dissipation resistor is connected to the positive busbar, and the other end is connected to the common end of the series capacitor.
进一步,所述电容电压均衡模块包括有第一三极管和第二三极管,第一三极管为NPN型三极管,第二三极管为PNP型三极管,第一三极管的发射极与第二型三极管的发射极共点连接,并与母线电容组(11)的串联电容共点端相连接,第一三极管的集电极串联至少一个电阻后与正极母线电性连接,第二三极管的集电极串联至少一个电阻后与负极母线电性连接,第一三极管的基极与第二三极管的基极在A共点端电性连接,该共点端分出两路,分别串联有至少一个电阻后与正极母线、负极母线电性连接。Further, the capacitor voltage equalization module includes a first triode and a second triode, the first triode is an NPN type triode, the second triode is a PNP type triode, and the emitter of the first triode It is connected to the common point of the emitter of the second-type triode, and connected to the common point of the series capacitor of the bus capacitor group (11). The collector of the first triode is electrically connected to the positive bus after at least one resistor is connected in series. The collectors of the two triodes are connected in series with at least one resistor and then electrically connected to the negative busbar. The bases of the first triode and the bases of the second triode are electrically connected at the common point A, and the common point is divided into There are two circuits, and at least one resistor is connected in series respectively to be electrically connected to the positive busbar and the negative busbar.
进一步,所述过压保护模块包括有第三三极管、光电耦合器和比较器;所述第三三极管发射极与负极母线电线连接,第三三极管的集电极经过光电耦合器的发光二极管后串联至少一个电阻器后与正极母线电性连接,发光二极管与电阻器的共点端还分出一路串联第一电容电阻并联电路后与负极母线连接,第三三极管的基极串联稳压二极管后再串联至少一个电阻器后与正极母线电性连接,稳压二极管与电阻器的共点端还分出一路串联第二电容电阻并联电路后与负极母线连接;所述光电耦合器的光敏三极管的集电极外接第一供电端,发射极电性连接比较器的负输入引脚,比较器的输出引脚向升压模块输出使能信号,输出引脚与正输入引脚之间还连接有正反馈电路。Further, the overvoltage protection module includes a third triode, a photocoupler and a comparator; the emitter of the third triode is connected to the negative bus wire, and the collector of the third triode passes through the photocoupler The light-emitting diode is connected in series with at least one resistor and then electrically connected to the positive busbar. The common point of the light-emitting diode and the resistor is also connected to the negative busbar after being connected in series with the first capacitor and resistor in parallel. The base of the third triode The pole series Zener diode is connected in series with at least one resistor and then electrically connected to the positive busbar, and the common point end of the Zener diode and the resistor is divided into a parallel circuit of the second capacitor and resistor connected in series and then connected to the negative busbar; The collector of the phototransistor of the coupler is externally connected to the first power supply terminal, and the emitter is electrically connected to the negative input pin of the comparator. The output pin of the comparator outputs an enabling signal to the boost module, and the output pin and the positive input pin A positive feedback circuit is also connected between them.
进一步,所述正反馈电路为:比较器的输出引脚串联第一反馈电阻、再反向串联二极管后与比较器的正输入引脚电性连接,二级管与正输入引脚的共点端还串联第二反馈电阻后连接第二供电端,正输入引脚与接地端之间还串联有保护电容。Further, the positive feedback circuit is: the output pin of the comparator is connected in series with the first feedback resistor, and then the diode is connected in reverse series with the positive input pin of the comparator, and the common point of the diode and the positive input pin is The second feedback resistor is connected in series to the second power supply terminal, and a protection capacitor is connected in series between the positive input pin and the ground terminal.
进一步,所述光敏三极管的发射极与接地端之间串联有第三电容电阻并联电路。Further, a third capacitance-resistance parallel circuit is connected in series between the emitter of the phototransistor and the ground terminal.
本发明的一种光伏逆变器母线电容均压及母线过压保护控制电路实现如下技术效果:A photovoltaic inverter bus capacitor voltage equalization and bus overvoltage protection control circuit of the present invention achieves the following technical effects:
1.电路简单,无需复杂的控制电路就能够实现电容电压的均衡,而且电容电压的均衡是自平衡过程。1. The circuit is simple, and the balance of the capacitor voltage can be realized without complicated control circuits, and the balance of the capacitor voltage is a self-balancing process.
2.硬件保护电路具备高低压隔离,对母线电压响应快速,具备可靠的保护措施。2. The hardware protection circuit has high and low voltage isolation, fast response to the bus voltage, and reliable protection measures.
附图说明Description of drawings
图1是本发明的光伏逆变器母线电容均压及母线过压保护控制电路的原理示意图。Fig. 1 is a schematic diagram of the principle of the photovoltaic inverter bus capacitor voltage equalization and bus overvoltage protection control circuit of the present invention.
图2是本发明的光伏逆变器母线电容均压及母线过压保护控制电路的电路图;Fig. 2 is the circuit diagram of photovoltaic inverter bus capacitor voltage equalization and bus overvoltage protection control circuit of the present invention;
具体实施方式detailed description
实施例Example
下面结合附图和实施例对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部实施例。The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings and embodiments. Apparently, the described embodiments are only some of the embodiments of the present invention, not all of them.
请参看图1分别为本发明的光伏逆变器母线电容均压及母线过压保护控制电路的原理示意图。Please refer to FIG. 1 , which are schematic diagrams of the photovoltaic inverter bus capacitor voltage equalization and bus overvoltage protection control circuits according to the present invention.
本发明的一种光伏逆变器母线电容均压及母线过压保护控制电路10,包括有与光伏阵列20电性连接的升压模块14、与市电网30电性连接的逆变模块15和连接上述模块的正极母线与负极母线,还包括有:A photovoltaic inverter bus capacitor voltage equalization and bus overvoltage protection control circuit 10 of the present invention includes a boost module 14 electrically connected to the photovoltaic array 20, an inverter module 15 electrically connected to the mains grid 30 and The positive busbar and negative busbar connecting the above modules also include:
母线电容组11,包括至少一组串联电容器组,各组串联电容器组并联在正极母线BUS+和负极母线BUS-之间;The bus capacitor group 11 includes at least one series capacitor group, and each series capacitor group is connected in parallel between the positive bus BUS+ and the negative bus BUS-;
电容电压均衡模块12,其并联在正极母线BUS+和负极母线BUS-之间,用以均衡母线电容组的各电容器电压;Capacitor voltage equalization module 12, which is connected in parallel between the positive bus BUS+ and the negative bus BUS-, to balance the voltage of each capacitor of the bus capacitor group;
过压保护模块13,用以检测正负极母线BUS+、BUS+间的电压,当电压超过设定值时通过反馈升压模块14以降低其输出电压。The overvoltage protection module 13 is used to detect the voltage between the positive and negative busbars BUS+ and BUS+, and when the voltage exceeds the set value, the output voltage is reduced through the feedback boost module 14.
请参看图2,所述母线电容组11的各组串联电容的共点端相串联,在本实施例中上述串联电容的共点端标记为BUSN共点端,还包括有第一耗散电阻R40和第二耗散电阻R15,第一耗散电阻R40的一端连接负极母线BUS-,另一端连接串联电容的共点端,第二耗散电阻R15的一端连接正极母线BUS+,另一端连接串联电容的共点端。Please refer to Fig. 2, the common point terminals of each group of series capacitors of the bus capacitor group 11 are connected in series, and in this embodiment, the common point terminals of the above series capacitors are marked as BUSN common point terminals, and also include a first dissipation resistor R40 and the second dissipative resistor R15, one end of the first dissipative resistor R40 is connected to the negative bus BUS-, the other end is connected to the common point of the series capacitor, one end of the second dissipative resistor R15 is connected to the positive bus BUS+, and the other end is connected to the series capacitor common point of the capacitor.
所述电容电压均衡模块12包括有第一三极管Q1和第二三极管Q6,第一三极管Q1为NPN型三极管,第二三极管Q6为PNP型三极管,第一三极管Q1的发射极与第二型三极管Q6的发射极共点连接,并与母线电容组(11)的串联电容共点端相连接,第一三极管Q1的集电极串联至少一个电阻后与正极母线BUS+电性连接,第二三极管Q6的集电极串联至少一个电阻后与负极母线BUS-电性连接,第一三极管Q1的基极与第二三极管Q6的基极在A共点端电性连接,该A共点端分出两路,分别串联有至少一个电阻后与正极母线BUS+、负极母线BUS-电性连接。The capacitor voltage balancing module 12 includes a first transistor Q1 and a second transistor Q6, the first transistor Q1 is an NPN transistor, the second transistor Q6 is a PNP transistor, and the first transistor Q6 is a PNP transistor. The emitter of Q1 is connected to the common point of the emitter of the second type triode Q6, and is connected to the common point of the series capacitor of the bus capacitor group (11), and the collector of the first triode Q1 is connected to the positive pole after at least one resistor The bus BUS+ is electrically connected, the collector of the second transistor Q6 is electrically connected to the negative bus BUS- after being connected in series with at least one resistor, the base of the first transistor Q1 and the base of the second transistor Q6 are connected at A The common-point terminal is electrically connected, and the A-common-point terminal is divided into two circuits, and at least one resistor is connected in series respectively to be electrically connected to the positive bus BUS+ and the negative bus BUS-.
在本实施例中,A共点端分为两路后,一路串联有第一均衡电阻R2和第二均衡电阻R9后与正极母线连接,另一路串联第三均衡电阻R43和第四均衡电阻R50后与负极母线连接,A共点端的电压经第一至第四均衡电阻R2、R9、R43、R50分压,所以A共点端的电压为Vbus/2。电路工作原理在于,根据A共点端与BUSN共点端的电压差,上述电压差加于第一、第二三极管Q1、Q6的基极-发射极上,使相应的三极管导通,形成电容充放电回路。具体的,设正极母线BUS+和BUSN共点端之间的电容记为Ca,其电压为Va,BUSN和负极母线BUS-之间的电容记为Cb,其电压为Vb。当串联电容电压不等时,假如Va大于Vb,即Va>Vbus/2,即Vb<Vbus/2,此时第一三极管Q1导通,第二三极管Q6关断,母线电压经第一三极管Q1集电极的串联电阻和第一三极管Q1为电容Cb充电,电压Vb升高,同时电容Ca经第一三极管Q1集电极的串联电阻和三极管Q1放电,电压Va降低,直至Va和Vb相等,即均为Vbus/2,此时此时第一三极管Q1关断。反之,当Va小于Vb,第二三极管Q6导通、第一三极管Q1关断,母线电压经第二三极管Q6集电极的串联电阻和第二三极管Q6为电容Ca充电,电压Va升高,同时电容Cb经第二三极管Q6集电极的串联电阻和第二三极管Q6放电,电压Vb降低,最终电压达到均衡。In this embodiment, after the common point terminal of A is divided into two circuits, one circuit is connected to the positive bus with the first equalizing resistor R2 and the second equalizing resistor R9 connected in series, and the other channel is connected in series with the third equalizing resistor R43 and the fourth equalizing resistor R50 Afterwards, it is connected to the negative busbar, and the voltage at the common point terminal of A is divided by the first to fourth equalizing resistors R2, R9, R43, and R50, so the voltage at the common point terminal of A is Vbus/2. The working principle of the circuit is that, according to the voltage difference between the A common point terminal and the BUSN common point terminal, the above voltage difference is added to the base-emitter of the first and second transistors Q1 and Q6, so that the corresponding transistors are turned on, forming Capacitor charging and discharging circuit. Specifically, let the capacitance between the common terminal of the positive bus BUS+ and BUSN be denoted as Ca, and its voltage be Va; the capacitance between BUSN and the negative bus BUS- be denoted as Cb, and its voltage be Vb. When the voltages of the series capacitors are not equal, if Va is greater than Vb, that is, Va>Vbus/2, that is, Vb<Vbus/2, at this time the first transistor Q1 is turned on, the second transistor Q6 is turned off, and the bus voltage passes through The series resistance of the collector of the first transistor Q1 and the first transistor Q1 charge the capacitor Cb, and the voltage Vb rises, and at the same time, the capacitor Ca is discharged through the series resistance of the collector of the first transistor Q1 and the transistor Q1, and the voltage Va decrease until Va and Vb are equal, that is, both are Vbus/2, and at this moment, the first transistor Q1 is turned off. Conversely, when Va is less than Vb, the second transistor Q6 is turned on, the first transistor Q1 is turned off, and the bus voltage charges the capacitor Ca through the series resistance of the collector of the second transistor Q6 and the second transistor Q6 , the voltage Va increases, and at the same time, the capacitor Cb is discharged through the series resistance of the collector of the second transistor Q6 and the second transistor Q6, the voltage Vb decreases, and finally the voltage reaches equilibrium.
所述过压保护模块13包括有第三三极管Q7、光电耦合器和比较器U2A;所述第三三极管Q7发射极与负极母线电线连接,第三三极管Q7的集电极经过光电耦合器的发光二极管U1A后串联至少一个电阻器后与正极母线电性连接,发光二极管U1A与电阻器的共点端还分出一路串联第一电容电阻并联电路后与负极母线连接,第三三极管Q7的基极串联稳压二极管D2后再串联至少一个电阻器后与正极母线电性连接,稳压二极管D2与电阻器的共点端还分出一路串联第二电容电阻并联电路后与负极母线连接;所述光电耦合器的光敏三极管U1B的集电极外接第一供电端,发射极电性连接比较器U2A的负输入引脚2,比较器U2A的输出引脚1向升压模块14输出使能信号,输出引脚1与正输入引脚3之间还连接有正反馈电路。The overvoltage protection module 13 includes a third transistor Q7, a photocoupler and a comparator U2A; the emitter of the third transistor Q7 is connected to the negative bus wire, and the collector of the third transistor Q7 passes through The light-emitting diode U1A of the photocoupler is connected in series with at least one resistor and then electrically connected to the positive bus bar. The common point of the light-emitting diode U1A and the resistor is also divided into a parallel circuit of the first capacitor resistor connected in series and then connected to the negative bus bar. The base of the transistor Q7 is connected in series with the Zener diode D2, and then at least one resistor is connected in series with the positive busbar. The common point of the Zener diode D2 and the resistor is also divided into a second capacitor and resistor connected in parallel. Connected to the negative bus bar; the collector of the phototransistor U1B of the photocoupler is externally connected to the first power supply terminal, the emitter is electrically connected to the negative input pin 2 of the comparator U2A, and the output pin 1 of the comparator U2A is connected to the boost module 14 outputs the enabling signal, and a positive feedback circuit is also connected between the output pin 1 and the positive input pin 3 .
所述正反馈电路为:比较器U2A的输出引脚1串联第一反馈电阻R55、再反向串联二极管D3后与比较器U2A的正输入引脚3电性连接,二级管D3与正输入引脚3的共点端还串联第二反馈电阻R54后连接第二供电端,正输入引脚3与接地端之间还串联有保护电容C45。The positive feedback circuit is as follows: the output pin 1 of the comparator U2A is connected in series with the first feedback resistor R55, and then the diode D3 is connected in reverse series with the positive input pin 3 of the comparator U2A, and the diode D3 is connected to the positive input pin 3. The common end of pin 3 is also connected in series with the second feedback resistor R54 to the second power supply end, and a protection capacitor C45 is connected in series between the positive input pin 3 and the ground end.
所述光敏三极管U1B的发射极与接地端之间串联有第三电容电阻并联电路。A third capacitance-resistance parallel circuit is connected in series between the emitter of the phototransistor U1B and the ground terminal.
过压保护模块中,当正负极母线BUS+、BUS-间的电压过高,使得第三三极管Q7导通,则光电耦合器的发光二极管U1A通电发光,即光电耦合器导通,并且光敏三极管U1B输出高电平到比较器U2的负输入引脚,使比较器输出引脚1输出0为低电平的使能信号OV,使能信号OV作为升压模块14的使能信号,低电平封锁升压模块14的PWM脉冲。In the overvoltage protection module, when the voltage between the positive and negative busbars BUS+ and BUS- is too high, so that the third transistor Q7 is turned on, the light-emitting diode U1A of the photocoupler is powered on and emits light, that is, the photocoupler is turned on, and The phototransistor U1B outputs a high level to the negative input pin of the comparator U2, so that the comparator output pin 1 outputs an enable signal OV with a low level of 0, and the enable signal OV is used as the enable signal of the boost module 14, The low level blocks the PWM pulse of the boost module 14 .
上述实施例仅用以说明本发明而并非限制本发明所描述的技术方案;因此,尽管本说明书参照上述的各个实施例对本发明已进行了详细的说明,但是,本领域的普通技术人员应当理解,仍然可以对本发明进行修改或者等同替换;而一切不脱离本发明的精神和范围的技术方案及其改进,其均应涵盖在本发明的权利要求范围当中。The foregoing embodiments are only used to illustrate the present invention and are not intended to limit the technical solutions described in the present invention; therefore, although the specification has described the present invention in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand , the present invention can still be modified or equivalently replaced; and all technical solutions and improvements that do not depart from the spirit and scope of the present invention should be covered by the claims of the present invention.
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