CN105306166A - Code block receiving and processing method and device - Google Patents

Abstract

The invention discloses a method and device for receiving and processing code blocks. The method includes: a terminal receives a signal sent by a base station, and the terminal performs symbol-level code block segmentation on the signal; Symbols in each code block undergo the same demodulation and descrambling processing; the terminal performs bit-level processing on the descrambled bit sequence of each code block to form a received transmission block sequence. This method combines code-block-based demodulation and descrambling processing with bit-level de-rate matching, channel decoding and other code-block-based processing, thereby simplifying and reducing the processing capacity of the system. This method is also applicable to hardware environment for parallel processing design.

Description

Method and device for receiving and processing code blocks

technical field

The present invention relates to the communication field, in particular to a code block receiving and processing method and device.

Background technique

In the current LTE system, a new transmission mode is introduced in the downlink. Based on the transmit antenna precoding of the dual codebook structure, it can support up to 8 layers of SU-MIMO, and the corresponding number of transmission block bits increases to a maximum of 299856 bits. The modulation method is also extended from QPSK, 16QAM, 64QAM to a higher order modulation method supporting 256QAM, and the corresponding number of transmission block bits is also increased to a maximum of 391656 bits.

The bit-level processing of the LTE system generally adopts Turbo coding, and the maximum input bit length of the Turbo code is limited to 6144 bits. Since there are cases where the number of transmission block bits is greater than 6144 bits, the code block segmentation technology is adopted in the LTE system, that is, the number of divided code blocks is obtained by calculating the number of "transport block bits/6144", and the transmission block The code block is divided, and the number of bits in each divided code block is less than or equal to 6144 bits, which is used for Turbo encoding and decoding processing.

Figure 1 is a block diagram of the downlink reception process of the Physical Downlink Shared Channel (PDSCH for short) of the LTE system, wherein, after channel estimation, detection and other processing, the demodulation of the entire transmission block based on the code block concatenation state is performed on the received symbols and descrambling processing, followed by code block segmentation processing, and each divided code block is subjected to derate matching, HARQ soft combining, channel decoding, code block cyclic redundancy check code (CyclicRedundancyCheck, referred to as: CRC) error detection and other processing. Finally, all code blocks are processed in code block concatenation, and transmission block bits are output after transmission block CRC error detection.

In the LTE system, the existing code block processing at the receiving end is only performed at the bit level, while descrambling and demodulation are processed based on the entire transmission block length. The downlink of the LTE system can support a maximum of 8 layers of SU-MIMO, and the corresponding TBS bit value increases to a maximum of 299856 bits. The modulation method also supports a higher-order modulation method of 256QAM, and the corresponding TBS bit value also increases to a maximum of 391656 bits. . For such a large transmission block, its processing capacity will be greatly increased. For example, regarding the processing length of scrambling/descrambling, when comparing 256QAM with the existing 64QAM modulation scheme, the processing amount of descrambling in 256QAM is about 30% larger than that in 64QAM. For the demodulation process, since the bit width of the symbol modulation in 256QAM is 8 bits, compared with the symbol modulation in 64QAM, the demodulation processing amount increases by about 3 times.

Since the existing descrambling and demodulation processing is based on the entire transmission block length, with the complexity of LTE system configuration, the amount of descrambling and demodulation processing gradually increases, which is not conducive to the real-time processing of the system, making the system The hardware implementation is relatively cumbersome.

Contents of the invention

Aiming at the defects in the prior art, the present invention provides a method and device for receiving and processing code blocks, which simplifies and reduces the processing amount of code blocks in the system.

In a first aspect, the present invention provides a method for receiving and processing a code block, the method comprising:

The terminal receives the signal sent by the base station, and performs symbol-level code block segmentation on the signal;

The terminal performs the same demodulation and descrambling processing on the symbols in each divided code block;

The terminal performs bit-level processing on the descrambled bit sequence of each code block to form a received transport block sequence.

Optionally, performing symbol-level code block segmentation on the signal, including:

If the number of modulation symbols M is not greater than the number of split symbols Z of the code block, the number of splits C of the code block is 1;

If the number of modulation symbols M is greater than the number of division symbols Z of the code block, the number of divisions of the code block

Wherein, the number of modulation symbols M=K/Q, K is the number of transport block bits of the signal sent by the base station, Q is the number of modulation bits corresponding to QPSK, 16QAM, 64QAM, and 256QAM respectively, Q=2, 4, 6 or 8, the code The number of division symbols of a block Z=6144/Q.

Optionally, the same demodulation is performed on the symbols in each code block after the division, specifically:

The symbols in each divided code block are demodulated by using one demodulation mode among QPSK, 16QAM, 64QAM and 256QAM.

Optionally, performing the same demodulation and descrambling processing on the symbols in each divided code block, including:

performing descrambling processing on the output sequence after symbol demodulation processing in each code block to obtain a bit sequence;

Wherein, the length of the bit sequence is equal to the number of bits corresponding to the demodulated code block.

Optionally, the bit-level processing includes:

Perform rate de-matching, HARQ soft combining, channel decoding and CRC error detection processing on the bit sequence after the descrambling processing of each code block;

After the CRC error detection processing of each code block is completed, bit-level code block concatenation processing is performed to form a complete transmission block sequence;

performing CRC error detection processing on the complete transport block sequence;

After the CRC error detection process is performed on the complete transport block sequence, a received transport block sequence is formed.

Optionally, after the CRC error detection processing for each code block is completed, after performing bit-level code block concatenation processing, and before forming the received transport block sequence, the method further includes:

If the CRC error detection process for each code block is completed, then record the code block CRC error detection situation of all code blocks to form a first identification sequence whose length is the number of code blocks C, where "0" represents the code block The block has no errors, and "1" means that the code block has errors.

Optionally, the method also includes:

When there is a code block marked as 1 in the identification sequence, the terminal receives the signal retransmitted by the base station, and before forming a received transport block sequence for the retransmitted signal,

Forming a second identification sequence whose length is the number of code blocks C, if the identification of a certain code block in the second identification sequence is "0", the correct data received and processed before receiving the retransmitted signal is adopted, and no further processing is performed. any processing;

If the flag of a certain code block is "1", demodulation, descrambling and subsequent bit-level processing are performed on the error code block again.

In the second aspect, the present invention also provides a code block receiving and processing device, which includes: a code block segmentation unit, a demodulation and descrambling unit, and a code block bit-level processing unit;

The code block segmentation unit is configured to receive a signal sent by a base station, and perform symbol-level code block segmentation on the signal;

The demodulation and descrambling unit is configured to perform the same demodulation and descrambling processing on the symbols in each of the divided code blocks;

The code block bit-level processing unit is configured to perform bit-level processing on the descrambled bit sequence of each code block to form a received transmission block sequence.

Optionally, the code block bit-level processing unit includes: a code block processing unit, a code block concatenation unit, a transport block error detection processing unit, and a transport block sequence receiving unit;

The code block processing unit is configured to perform derate matching, HARQ soft combining, channel decoding and CRC error detection processing on the bit sequence after the descrambling processing of each code block;

The code block concatenation unit performs bit-level code block concatenation processing after the CRC error detection processing of each code block is completed to form a complete transmission block sequence;

The transmission block error detection processing unit is configured to perform CRC error detection processing on the complete transmission block sequence;

The transmission block sequence receiving unit is configured to form a received transmission block sequence after performing CRC error detection processing on the complete transmission block sequence.

Optionally, the code block bit-level processing unit further includes a code block retransmission unit;

The code block retransmission unit is used to record the code block CRC error detection status of all code blocks this time after the CRC error detection processing of each code block is completed, and form an identification sequence whose length is the number of code blocks C , where "0" means that the code block has no errors, and "1" means that the code block has errors.

It can be seen from the above technical solution that the present invention proposes a method and device for receiving and processing code blocks, by performing symbol-level code block segmentation on the signal sent by the base station, and performing the same decoding on the symbols in each divided code block. The reconciliation and descrambling processing increases the processing time of the entire system, simplifies and reduces the processing capacity of the system, and plays a great role in the real-time processing of the system.

Description of drawings

Fig. 1 is the block diagram of the downlink receiving process of the PDSCH channel of the LTE system;

FIG. 2 is a schematic flowchart of a code block receiving and processing method mentioned in an embodiment of the present invention;

FIG. 3 is a block diagram of a downlink receiving process of a PDSCH channel provided by an embodiment of the present invention;

4A-4B are schematic diagrams of an apparatus for receiving and processing code blocks provided by another embodiment of the present invention.

detailed description

The specific embodiments of the invention will be further described below in conjunction with the accompanying drawings. The following examples are only used to illustrate the technical solution of the present invention more clearly, but not to limit the protection scope of the present invention.

Fig. 2 shows a schematic flowchart of a method for receiving and processing a code block provided in this embodiment. As shown in Fig. 2, the method includes the following steps:

101. The terminal receives a signal sent by the base station, and performs symbol-level code block segmentation on the signal;

For example, the above step 101 may specifically be: if the number M of modulation symbols is not greater than the number Z of division symbols of the code block, then the division number C of the code block is 1;

If the number of modulation symbols M is greater than the number of division symbols Z of the code block, the number of divisions of the code block

Among them, the number of modulation symbols M=K/Q, K is the number of transmission block bits of the signal sent by the base station, the bit-level code block division is based on 6144 bits, Q is the number of modulation bits, and Q=2, 4, 6, and 8 correspond to The modulation schemes are QPSK, 16QAM, 64QAM, and 256QAM, and the number of divided symbols of a code block is Z=6144/Q.

102. Perform the same demodulation and descrambling processing on the symbols in each divided code block;

Perform the same demodulation and descrambling processing on the symbols in each code block after the division, the modulation method of the demodulation processing is one of QPSK, 16QAM, 64QAM and 256QAM, which modulation method is used specifically The demodulation process needs to refer to the modulation mode when the signal is modulated in the uplink.

Perform descrambling processing on the output sequence after symbol demodulation processing in each code block, the length of the scrambling code is equal to the number of bits corresponding to the code block, and determine according to the position and length of the code block in the code block group The start position and end position of the scrambling code corresponding to the code block.

103. Perform bit-level processing on the descrambled bit sequence of each code block to form a received transport block sequence.

For example, the bit-level processing in step 103 above may specifically include the following sub-steps:

1031. Perform derate matching, HARQ soft combining, channel decoding, and CRC error detection processing on the descrambled bit sequence of each code block;

1032. After the CRC error detection processing of each code block is completed, perform bit-level code block concatenation processing to form a complete transmission block sequence;

For example, the above-mentioned step 1032 also includes: if the CRC error detection process for each code block is completed, record the code block CRC error detection status of all code blocks this time, and form an identification whose length is the number of code blocks C sequence, where "0" means that the code block has no errors, and "1" means that the code block has errors.

Optionally, after this decoding is completed, when the retransmission data is received next time, before demodulation starts, according to the identification sequence,

If the identifier of a code block is "0", the correct data received and processed last time will be used without any processing;

If the flag of a certain code block is "1", demodulation, descrambling and subsequent bit-level processing are performed on the error code block again.

1033. Perform CRC error detection processing on the complete transport block sequence;

1034. After performing CRC error detection processing on the complete transmission block sequence, form a received transmission block sequence.

Therefore, the above method increases the processing time of the entire system, simplifies and reduces the processing capacity of the system, and plays a great role in the real-time processing of the system.

Fig. 3 is a block diagram showing the downlink receiving process of the PDSCH channel, as shown in Fig. 3, the above method can also be subdivided into the following steps:

201. Receive symbols;

The terminal receives the signal from the base station through the PDSCH channel, performs signal processing such as channel estimation and detection, and forms the signal of the demodulator, that is, the demodulation symbol.

202. Symbol-level decoding block concatenation;

According to the number of code blocks, the received symbols are divided into code block groups of the number of code blocks and symbol subsequences, each subsequence corresponds to a code block, starting from the starting position of the symbol, and the order of the code blocks is from small to large.

For example, the above step 202 may specifically be:

2021. Calculate the number of code block divisions at the symbol level

If the number of modulation symbols M is not greater than the number of split symbols Z of the code block, the number of splits C of the code block is 1;

If the number of modulation symbols M is greater than the number of division symbols Z of the code block, the number of divisions of the code block

Among them, the number of modulation symbols M=K/Q, K is the number of bits in the transmission block of the signal sent by the base station, the bit-level code block division is based on 6144 bits, Q is the number of modulation bits corresponding to QPSK, 16QAM, 64QAM, and 256QAM respectively, and Q =2, 4, 6 or 8, the number of division symbols of the code block Z=6144/Q.

2022. According to the size of the number C of symbol-level code blocks, equally divide the modulation symbol sequence of length M to generate C symbol-level code blocks, and the code block groups are arranged in ascending order (1, 2...C) .

203. Code block level demodulation processing;

The modulation mode of the demodulation process is one of QPSK, 16QAM, 64QAM, and 256QAM. The specific modulation mode to be used for the demodulation process needs to refer to the modulation mode of the uplink signal modulation.

204. Code block level descrambling processing;

Here, the scrambling code sequence needs to be divided into C scrambling code subsequences, and the output subsequence after symbol demodulation processing in each code block is descrambled, and the length of the scrambling code is equal to the number of bits corresponding to the code block , according to the position and length of the code block in the code block group, determine the start position and end position of the scrambling code corresponding to the code block.

205. Bit-level processing at code block level;

Perform derate matching, HARQ soft combining, channel decoding and code block CRC error detection processing on each descrambled code block.

206. Code block cascade processing;

After all code blocks are processed from demodulation to code block CRC error detection, bit-level code block concatenation processing is performed to form a complete transmission block sequence.

For example, the above step 206 also includes the steps of:

2061. Code block CRC error detection and retransmission processing;

If the CRC error detection process for each code block is completed, record the code block CRC error detection situation of all code blocks this time, and form an identification sequence whose length is the number of code blocks C, where "0" represents the code block No error, "1" means that the code block has errors.

After this decoding is completed, when the retransmission data is received next time, before the demodulation starts, according to the identification sequence,

If the identifier of a code block is "0", the correct data received and processed last time will be used without any processing;

If the flag of a certain code block is "1", demodulation, descrambling and subsequent bit-level processing are performed on the error code block again.

207. Transmission block CRC error detection processing;

After the bit-level code blocks are concatenated, CRC error detection processing is performed on the entire transmission code block, and after the CRC error detection processing is performed on the entire transmission code block, a received transmission block sequence is formed.

The above method combines code-block-based demodulation and descrambling processing with bit-level de-rate matching, channel decoding, and other code-block-based processing, thereby simplifying and reducing the processing capacity of the system. This method is also applicable to hardware environments The following parallel processing design.

Fig. 4A and Fig. 4B show a schematic diagram of a code block receiving and processing device. The device of the present invention is based on the protection of the terminal side, and is a device corresponding to the above-mentioned method of the present invention. As shown in the figure, the device Including: a code block segmentation unit 301, a demodulation and descrambling unit 302, a code block bit-level processing unit 303;

The code block segmentation unit 301 is configured to receive a signal sent by a base station, and perform symbol-level code block segmentation on the signal;

The demodulation and descrambling unit 302 is configured to perform the same demodulation and descrambling processing on the symbols in each of the divided code blocks;

Perform the same demodulation and descrambling processing on the symbols in each code block after the division, the modulation method of the demodulation processing is one of QPSK, 16QAM, 64QAM and 256QAM, which modulation method is used specifically The demodulation process needs to refer to the modulation mode when the signal is modulated in the uplink.

Perform descrambling processing on the output sequence after symbol demodulation processing in each code block, the length of the scrambling code is equal to the number of bits corresponding to the code block, and determine according to the position and length of the code block in the code block group The start position and end position of the scrambling code corresponding to the code block.

The code block bit-level processing unit 303 is configured to perform bit-level processing on the descrambled bit sequence of each code block to form a complete transmission block sequence.

Optionally, the code block bit-level processing unit includes: a code block processing unit 3031, a code block concatenation unit 3032, a transport block error detection processing unit 3033, and a transport block sequence receiving unit 3034;

The code block processing unit 3031 is configured to perform rate de-matching, HARQ soft combining, channel decoding, and CRC error detection processing on the descrambled bit sequence of each code block;

The code block concatenation unit 3032 performs bit-level code block concatenation processing after the CRC error detection processing of each code block is completed;

The transmission block error detection processing unit 3033 is configured to perform CRC error detection processing on the complete transmission block sequence;

The transmission block sequence receiving unit 3034 is configured to form a received transmission block sequence after performing CRC error detection processing on the complete transmission block sequence. Optionally, the code block bit-level processing unit further includes a code block retransmission unit 3035;

The code block retransmission unit 3035 is configured to record the code block CRC error detection status of all code blocks this time after the CRC error detection processing of each code block is completed, and form a mark whose length is the number of code blocks C sequence, where "0" means that the code block has no errors, and "1" means that the code block has errors.

After this decoding is completed, when the retransmission data is received next time, before the demodulation starts, according to the identification sequence,

If the identifier of a code block is "0", the correct data received and processed last time will be used without any processing;

If the flag of a certain code block is "1", demodulation, descrambling and subsequent bit-level processing are performed on the error code block again.

The above-described embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: it can still understand the foregoing The technical solutions described in each embodiment are modified, or some or all of the technical features thereof are equivalently replaced; and these modifications or replacements do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the various embodiments of the present invention.

Claims (10)

1. A method for receiving and processing a code block, characterized in that the method comprises: The terminal receives the signal sent by the base station, and performs symbol-level code block segmentation on the signal; The terminal performs the same demodulation and descrambling processing on the symbols in each divided code block; The terminal performs bit-level processing on the descrambled bit sequence of each code block to form a received transport block sequence. 2. The method according to claim 1, wherein, performing symbol-level code block segmentation on the signal comprises: If the number of modulation symbols M is not greater than the number of split symbols Z of the code block, the number of splits C of the code block is 1; If the number of modulation symbols M is greater than the number of division symbols Z of the code block, the number of divisions of the code block Wherein, the number of modulation symbols M=K/Q, K is the number of transport block bits of the signal sent by the base station, Q is the number of modulation bits corresponding to QPSK, 16QAM, 64QAM, and 256QAM respectively, Q=2, 4, 6 or 8, the code The number of division symbols of a block Z=6144/Q. 3. The method according to claim 1, wherein the same demodulation is carried out to the symbols in each code block after the division, specifically: The symbols in each divided code block are demodulated by using one demodulation mode among QPSK, 16QAM, 64QAM and 256QAM. 4. The method according to claim 1, wherein performing the same demodulation and descrambling process on the symbols in each code block after the division, comprising: performing descrambling processing on the output sequence after symbol demodulation processing in each code block to obtain a bit sequence; Wherein, the length of the bit sequence is equal to the number of bits corresponding to the demodulated code block. 5. The method of claim 1, wherein the bit-level processing comprises: Perform rate de-matching, HARQ soft combining, channel decoding and CRC error detection processing on the bit sequence after the descrambling processing of each code block; After the CRC error detection processing of each code block is completed, bit-level code block concatenation processing is performed to form a complete transmission block sequence; performing CRC error detection processing on the complete transport block sequence; After the CRC error detection process is performed on the complete transport block sequence, a received transport block sequence is formed. 6. The method according to claim 1, characterized in that, after the CRC error detection process for each code block is completed, after performing bit-level code block concatenation processing, and before forming a received transport block sequence, the Methods also include: If the CRC error detection process for each code block is completed, then record the code block CRC error detection situation of all code blocks to form a first identification sequence whose length is the number of code blocks C, where "0" represents the code block The block has no errors, and "1" means that the code block has errors. 7. The method of claim 6, further comprising: When there is a code block marked as 1 in the identification sequence, the terminal receives the signal retransmitted by the base station, and before forming a received transport block sequence for the retransmitted signal, Forming a second identification sequence whose length is the number of code blocks C, if the identification of a certain code block in the second identification sequence is "0", the correct data received and processed before receiving the retransmitted signal is adopted, and no further processing is performed. any processing; If the flag of a certain code block is "1", demodulation, descrambling and subsequent bit-level processing are performed on the error code block again. 8. A receiving and processing device for a code block, characterized in that the device comprises: a code block segmentation unit, a demodulation and descrambling unit, and a code block bit-level processing unit; The code block segmentation unit is configured to receive a signal sent by a base station, and perform symbol-level code block segmentation on the signal; The demodulation and descrambling unit is configured to perform the same demodulation and descrambling processing on the symbols in each of the divided code blocks; The code block bit-level processing unit is configured to perform bit-level processing on the descrambled bit sequence of each code block to form a received transmission block sequence. 9. The device according to claim 8, wherein the code block bit-level processing unit comprises: a code block processing unit, a code block concatenation unit, a transport block error detection processing unit, and a transport block sequence receiving unit; The code block processing unit is configured to perform derate matching, HARQ soft combining, channel decoding and CRC error detection processing on the bit sequence after the descrambling processing of each code block; The code block concatenation unit performs bit-level code block concatenation processing after the CRC error detection processing of each code block is completed to form a complete transmission block sequence; The transmission block error detection processing unit is configured to perform CRC error detection processing on the complete transmission block sequence; The transmission block sequence receiving unit is configured to form a received transmission block sequence after performing CRC error detection processing on the complete transmission block sequence. 10. The device according to claim 8, wherein the code block bit-level processing unit further comprises a code block retransmission unit; The code block retransmission unit is used to record the code block CRC error detection status of all code blocks this time after the CRC error detection processing of each code block is completed, and form an identification sequence whose length is the number of code blocks C , where "0" means that the code block has no errors, and "1" means that the code block has errors.