CN105138406A - Task processing method, task processing device and task processing system - Google Patents

Abstract

The invention discloses a task processing method, device and system. Wherein, the method includes: receiving an operation instruction issued by the operating system; judging whether the received operation instruction belongs to the instruction in the preconfigured simple instruction set; if the received operation instruction belongs to the preconfigured simple instruction set Instruction, execute the operation corresponding to the received operation instruction; if the received operation instruction does not belong to the instruction in the pre-configured simple instruction set, determine the target CPU for executing the received operation instruction, and send the received The operation instruction is sent to the determined target CPU, so that the determined target CPU executes the operation corresponding to the received operation instruction. The invention realizes the workload sharing of the CPU, and ensures the smoothness of the system receiving operation instructions when the CPU is executing some complex data tasks.

Description

Method, device and system for task processing

technical field

The invention relates to operating system working mechanism and integrated circuit design technology, especially to a task processing method, device and system.

Background technique

With the rapid development of computer technology, high-performance computer systems have increasingly become the needs of economic and social development. In a traditional server, the CPU needs to process all the tasks issued by the operating system. However, once some processes occupy a large amount of CPU execution time, the operating system will experience increased delays, freezes, or even crashes.

For the above problems, no effective solution has been proposed yet.

Contents of the invention

In order to solve the above technical problems, the present invention provides a task processing method, device and system, which can share the workload of the CPU and ensure the smoothness of the system receiving operation instructions when the CPU is executing some complex data tasks.

In order to achieve the purpose of the present invention, the present invention provides a control method, including: receiving the operation instruction issued by the operating system; judging whether the operation instruction belongs to the instruction in the pre-configured simple instruction set; if the received operation instruction belongs to the pre-configured execute the operation corresponding to the operation instruction; if the received operation instruction does not belong to the instruction in the pre-configured simple instruction set, determine the target CPU for executing the received operation instruction, and sending the received operation instruction to the determined target CPU, so that the determined target CPU executes the operation corresponding to the received operation instruction.

Optionally, the determining the target CPU for executing the received operation instruction includes: searching for idle CPUs within a current time period, and determining the target CPU among the idle CPUs.

Optionally, the determining the target CPU for executing the received operation instruction includes: searching for an idle CPU within the current time period; if there is no idle CPU within the current time period, according to the The task allocation mechanism of the operating system determines the first idle CPU after the current time period as the target CPU.

Further, the present invention provides a task processing device, including: a receiving unit, configured to receive an operating instruction issued by an operating system; a judging unit, configured to judge whether the received operating instruction belongs to the pre-configured simple instruction set instruction; an execution unit, configured to execute the operation corresponding to the received operation instruction if the received operation instruction belongs to the instruction in the pre-configured simple instruction set; a control unit, configured to execute the received operation instruction if it does not belong to The instructions in the pre-configured simple instruction set determine the target CPU for executing the received operation instruction, and send the received operation instruction to the determined target CPU, so that the determined target CPU executes the received operation instruction. The operation corresponding to the operation instruction.

Optionally, the control unit is configured to perform the following steps to determine a target CPU for executing the received operation instruction: find idle CPUs within a current time period, and determine the target CPU among the idle CPUs.

Optionally, the control unit is configured to perform the following steps to determine a target CPU for executing the received operation instruction: find an idle CPU within the current time period; there is no idle CPU within the current time period In this case, according to the task allocation mechanism of the operating system, the first idle CPU after the current time period is determined as the target CPU.

In the embodiment of the present invention, by identifying the operation instructions and determining the distributed execution or self-execution, a part of the workload of the CPU is shared, so that the CPU can be better invested in complex data calculations. For simple operation instructions, no Part of the CPU time is then allocated for processing, and then when the CPU is performing some complex data tasks, it can ensure the smoothness of the system receiving operation instructions and avoid the system "fake death" phenomenon caused by excessive CPU usage.

Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention may be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.

Description of drawings

The accompanying drawings are used to provide a further understanding of the technical solution of the present invention, and constitute a part of the description, and are used together with the embodiments of the application to explain the technical solution of the present invention, and do not constitute a limitation to the technical solution of the present invention.

FIG. 1 is a schematic flowchart of a task processing method according to an embodiment of the present invention;

FIG. 2 is a schematic flowchart of another task processing method according to an embodiment of the present invention;

Fig. 3 is a schematic structural diagram of a task processing device according to an embodiment of the present invention.

Detailed ways

In order to make the purpose, technical solution and advantages of the present invention more clear, the embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings. It should be noted that, in the case of no conflict, the embodiments in the present application and the features in the embodiments can be combined arbitrarily with each other.

The steps shown in the flowcharts of the figures may be performed in a computer system, such as a set of computer-executable instructions. Also, although a logical order is shown in the flowcharts, in some cases the steps shown or described may be performed in an order different from that shown or described herein.

An embodiment of the present invention provides a task processing method, as shown in Figure 1, the method may include the following steps:

Step 101, receiving an operation instruction issued by an operating system.

In this step, the execution subject that executes the task processing method may be a task processing device. The operating system generates a corresponding operation instruction in response to the user's operation, and sends the operation instruction to the task processing device. As a task processing device, after receiving an operation instruction issued by the operating system, it will recognize the received operation instruction.

Step 102, judging whether the received operation instruction belongs to the instruction in the pre-configured simple instruction set.

In this step, after receiving the operation instruction issued by the operating system, the task processing device will identify the received operation instruction, and identify whether the received operation instruction is a simple instruction. Specifically, the method for the task processing device to identify whether the received operation instruction is a simple instruction may be to judge whether the received operation instruction belongs to an instruction in a pre-configured simple instruction set, wherein, if the received operation instruction belongs to a pre-configured For the commands in the configured simple command set, the received operation command is regarded as a simple command, and vice versa.

Exemplarily, the pre-configured set of simple instructions may include instructions such as display, date viewing, and timed task writing.

The above-mentioned pre-configured set of simple operation instructions can be pre-configured for operation and maintenance personnel, wherein the pre-configured set of simple operation instructions can be configured in the task processing device, and the task processing device can be directly called; it can also be configured in the database, when When the task processing device needs to identify the operation instruction, it requests the database; it can also be configured in the storage medium of the server, which is not limited in this embodiment.

Step 103, if the received operation instruction belongs to the instructions in the pre-configured simple instruction set, perform the operation corresponding to the received operation instruction.

In this step, based on the judgment in step 102 above, if the received operation instruction belongs to the instructions in the pre-configured simple instruction set (that is, the received operation instruction is a simple instruction), the task processing device will directly execute the received operation instruction. The operation corresponding to the received operation instruction, that is, if the received operation instruction is a simple instruction (such as a display instruction, a date viewing instruction, a timed task writing instruction, etc.), the task processing device will default that the received operation instruction is handled by itself to execute.

Step 104, if the received operation instruction does not belong to the instruction in the pre-configured simple instruction set, determine the target CPU for executing the received operation instruction, and send the received operation instruction to the determined target CPU, so that The determined target CPU executes the operation corresponding to the received operation instruction.

In this step, based on the judgment in step 102 above, if the received operation instruction does not belong to the instructions in the pre-configured simple instruction set (that is, the received operation instruction is a complex instruction), the task processing device will select a target The CPU is used to execute the received operation instruction, and after determining the target CPU for executing the received operation instruction, send the received operation instruction to the determined target CPU, so that the determined target CPU executes the received operation instruction. The operation corresponding to the received operation instruction.

It can be seen from the above that the solutions provided by the above-mentioned embodiments of the present application share a part of the workload of the CPU by identifying the operation instructions and determining the distributed execution or self-execution, so that the CPU can be better invested in complex data calculations. For simple operation instructions, there is no need to allocate part of the CPU time for processing, and then when the CPU is performing some complex data tasks, it can ensure the smoothness of the system receiving operation instructions and avoid the system "fake death" phenomenon caused by high CPU usage .

As an optional implementation manner, the method for determining the target CPU for executing the received operation instruction may include:

Step 201, searching for idle CPUs within the current time period, and determining a target CPU among the idle CPUs.

In this step, the method for the task processing device to determine the target CPU for executing the received operation instruction may be to find an idle CPU within the current time period, and then determine the idle CPU as the target CPU. In another case, When there are multiple idle CPUs found, the task processor can arbitrarily select one of the idle CPUs as the target CPU, or select according to the configuration (such as main frequency, bus speed, etc.) of each idle CPU A suitable one is used as the target CPU, which is not limited in this embodiment.

Optionally, determining the target CPU among the idle CPUs includes: if the number of idle CPUs found is one, using the found idle CPU as the target CPU; if the number of idle CPUs found is many randomly select one of the multiple idle CPUs as the target CPU.

As another optional implementation manner, the method for determining the target CPU for executing the received operation instruction may include:

Step 301, search for idle CPUs within the current time period.

Step 302, if there is no idle CPU within the current time period, according to the task allocation mechanism of the operating system, determine the first idle CPU after the current time period as the target CPU.

In this step, the method for the task processing device to determine the target CPU for executing the received operation instruction may be to search for an idle CPU in the current time period. If there is no idle CPU in the current time period, the task processing device obtains the operating system's The task allocation mechanism is analyzed, and the CPU that can be idle first after the current time period is determined, and then the CPU that is idle first is determined as the target CPU.

Similarly, when there are multiple first idle CPUs, the task processor can arbitrarily select one of the first idle CPUs as the target CPU, or it can be configured according to the configuration of each first idle CPU (for example, the main frequency , bus speed, etc.) select an appropriate one as the target CPU, which is not limited in this embodiment.

Optionally, the pre-configured set of simple instructions includes one or more of the following instructions: a display instruction, a date viewing instruction, and a timed task writing instruction.

What needs to be added is that the task processing method provided by the embodiment of the present invention can be applied to, but not limited to, x86 servers. An independent task processing device is added to the x86 server to receive operating instructions from the operating system and distribute them or execute them by itself.

Next, as shown in FIG. 2, taking the task processing device as an example of a cooperative processing chip, the above task processing method is exemplarily explained:

In step a, the operating system issues an operation instruction.

In this step, when the operating system receives the user's operation instruction, the cooperative processing mechanism will transmit the operation instruction to the cooperative processing chip at the first time.

In step b, the cooperative processing chip receives an operation instruction.

In this step, as a cooperative processing chip, it will receive the above-mentioned operation instruction, and then identify the operation instruction, determine to distribute it or execute it by itself.

Step c, the collaborative processing chip judges whether the operation instruction is a simple instruction.

In this step, after receiving the operation instruction issued by the operating system, the cooperative processing chip will identify the operation instruction to identify whether the operation instruction is a simple instruction. Specifically, the method for the collaborative processing chip to identify whether an operation instruction is a simple instruction may be to determine whether the operation instruction belongs to an instruction in a preconfigured simple instruction set, wherein, if the operation instruction belongs to an instruction in a preconfigured simple instruction set, Think of the operation instruction as a simple instruction, and vice versa.

Exemplarily, the pre-configured set of simple instructions may include instructions such as display, date viewing, and timed task writing.

The above-mentioned pre-configured set of simple operation instructions can be pre-configured for operation and maintenance personnel, wherein the pre-configured set of simple operation instructions can be configured in the collaborative processing chip, and the collaborative processing chip can be directly called; it can also be configured in the database. When the cooperative processing chip needs to identify the operation instruction, it requests the database; it can also be configured in the storage medium of the server, which is not limited in this embodiment.

In the embodiment of the present invention, a cooperative processing chip is used instead of a traditional CPU to process various operating instructions of the server. The co-processing chip can distinguish the complexity of system instructions, execute simple commands by itself, and send complex instructions to the CPU for execution. The co-processing chip is independent of the CPU, but not separated from the CPU, it can communicate with the CPU. It can only run the simple operation instructions of the operating system without participating in any complex calculation work.

Step d, if yes, the co-processing chip executes.

In this step, when the operation instruction belongs to the instruction in the pre-configured simple instruction set (that is, the operation instruction is a simple instruction), the collaborative processing chip will directly execute the operation corresponding to the operation instruction, that is, if the operation instruction belongs to the simple instruction Instructions (such as display instructions, date viewing instructions, timed task writing instructions, etc.), the cooperative processing chip will default that the operation instructions are executed by itself.

In the embodiment of the present invention, a cooperative processing chip is used to assist the CPU in processing server instructions, realizing separate execution of simple and complex instructions, ensuring that all CPUs of the server can be devoted to high-loss and high-occupancy work, and maximizing efficiency.

Step e, if not, the CPU executes.

In this step, when the operation instruction does not belong to the instruction in the pre-configured simple instruction set (that is, the operation instruction is a complex instruction), the co-processing chip will select a target CPU to execute the operation instruction, and determine the After executing the target CPU of the operation instruction, the operation instruction is sent to the target CPU, so that the target CPU executes the operation corresponding to the operation instruction.

Step f, returning the execution result to the operating system.

In this step, after executing the operation corresponding to the above operation instruction, the co-processing chip or the CPU needs to return the execution result to the operating system.

The task processing method of this embodiment has greatly improved the working efficiency of the current server. The existence of the cooperative processing chip allows the CPU inside the server to be fully invested in complex data calculations, and there is no need to allocate part of the CPU time to handle simple operations. instructions, and these simple instructions can be executed using co-processing chips. And if the server is performing some extremely CPU-consuming tasks, the co-processing chip can ensure the smoothness of the system receiving user instructions, avoiding the system "fake death" phenomenon caused by high CPU usage.

In the embodiment of the present invention, by identifying the operation instructions and determining the distributed execution or self-execution, a part of the workload of the CPU is shared, so that the CPU can be better invested in complex data calculations. For simple operation instructions, no Part of the CPU time is then allocated for processing, and then when the CPU is performing some complex data tasks, it can ensure the smoothness of the system receiving operation instructions and avoid the system "fake death" phenomenon caused by excessive CPU usage.

It should be noted that for the foregoing method embodiments, for the sake of simple description, they are expressed as a series of action combinations, but those skilled in the art should know that the present invention is not limited by the described action sequence. Because of the present invention, certain steps may be performed in other orders or simultaneously. Secondly, those skilled in the art should also know that the embodiments described in the specification belong to preferred embodiments, and the actions and modules involved are not necessarily required by the present invention.

Through the description of the above embodiments, those skilled in the art can clearly understand that the method according to the above embodiments can be implemented by means of software plus a necessary general-purpose hardware platform, and of course also by hardware, but in many cases the former is better implementation. Based on such an understanding, the essence of the technical solution of the present invention or the part that contributes to the prior art can be embodied in the form of software products, and the computer software products are stored in a storage medium (such as ROM/RAM, disk, CD) contains several instructions to make a terminal device (which may be a mobile phone, a computer, a server, or a network device, etc.) execute the method of each embodiment of the present invention.

According to an embodiment of the present invention, an embodiment of an apparatus for implementing the foregoing method embodiments is also provided, and the apparatus provided by the foregoing embodiments of the present application can run on a computer terminal.

Fig. 3 is a schematic structural diagram of a task processing device according to an embodiment of the present application.

As shown in FIG. 3 , the task processing apparatus may include a receiving unit 301 , a judging unit 302 , an executing unit 303 and a control unit 304 .

Among them, the receiving unit 301 is used to receive the operation instruction issued by the operating system; the judgment unit 302 is used to judge whether the received operation instruction belongs to the instruction in the pre-configured simple instruction set; The operation instruction belongs to the instruction in the pre-configured simple instruction set, and executes the operation corresponding to the received operation instruction; the control unit 304 is configured to if the received operation instruction does not belong to the pre-configured simple instruction set determine the target CPU for executing the received operation instruction, and send the received operation instruction to the determined target CPU, so that the determined target CPU executes the operation corresponding to the received operation instruction.

It can be seen from the above that the solutions provided by the above-mentioned embodiments of the present application share a part of the workload of the CPU by identifying the operation instructions and determining the distributed execution or self-execution, so that the CPU can be better invested in complex data calculations. For simple operation instructions, there is no need to allocate part of the CPU time for processing, and then when the CPU is performing some complex data tasks, it can ensure the smoothness of the system receiving operation instructions and avoid the system "fake death" phenomenon caused by high CPU usage .

It should be noted here that the above-mentioned receiving unit 301, judging unit 302, executing unit 303, and control unit 304 correspond to the above-mentioned steps 101 to 104, and the examples and application scenarios implemented by the four modules are the same as those of the corresponding steps, but It is not limited to the content disclosed in the above embodiments. It should be noted that, as a part of the device, the above-mentioned modules can run in a computer terminal, and can be realized by software or by hardware.

Optionally, the control unit 304 is configured to perform the following steps to determine a target CPU for executing the received operation instruction: find idle CPUs within a current time period, and determine the target CPU among the idle CPUs.

Wherein, the method for the control unit 304 to determine the target CPU for executing the operation instruction may be to find an idle CPU within the current time period, and then determine the idle CPU as the target CPU. In another case, when the CPU is found When there are multiple idle CPUs, the task processor can arbitrarily select one of the multiple idle CPUs as the target CPU, or select an appropriate one according to the configuration of each idle CPU (such as main frequency, bus speed, etc.) The target CPU is not limited in this embodiment.

Optionally, the control unit 304 is configured to perform the following steps to determine the target CPU among the idle CPUs: if the number of found idle CPUs is one, use the found idle CPU as the target CPU: if there are multiple idle CPUs found, randomly select one of the multiple idle CPUs as the target CPU.

Optionally, the control unit 304 is configured to perform the following steps to determine the target CPU for executing the received operation instruction: find an idle CPU within the current time period; there is no idle CPU within the current time period In the case of , according to the task allocation mechanism of the operating system, the first idle CPU after the current time period is determined as the target CPU.

Wherein, the method for the control unit 304 to determine the target CPU for executing the operation instruction may be to search for an idle CPU within the current time period, and if there is no idle CPU within the current time period, the task processing device obtains the task allocation mechanism of the operating system , and analyze the task allocation mechanism to determine the first idle CPU after the current time period, and then determine the first idle CPU as the target CPU.

Similarly, when there are multiple first idle CPUs, the task processor can arbitrarily select one of the first idle CPUs as the target CPU, or it can be configured according to the configuration of each first idle CPU (for example, the main frequency , bus speed, etc.) select an appropriate one as the target CPU, which is not limited in this embodiment.

Optionally, the preconfigured set of simple instructions includes one or more of the following instructions: a display instruction, a date viewing instruction, and a timed task writing instruction.

According to an embodiment of the present invention, there is also provided a task processing system, which includes a task processing device having any of the above features and at least one CPU connected to the task processing device.

Wherein, the task processing device is used to receive the operation instruction issued by the operating system; determine whether the received operation instruction belongs to the instruction in the pre-configured simple instruction set; if the received operation instruction belongs to the pre-configured simple instruction set Instructions in, execute the operation corresponding to the received operation instruction; if the received operation instruction does not belong to the instruction in the pre-configured simple instruction set, determine the target CPU for executing the received operation instruction, and The received operation instruction is sent to the determined target CPU, so that the determined target CPU performs the operation corresponding to the received operation instruction; the target CPU is used to receive the received operation instruction from the task processing system; execute the received operation instruction The operation corresponding to the operation instruction.

In the above-mentioned embodiments of the present invention, the descriptions of each embodiment have their own emphases, and for parts not described in detail in a certain embodiment, reference may be made to relevant descriptions of other embodiments.

In the embodiments provided in this application, it should be understood that the disclosed technical content can be realized in other ways. Wherein, the device embodiments described above are only illustrative. For example, the division of the units may be a logical function division. In actual implementation, there may be other division methods. For example, multiple units or components may be combined or may be Integrate into another system, or some features may be ignored, or not implemented. In another point, the mutual coupling or direct coupling or communication connection shown or discussed may be through some interfaces, and the indirect coupling or communication connection of units or modules may be in electrical or other forms.

The units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or may be distributed to multiple units. Part or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, each unit may exist separately physically, or two or more units may be integrated into one unit. The above-mentioned integrated units can be implemented in the form of hardware or in the form of software functional units.

If the integrated unit is realized in the form of a software function unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the essence of the technical solution of the present invention or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium , including several instructions to make a computer device (which may be a personal computer, a server, or a network device, etc.) execute all or part of the steps of the methods described in various embodiments of the present invention. The aforementioned storage medium includes: various media capable of storing program codes such as U disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), mobile hard disk, magnetic disk or optical disk.

The above is only a preferred embodiment of the present invention, it should be pointed out that, for those of ordinary skill in the art, without departing from the principle of the present invention, some improvements and modifications can also be made, and these improvements and modifications can also be made. It should be regarded as the protection scope of the present invention.

Although the embodiments disclosed in the present invention are as above, the described content is only an embodiment adopted for understanding the present invention, and is not intended to limit the present invention. Anyone skilled in the field of the present invention can make any modifications and changes in the form and details of the implementation without departing from the spirit and scope disclosed by the present invention, but the patent protection scope of the present invention must still be The scope defined by the appended claims shall prevail.

Claims (11)

1. A task processing method, characterized in that, comprising: Receive operating instructions issued by the operating system; Judging whether the received operation instruction belongs to the instruction in the pre-configured simple instruction set; If the received operation instruction belongs to the instruction in the pre-configured simple instruction set, execute the operation corresponding to the received operation instruction; If the received operation instruction does not belong to the instruction in the pre-configured simple instruction set, determine the target CPU for executing the received operation instruction, and send the received operation instruction to the determined target CPU, so that the determined The target CPU executes the operation corresponding to the received operation instruction. 2. The task processing method according to claim 1, wherein the determining the target CPU for executing the received operation instruction comprises: Find idle CPUs within the current time period, and determine the target CPU among the idle CPUs. 3. The task processing method according to claim 2, wherein said determining the target CPU among the idle CPUs comprises: If the number of found idle CPUs is one, use the found idle CPU as the target CPU; If there are multiple idle CPUs found, one of the multiple idle CPUs is randomly selected as the target CPU. 4. The task processing method according to claim 1, wherein the determining the target CPU for executing the received operation instruction comprises: Find idle CPUs during the current time period; If there is no idle CPU within the current time period, according to the task allocation mechanism of the operating system, the first idle CPU after the current time period is determined as the target CPU. 5. The task processing method according to any one of claims 1 to 4, wherein the pre-configured set of simple instructions includes one or more of the following instructions: display instructions, date viewing instructions, timed tasks Write command. 6. A task processing device, characterized in that, comprising: a receiving unit, configured to receive an operation instruction issued by the operating system; a judging unit, configured to judge whether the received operation instruction belongs to the instruction in the pre-configured simple instruction set; An execution unit, configured to execute the operation corresponding to the received operation instruction if the received operation instruction belongs to the instructions in the pre-configured simple instruction set; a control unit, configured to determine a target CPU for executing the received operation instruction if the received operation instruction does not belong to the instructions in the preconfigured simple instruction set, and send the received operation instruction to the determined The target CPU, so that the determined target CPU executes the operation corresponding to the received operation instruction. 7. The task processing device according to claim 6, wherein the control unit is configured to perform the following steps to determine a target CPU for executing the received operation instruction: Find idle CPUs within the current time period, and determine the target CPU among the idle CPUs. 8. The task processing device according to claim 7, wherein the control unit is configured to perform the following steps to determine the target CPU among the idle CPUs: If the number of found idle CPUs is one, use the found idle CPU as the target CPU; If there are multiple idle CPUs found, one of the multiple idle CPUs is randomly selected as the target CPU. 9. The task processing device according to claim 6, wherein the control unit is configured to perform the following steps to determine a target CPU for executing the received operation instruction: Find idle CPUs during the current time period; If there is no idle CPU within the current time period, according to the task allocation mechanism of the operating system, the first idle CPU after the current time period is determined as the target CPU. 10. The task processing device according to any one of claims 6 to 9, wherein the pre-configured set of simple instructions includes one or more of the following instructions: display instructions, date viewing instructions, timed tasks Write command. 11. A task processing system, comprising the task processing device according to any one of claims 6 to 10 and at least one CPU connected to the task processing device.