CN104979160A - Manufacturing method of semiconductor device and manufacturing method of TI-IGBT - Google Patents
Manufacturing method of semiconductor device and manufacturing method of TI-IGBT Download PDFInfo
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Abstract
Description
技术领域technical field
本发明涉及半导体器件的制作领域,更具体的说是涉及一种半导体器件的制作方法及TI-IGBT的制作方法。The invention relates to the field of manufacturing semiconductor devices, and more specifically relates to a method for manufacturing a semiconductor device and a method for manufacturing a TI-IGBT.
背景技术Background technique
在半导体器件制造过程中,通常需要在半导体衬底表面的局部区域形成适当类型和适当浓度的掺杂区,而其他区域不进行掺杂,即对半导体衬底实现局部掺杂。In the manufacturing process of semiconductor devices, it is usually necessary to form a doped region of appropriate type and concentration in a local area of the surface of the semiconductor substrate, while other areas are not doped, that is, the semiconductor substrate is locally doped.
现有的局部掺杂包括光刻工艺和离子注入工艺,一般的光刻工艺要对半导体衬底表面进行清洗烘干、涂底、旋涂光刻胶、软烘、对准曝光、后烘、显影、硬烘、刻蚀、检测等工序,在半导体衬底表面需要进行掺杂的区域形成窗口,在半导体衬底表面不需要进行掺杂的区域形成光刻胶或薄膜进行掩盖,然后对带有光刻胶或薄膜的半导体衬底进行离子注入,由于窗口外的地方有光刻胶或薄膜进行遮挡,离子无法进入到半导体衬底中,而窗口对应的地方没有光刻胶或薄膜遮挡,离子进入到半导体衬底中形成掺杂区,从而在半导体衬底上形成局部掺杂。The existing local doping includes photolithography process and ion implantation process. The general photolithography process needs to clean and dry the surface of the semiconductor substrate, coat the bottom, spin the photoresist, soft bake, align and expose, post-bake, Developing, hard baking, etching, testing and other processes, forming windows on the area of the semiconductor substrate surface that needs to be doped, forming a photoresist or thin film on the area that does not need to be doped on the surface of the semiconductor substrate to mask, and then Ion implantation is performed on a semiconductor substrate with photoresist or thin film. Since the place outside the window is blocked by photoresist or thin film, ions cannot enter the semiconductor substrate, and the place corresponding to the window is not blocked by photoresist or thin film. The ions enter the semiconductor substrate to form a doped region, thereby forming local doping on the semiconductor substrate.
由于光刻工艺包括多个工艺步骤,且需要光刻机才能实现,造成在半导体器件制作过程中对局部掺杂精度要求较低的区域实现局部掺杂时,工艺繁琐且成本较高。Since the photolithography process includes multiple process steps and requires a photolithography machine to achieve local doping in areas with low local doping accuracy requirements during the fabrication of semiconductor devices, the process is cumbersome and the cost is high.
发明内容Contents of the invention
有鉴于此,本发明提供一种半导体器件的制作方法及TI-IGBT(Triplemode Integrate-Insulated Gate Bipolar Transistor,三模式集成绝缘栅型双极晶体管)的制作方法,以解决现有技术中对局部掺杂精度要求较低的半导体器件实现局部掺杂时,工艺繁琐且成本较大的问题。In view of this, the present invention provides a method for manufacturing a semiconductor device and a method for manufacturing a TI-IGBT (Triplemode Integrate-Insulated Gate Bipolar Transistor, triple mode integrated insulated gate bipolar transistor) to solve the problem of local doping in the prior art. When semiconductor devices with low precision requirements realize local doping, the process is cumbersome and the cost is high.
为实现上述目的,本发明提供如下技术方案:To achieve the above object, the present invention provides the following technical solutions:
一种半导体器件的制作方法,包括:A method of manufacturing a semiconductor device, comprising:
提供半导体衬底;Provide semiconductor substrates;
在所述半导体衬底的一个表面上掺杂第一类型杂质,形成全部掺杂的第一掺杂层;doping a first type of impurity on one surface of the semiconductor substrate to form a fully doped first doped layer;
在所述第一掺杂层上设置带有通孔图案的离子罩,所述通孔暴露出所述第一掺杂层待形成第二掺杂区的表面;An ion mask with a pattern of through holes is provided on the first doped layer, and the through holes expose the surface of the first doped layer where the second doped region is to be formed;
对设置有离子罩的第一掺杂层掺杂第二类型杂质,在所述待形成第二掺杂区掺杂形成第二掺杂区,其余未进行第二类型杂质掺杂的第一掺杂层区域形成第一掺杂区。Doping the first doped layer with the ion mask with the second type impurity, doping the second doped region to be formed to form the second doped region, and doping the rest of the first doped layer that is not doped with the second type impurity The impurity layer region forms a first doped region.
优选地,所述掺杂第一类型杂质与所述掺杂第二类型杂质的具体过程为:采用离子注入机进行离子注入。Preferably, the specific process of doping the first type of impurity and the doping of the second type of impurity is: using an ion implanter to perform ion implantation.
优选地,所述在所述第一掺杂层上设置带有通孔图案的离子罩具体为:将离子罩安装在所述离子注入机上,移动所述形成全部掺杂的第一掺杂层的半导体衬底,将所述形成全部掺杂的第一掺杂层的半导体衬底与所述离子罩对准。Preferably, the arranging the ion mask with the through-hole pattern on the first doped layer specifically includes: installing the ion mask on the ion implanter, moving the first doped layer that is fully doped aligning the semiconductor substrate forming the fully doped first doped layer with the ion mask.
优选地,所述在所述第一掺杂层上设置带有通孔图案的离子罩具体为:采用夹具将所述离子罩与所述形成全部掺杂的第一掺杂层的半导体衬底对准后固定在一起。Preferably, the setting of the ion mask with a through-hole pattern on the first doped layer is specifically: using a clamp to connect the ion mask with the semiconductor substrate forming the fully doped first doped layer Aligned and fastened together.
优选地,所述离子罩为金属片。Preferably, the ion shield is a metal sheet.
优选地,所述半导体器件为快恢复二极管、门极可关断晶闸管、电子注入增强门极晶体管、集成门极换流晶闸管、MOS控制型可关断晶闸管或集成门极双晶体管中的任意一种。Preferably, the semiconductor device is any one of fast recovery diodes, gate turn-off thyristors, electron injection enhanced gate transistors, integrated gate commutation thyristors, MOS-controlled turn-off thyristors or integrated gate double transistors kind.
本发明还提供了另外一种半导体器件制作方法,包括:The present invention also provides another method for manufacturing a semiconductor device, including:
提供半导体衬底;Provide semiconductor substrates;
在所述半导体衬底的一个表面设置带有第一掺杂区图案的第一离子罩;setting a first ion mask with a first doped region pattern on one surface of the semiconductor substrate;
对设置有第一离子罩的半导体衬底进行第一类型杂质的掺杂,形成第一掺杂区;Doping the semiconductor substrate provided with the first ion mask with the first type of impurities to form a first doped region;
在形成第一掺杂区的半导体衬底表面设置带有第二掺杂区图案的第二离子罩;setting a second ion mask with a second doped region pattern on the surface of the semiconductor substrate forming the first doped region;
对设置有第二离子罩的半导体衬底进行第二类型杂质的掺杂,形成第二掺杂区。The semiconductor substrate provided with the second ion mask is doped with the second type impurity to form a second doped region.
优选地,所述第一类型杂质的掺杂与所述第二类型杂质的掺杂的具体过程为:采用离子注入机进行离子注入。Preferably, the specific process of doping the first type of impurities and the doping of the second type of impurities is: using an ion implanter to perform ion implantation.
优选地,所述离子罩为金属片。Preferably, the ion shield is a metal sheet.
优选地,所述半导体器件为快恢复二极管、门极可关断晶闸管、电子注入增强门极晶体管、集成门极换流晶闸管、MOS控制型可关断晶闸管或集成门极双晶体管中的任意一种。Preferably, the semiconductor device is any one of fast recovery diodes, gate turn-off thyristors, electron injection enhanced gate transistors, integrated gate commutation thyristors, MOS-controlled turn-off thyristors or integrated gate double transistors kind.
同时,本发明还提供了一种TI-IGBT的制作方法,包括:Simultaneously, the present invention also provides a kind of manufacturing method of TI-IGBT, comprising:
S1、提供半导体衬底,所述半导体衬底的一个表面内包括多个IGBT元胞,所述IGBT元胞包括漂移区,位于所述漂移区表面内的基区,位于所述基区表面内的两个发射区,以及覆盖所述两个发射区的发射极金属;S1. Provide a semiconductor substrate, one surface of the semiconductor substrate includes a plurality of IGBT cells, the IGBT cells include a drift region, a base region located in the surface of the drift region, and a base region located in the surface of the base region two emitter regions, and an emitter metal covering the two emitter regions;
S2、将所述半导体衬底的另一个表面减薄,并采用离子罩在所述半导体衬底的减薄面上形成所述TI-IGBT的背面结构,所述背面结构包括并列排布且掺杂类型相反的第一掺杂区和第二掺杂区。S2. Thinning the other surface of the semiconductor substrate, and using an ion mask to form the back structure of the TI-IGBT on the thinned surface of the semiconductor substrate, the back structure includes a parallel arrangement and doped A first doped region and a second doped region of opposite types.
优选地,所述采用离子罩在所述半导体衬底的减薄面上形成所述TI-IGBT的背面结构,具体包括:Preferably, the formation of the back structure of the TI-IGBT on the thinned surface of the semiconductor substrate using an ion mask specifically includes:
S201、在所述半导体衬底的减薄面上形成全部掺杂的第一掺杂层;S201, forming a fully doped first doped layer on the thinned surface of the semiconductor substrate;
S202、在所述第一掺杂层上设置带有第二掺杂区图案的离子罩,对所述第一掺杂层进行局部离子掺杂,形成第二掺杂区,所述第一掺杂层上其余未进行第二类型杂质掺杂的第一掺杂层区域形成第一掺杂区。S202. Set an ion mask with a pattern of a second doped region on the first doped layer, perform local ion doping on the first doped layer to form a second doped region, and the first doped layer The remaining regions of the first doped layer on the impurity layer that are not doped with the second type impurity form a first doped region.
优选地,所述采用离子罩在所述半导体衬底的减薄面上形成所述TI-IGBT的背面结构,具体包括:Preferably, the formation of the back structure of the TI-IGBT on the thinned surface of the semiconductor substrate using an ion mask specifically includes:
S211、在所述半导体衬底的减薄面上设置带有第一掺杂区图案的第一离子罩,对所述半导体衬底的减薄面进行局部离子掺杂,形成第一掺杂区;S211. Set a first ion mask with a first doping region pattern on the thinned surface of the semiconductor substrate, and perform local ion doping on the thinned surface of the semiconductor substrate to form a first doped region;
S212、在所述半导体衬底的减薄面上设置带有第二掺杂区图案的第二离子罩,对所述半导体衬底的减薄面进行局部离子掺杂,形成第二掺杂区。S212. Set a second ion mask with a second doping region pattern on the thinned surface of the semiconductor substrate, and perform local ion doping on the thinned surface of the semiconductor substrate to form a second doped region.
优选地,在步骤S2中将所述半导体衬底的另一个表面减薄之后,形成所述TI-IGBT的背面结构之前,还包括:Preferably, after thinning the other surface of the semiconductor substrate in step S2 and before forming the back surface structure of the TI-IGBT, the method further includes:
对所述半导体衬底的减薄表面进行全部掺杂,在所述半导体衬底的减薄表面形成缓冲层。The thinned surface of the semiconductor substrate is fully doped, and a buffer layer is formed on the thinned surface of the semiconductor substrate.
优选地,所述半导体衬底的基材为硅、碳化硅、氮化镓、金刚石或磷化镓中的任意一种。Preferably, the base material of the semiconductor substrate is any one of silicon, silicon carbide, gallium nitride, diamond or gallium phosphide.
经由上述的技术方案可知,本发明提供的半导体器件的制作方法,在半导体器件制作过程中对局部掺杂精度要求较低的区域进行掺杂,所述局部掺杂方法采用离子罩对半导体衬底进行遮挡,在离子注入过程中,使部分区域的离子通过,部分区域的离子被遮挡,仅一步就实现了对半导体衬底的局部遮挡,相对于现有技术中需要涂胶、曝光、显影等工序实现局部遮挡,本发明提供的制作方法大大简化了工艺,缩短生产周期,提高了生产效率;且离子罩的制作成本相对于光刻机以及光刻工艺中的各工序需要的设备的成本大大降低,进而能够减少半导体器件的生产成本。It can be known from the above-mentioned technical solutions that the semiconductor device manufacturing method provided by the present invention, in the semiconductor device manufacturing process, doping the regions with low local doping accuracy requirements, and the local doping method uses an ion mask to cover the semiconductor substrate. Shielding, in the process of ion implantation, the ions in some areas are allowed to pass through, and the ions in some areas are shielded, and the partial shielding of the semiconductor substrate is realized in only one step. Compared with the prior art, glue coating, exposure, development, etc. are required The process realizes partial shading, and the manufacturing method provided by the invention greatly simplifies the process, shortens the production cycle, and improves the production efficiency; and the cost of manufacturing the ion mask is much higher than that of the equipment required for each process in the photolithography machine and the photolithography process. Reduced, which in turn can reduce the production cost of semiconductor devices.
即在对局部掺杂精度要求较低的半导体器件制作过程中,本发明提供的制作方法能够代替现有技术中通过光刻工艺和离子注入工艺实现的局部掺杂,由于本发明中的制作方法工艺步骤简单,因此可以简化工艺,缩短生产周期,并且由于所述方法采用的离子罩相对于昂贵的光刻机来说,成本大大降低,在一定程度上能够降低半导体器件的生产成本。That is, in the manufacturing process of semiconductor devices with lower requirements for local doping precision, the manufacturing method provided by the present invention can replace the local doping achieved by photolithography and ion implantation processes in the prior art, because the manufacturing method of the present invention The process steps are simple, so the process can be simplified and the production cycle can be shortened. Compared with the expensive photolithography machine, the cost of the ion mask used in the method is greatly reduced, and the production cost of semiconductor devices can be reduced to a certain extent.
本发明还提供了一种TI-IGBT的制作方法,其正面IGBT元胞采用现有的光刻工艺形成,而在制作所述TI-IGBT背面的掺杂区时,采用上述提供的制作方法形成,由于TI-IGBT背面的掺杂区面积较大,局部掺杂精度要求较低,采用昂贵的光刻工艺形成局部掺杂造成较大浪费,而本发明提供的TI-IGBT制作方法,采用离子罩实现局部掺杂,不仅简化了TI-IGBT的背面制作工艺,还降低TI-IGBT的制作成本。The present invention also provides a method for manufacturing a TI-IGBT. The front IGBT cell is formed by the existing photolithography process, and when the doped region on the back of the TI-IGBT is manufactured, it is formed by the method provided above. , due to the large area of the doped region on the back of the TI-IGBT, the local doping accuracy requirements are low, and the expensive photolithography process is used to form local doping, resulting in a large waste, and the TI-IGBT manufacturing method provided by the present invention uses ion The mask realizes local doping, which not only simplifies the manufacturing process of the back side of the TI-IGBT, but also reduces the manufacturing cost of the TI-IGBT.
附图说明Description of drawings
为了更清楚地说明本发明实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明的实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据提供的附图获得其他的附图。In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings that need to be used in the description of the embodiments or the prior art. Obviously, the accompanying drawings in the following description are only It is an embodiment of the present invention, and those skilled in the art can also obtain other drawings according to the provided drawings without creative work.
图1为本发明提供的一种半导体器件的制作方法流程图;Fig. 1 is a kind of manufacturing method flowchart of semiconductor device provided by the present invention;
图2为本发明实施例提供的一种离子罩安装方式;Fig. 2 is an ion mask installation method provided by the embodiment of the present invention;
图3为本发明实施例提供的另一种离子罩安装方式;Fig. 3 is another ion mask installation method provided by the embodiment of the present invention;
图4为本发明实施例提供的一种TI-IGBT制作方法流程图;FIG. 4 is a flow chart of a TI-IGBT manufacturing method provided by an embodiment of the present invention;
图5为本发明实施例提供的一种TI-IGBT器件衬底;Fig. 5 is a kind of TI-IGBT device substrate provided by the embodiment of the present invention;
图6为本发明实施例提供的步骤S2的一种具体方法流程图;FIG. 6 is a flow chart of a specific method of step S2 provided by the embodiment of the present invention;
图7为本发明实施例提供的一种形成第一掺杂层的工艺流程图;FIG. 7 is a flow chart of a process for forming a first doped layer provided by an embodiment of the present invention;
图8为本发明实施例提供的在第一掺杂层表面形成第二掺杂区的工艺流程图;Fig. 8 is a process flow diagram of forming a second doped region on the surface of the first doped layer according to an embodiment of the present invention;
图9为本发明实施例提供的一种TI-IGBT结构图;FIG. 9 is a structure diagram of a TI-IGBT provided by an embodiment of the present invention;
图10为本发明实施例提供的步骤S2的另一种具体方法流程图;Fig. 10 is another specific method flow chart of step S2 provided by the embodiment of the present invention;
图11为本发明实施例提供的另一种TI-IGBT结构图。FIG. 11 is a structure diagram of another TI-IGBT provided by an embodiment of the present invention.
具体实施方式Detailed ways
正如背景技术部分所述,现有技术中的局部掺杂方法包括光刻工艺和离子注入工艺,由于光刻工艺包含多个步骤,且需要光刻机才能实现,造成现有技术中的局部掺杂工艺繁琐且成本较高。As mentioned in the background technology section, the local doping method in the prior art includes photolithography process and ion implantation process. Since the photolithography process includes multiple steps and requires a photolithography machine to be realized, the local doping method in the prior art Miscellaneous process is loaded down with trivial details and cost is higher.
发明人发现,出现上述现象的原因是,在制作半导体器件的过程中,由于半导体器件尺寸较小,且对半导体衬底上掺杂区的形状、尺寸及位置的精确度要求较高,现有技术中通常采用光刻机进行精确对准,实现局部掺杂,但是发明人还发现,有些半导体器件表面的掺杂结构对掺杂区形状、尺寸及位置的精确度要求较低,这种情况下,还使用光刻机进行局部掺杂,一方面,由于光刻工艺包括多个工序,工艺繁琐;另一方面,光刻机的成像系统和定位系统的费用较高,且折旧速度非常快,造成光刻工艺的费用较高。The inventors have found that the reason for the above phenomenon is that in the process of manufacturing a semiconductor device, due to the small size of the semiconductor device and high requirements for the accuracy of the shape, size and position of the doped region on the semiconductor substrate, the existing In the technology, a photolithography machine is usually used for precise alignment to achieve local doping, but the inventors also found that the doping structure on the surface of some semiconductor devices has lower requirements for the accuracy of the shape, size and position of the doping region. In this case, a lithography machine is also used for local doping. On the one hand, because the lithography process includes multiple processes, the process is cumbersome; on the other hand, the cost of the imaging system and positioning system of the lithography machine is high, and the depreciation rate is very fast. , resulting in a higher cost of the photolithography process.
基于此,发明人经过研究发现,提供一种半导体器件的制作方法代替光刻工艺,实现对形状、尺寸及位置的精确度要求较低的半导体器件掺杂区的制作,所述半导体器件的制作方法包括:Based on this, the inventor found through research that a method for manufacturing a semiconductor device is provided to replace the photolithography process, so as to realize the manufacture of a doped region of a semiconductor device that requires less accuracy in shape, size and position. The manufacture of the semiconductor device Methods include:
提供半导体衬底;Provide semiconductor substrates;
在所述半导体衬底的一个表面上掺杂第一类型杂质,形成全部掺杂的第一掺杂层;doping a first type of impurity on one surface of the semiconductor substrate to form a fully doped first doped layer;
在所述第一掺杂层上设置带有通孔图案的离子罩,所述通孔暴露出所述第一掺杂层待形成第二掺杂区的表面;An ion mask with a pattern of through holes is provided on the first doped layer, and the through holes expose the surface of the first doped layer where the second doped region is to be formed;
对设置有离子罩的第一掺杂层掺杂第二类型杂质,在所述待形成第二掺杂区掺杂形成第二掺杂区,其余未进行第二类型杂质掺杂的第一掺杂层区域形成第一掺杂区。Doping the first doped layer with the ion mask with the second type impurity, doping the second doped region to be formed to form the second doped region, and doping the rest of the first doped layer that is not doped with the second type impurity The impurity layer region forms a first doped region.
由上述的技术方案可知,本发明提供的半导体器件的制作方法,由于仅仅采用离子罩代替现有技术中光刻工艺形成的光刻胶或薄膜对半导体衬底表面进行遮挡,形成局部掺杂,使得局部掺杂工艺仅需一步遮挡和离子注入就可以实现,避免了现有技术通过光刻工艺中涂胶、曝光、显影等工序以及光刻机的使用才能实现局部遮挡,本发明提供的制作方法不仅简化了工艺,提高了生产效率,还能够减少光刻机的使用,降低半导体器件的生产成本。It can be seen from the above technical scheme that the semiconductor device manufacturing method provided by the present invention only uses an ion mask to replace the photoresist or film formed by the photolithography process in the prior art to shield the surface of the semiconductor substrate to form local doping, The local doping process can be realized with only one step of shading and ion implantation, avoiding the local shading in the prior art through the gluing, exposure, development and other processes in the photolithography process and the use of a photolithography machine. The method not only simplifies the process and improves the production efficiency, but also can reduce the use of photolithography machines and reduce the production cost of semiconductor devices.
以上是本申请的核心思想,下面结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本发明的一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。The above is the core idea of the present application. The technical solutions in the embodiments of the present invention are clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention. rather than all examples. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.
在下面的描述中阐述了很多具体细节以便于充分理解本发明,但是本发明还可以采用其他不同于在此描述的方式来实施,本领域技术人员可以在不违背本发明内涵的情况下做类似推广,因此本发明不受下面公开的具体实施例的限制。In the following description, a lot of specific details are set forth in order to fully understand the present invention, but the present invention can also be implemented in other ways that are different from those described here, and those skilled in the art can do similar By extension, the present invention is therefore not limited to the specific examples disclosed below.
其次,本发明结合示意图进行详细描述,在详述本发明实施例时,为便于说明,表示器件结构的剖面图会不依一般比例作局部放大,而且所述示意图只是示例,其在此不应限制本发明保护的范围。此外,在实际制作中应包含长度、宽度及深度的三维空间尺寸。Secondly, the present invention is described in detail in combination with schematic diagrams. When describing the embodiments of the present invention in detail, for the convenience of explanation, the cross-sectional view showing the device structure will not be partially enlarged according to the general scale, and the schematic diagram is only an example, and it should not be limited here. The protection scope of the present invention. In addition, the three-dimensional space dimensions of length, width and depth should be included in actual production.
下面通过几个实施例具体描述本发明中提供的半导体器件的制作方法和TI-IGBT的制作方法。The manufacturing method of the semiconductor device and the manufacturing method of the TI-IGBT provided in the present invention will be specifically described below through several embodiments.
本发明的一个实施例公开了一种半导体器件的制作方法,其流程图如图1所示,包括:One embodiment of the present invention discloses a method for manufacturing a semiconductor device, the flow chart of which is shown in Figure 1, including:
步骤S101:提供半导体衬底。Step S101: providing a semiconductor substrate.
所述半导体衬底的基材为硅、碳化硅、氮化镓、金刚石或磷化镓中的任意一种,本实施例中对此不做限定。The base material of the semiconductor substrate is any one of silicon, silicon carbide, gallium nitride, diamond or gallium phosphide, which is not limited in this embodiment.
需要说明的是,本实施例提供的半导体器件的制作方法主要应用在对形状、尺寸及位置的精确度要求不高的掺杂区的制作过程中,例如功率半导体器件FRD(Fast Recovery Diode,快恢复二极管)、GTO(Gate Turn-Off Thyristor,门极可关断晶闸管)、IEGT(Injection Enhanced Gate Transistor,电子注入增强门极晶体管)、IGCT(Integrated Gate-Commutated Thyristor,集成门极换流晶闸管)、MTO(MOS Controlled Gate Turn-Off Thyristor,MOS控制型可关断晶闸管)、IGDT(Integrated Gate Dual Transistor,集成门极双晶体管)等的背面短路集电极或阳极的制作过程中,由于其背面短路集电极或阳极的掺杂区对形状、尺寸及位置的精确度要求不太严格,无需用具有精确对准功能的光刻工艺实现对半导体衬底的遮挡,再形成局部掺杂。而对在半导体衬底上形成对形状、尺寸及位置的精确度要求较高的掺杂区,本实施例中优选的采用光刻工艺实现局部掺杂。It should be noted that the manufacturing method of the semiconductor device provided in this embodiment is mainly used in the manufacturing process of the doped region that does not require high precision in shape, size and position, such as a power semiconductor device FRD (Fast Recovery Diode, fast Recovery diode), GTO (Gate Turn-Off Thyristor, the gate can turn off the thyristor), IEGT (Injection Enhanced Gate Transistor, electron injection enhanced gate transistor), IGCT (Integrated Gate-Commutated Thyristor, integrated gate commutation thyristor) , MTO (MOS Controlled Gate Turn-Off Thyristor, MOS Controlled Turn-Off Thyristor), IGDT (Integrated Gate Dual Transistor, Integrated Gate Dual Transistor), etc., during the production process of the back short collector or anode, due to the back short circuit The doped region of the collector or anode has less strict requirements on the accuracy of shape, size and position, and there is no need to use a photolithography process with precise alignment function to realize the shielding of the semiconductor substrate and form local doping. For the formation of the doped region on the semiconductor substrate that requires high precision in shape, size and position, in this embodiment, a photolithography process is preferably used to achieve local doping.
步骤S102:在所述半导体衬底的一个表面上掺杂第一类型杂质,形成全部掺杂的第一掺杂层;Step S102: Doping a first type of impurity on one surface of the semiconductor substrate to form a fully doped first doped layer;
所述第一类型杂质可以是N型杂质也可以是P型杂质,本实施例中对此不做限定。The first type impurity may be N type impurity or P type impurity, which is not limited in this embodiment.
步骤S103:在所述第一掺杂层上设置带有通孔图案的离子罩,所述通孔暴露出所述第一掺杂层待形成第二掺杂区的表面;Step S103: setting an ion mask with a pattern of through holes on the first doped layer, the through holes exposing the surface of the first doped layer where the second doped region is to be formed;
本实施例中所述离子罩可以是由金属材料加工形成的薄片,也可以是由与光刻胶材料相同的材料加工形成的薄片,本实施例中对所述离子罩的材料不做限定,只要所述离子罩能够在离子注入过程中,实现遮挡离子的作用即可,本实施例中优选的所述离子罩为金属片。需要说明的是,所述离子罩上所带有的通孔图案与所述半导体衬底上待掺杂区形状和位置相对应,所述图案为半导体衬底上需要进行离子注入形成掺杂区的图形。所述离子罩上的通孔图案能够使离子通过,从而在半导体衬底上形成具有一定掺杂类型的掺杂区。The ion mask described in this embodiment can be a thin sheet formed by processing a metal material, or a thin sheet formed by processing the same material as the photoresist material. In this embodiment, the material of the ion mask is not limited. As long as the ion shield can shield ions during the ion implantation process, the ion shield in this embodiment is preferably a metal sheet. It should be noted that the through hole pattern on the ion mask corresponds to the shape and position of the region to be doped on the semiconductor substrate, and the pattern is the doped region that needs to be implanted on the semiconductor substrate. graphics. The through-hole pattern on the ion mask can allow ions to pass through, thereby forming a doping region with a certain doping type on the semiconductor substrate.
步骤S104:对设置有离子罩的第一掺杂层掺杂第二类型杂质,在所述待形成第二掺杂区掺杂形成第二掺杂区,其余未进行第二类型杂质掺杂的第一掺杂层区域形成第一掺杂区。Step S104: Doping the first doped layer provided with an ion mask with a second type of impurity, doping the second doped region to be formed to form a second doped region, and doping the rest of the region that is not doped with the second type of impurity The first doped layer region forms a first doped region.
本实施例中,对设置有离子罩的第一掺杂层掺杂第二类型杂质优选的采用离子注入机进行离子掺杂。在采用离子注入机对所述半导体衬底进行离子注入时,如图2所示,离子罩1可以与半导体衬底2通过夹具3重叠夹在一起形成“复合半导体衬底”,然后放入离子注入机中进行离子注入,需要说明的是,通过夹具将离子罩和半导体衬底夹在一起时,离子罩和半导体衬底之间固定时,可以有一定的间隙,即离子罩和半导体衬底之间的固定为接近式固定;离子罩和半导体衬底之间还可以直接接触,即离子罩和半导体衬底之间的固定为接触式固定。为了方便离子罩和半导体衬底通过夹具固定在一起,本实施例中优选的所述离子罩的外形轮廓与所述半导体衬底的外形轮廓大小接近,形状相似。In this embodiment, it is preferable to use an ion implanter to perform ion doping on the first doped layer provided with an ion mask to dope the second type impurity. When using an ion implanter to perform ion implantation on the semiconductor substrate, as shown in Figure 2, the ion mask 1 and the semiconductor substrate 2 can be overlapped and clamped together by the clamp 3 to form a "composite semiconductor substrate", and then placed in the ion Ion implantation is performed in the implanter. It should be noted that when the ion mask and the semiconductor substrate are clamped together by a clamp, when the ion mask and the semiconductor substrate are fixed, there can be a certain gap, that is, the ion mask and the semiconductor substrate. The fixation between them is a proximity fixation; the ion mask and the semiconductor substrate can also be in direct contact, that is, the fixation between the ion mask and the semiconductor substrate is a contact fixation. In order to facilitate the fixing of the ion mask and the semiconductor substrate together by a clamp, in this embodiment, preferably, the outline of the ion mask is close to the outline of the semiconductor substrate in size and similar in shape.
本实施例中在所述第一掺杂层上设置带有通孔图案的离子罩具体为:采用夹具将所述离子罩与所述形成全部掺杂的第一掺杂层的半导体衬底对准后固定在一起。In this embodiment, setting an ion mask with a through-hole pattern on the first doped layer is specifically: using a clamp to align the ion mask with the semiconductor substrate forming the first doped layer that is fully doped. Pinned together afterwards.
另外,在采用离子注入机对所述半导体衬底进行离子注入时,离子罩还可以不与半导体衬底通过夹具固定在一起,尤其在大批量生产同一种或同一类型的半导体器件时,可以如图3所示,将离子罩1安装在离子注入机4上,然后将多个半导体衬底2放置在传送带5上,通过传送带5,将半导体衬底2依次传送到离子罩1的下方,从而快速实现对多个半导体衬底的局部掺杂。In addition, when ion implantation is performed on the semiconductor substrate using an ion implanter, the ion mask may not be fixed together with the semiconductor substrate through a clamp, especially when producing the same type or the same type of semiconductor devices in large quantities, as As shown in FIG. 3, the ion mask 1 is installed on the ion implanter 4, and then a plurality of semiconductor substrates 2 are placed on the conveyor belt 5, and the semiconductor substrates 2 are sequentially transferred to the bottom of the ion mask 1 by the conveyor belt 5, thereby Rapid local doping of multiple semiconductor substrates.
本实施例中,在所述第一掺杂层上设置带有通孔图案的离子罩具体为:将离子罩安装在所述离子注入机上,移动所述形成全部掺杂的第一掺杂层的半导体衬底,将所述形成全部掺杂的第一掺杂层的半导体衬底与所述离子罩对准。In this embodiment, setting an ion mask with a pattern of through holes on the first doped layer specifically includes: installing the ion mask on the ion implanter, moving the first doped layer that is fully doped aligning the semiconductor substrate forming the fully doped first doped layer with the ion mask.
本实施例中提供的半导体器件的制作方法,采用带有图案的离子罩遮挡半导体衬底的表面,代替现有技术中通过涂胶、曝光、显影等光刻工艺实现对半导体衬底的局部遮挡,再对所述带有离子罩的半导体衬底表面进行离子注入,由于所述离子罩通孔部分能够通过离子,而非通孔部分能够遮挡离子的通过,从而实现在半导体衬底上的局部掺杂。由于所述离子罩的制作工艺简单,且成本较低,相对于现有技术中需要通过工艺繁琐且设备昂贵的光刻工艺实现半导体衬底的局部掺杂,本实施例中提供的制作方法更简单,成本较低且能够缩短半导体器件的生产周期。The method for manufacturing a semiconductor device provided in this embodiment uses a patterned ion mask to shield the surface of the semiconductor substrate, instead of partially shielding the semiconductor substrate through photolithography processes such as gluing, exposure, and development in the prior art. , and then perform ion implantation on the surface of the semiconductor substrate with the ion mask, because the through hole part of the ion mask can pass through ions, and the non-through hole part can block the passage of ions, so as to realize the partial ion implantation on the semiconductor substrate. Doped. Because the manufacturing process of the ion mask is simple and the cost is relatively low, compared with the prior art that requires a cumbersome and expensive photolithography process to achieve local doping of the semiconductor substrate, the manufacturing method provided in this embodiment is more efficient. Simple, low cost and capable of shortening the production cycle of semiconductor devices.
另外,在较薄的半导体衬底上形成掺杂区时,由于光刻工艺中包括对半导体衬底进行软烘、后烘和硬烘等工序,在这些工艺中,由于高温处理,半导体衬底容易出现翘曲或碎片,造成器件不良或损坏,降低了器件的成品率,造成较大成本。而采用离子罩形成局部掺杂的过程中,所述离子罩仅仅接近或接触半导体衬底表面即可,无需在半导体衬底的表面进行多道工序,且不需要对半导体衬底进行高温处理,因此,可以降低半导体衬底出现翘曲或碎片的概率,从而提高成品率,节省了成本。In addition, when forming a doped region on a thin semiconductor substrate, since the photolithography process includes soft-baking, post-baking and hard-baking of the semiconductor substrate, in these processes, due to high temperature treatment, the semiconductor substrate Warpage or fragments are prone to occur, resulting in defective or damaged devices, reducing the yield of devices and causing greater costs. In the process of using an ion mask to form local doping, the ion mask only needs to be close to or contact the surface of the semiconductor substrate, and there is no need to perform multiple processes on the surface of the semiconductor substrate, and it is not necessary to perform high-temperature treatment on the semiconductor substrate. Therefore, the probability of warping or fragmentation of the semiconductor substrate can be reduced, thereby improving yield and saving cost.
本发明的另一个实施例中提供的半导体器件制作方法包括以下步骤:A semiconductor device manufacturing method provided in another embodiment of the present invention includes the following steps:
提供半导体衬底;Provide semiconductor substrates;
在所述半导体衬底的一个表面设置带有第一掺杂区图案的第一离子罩;setting a first ion mask with a first doped region pattern on one surface of the semiconductor substrate;
对设置有第一离子罩的半导体衬底进行第一类型杂质的掺杂,形成第一掺杂区;Doping the semiconductor substrate provided with the first ion mask with the first type of impurities to form a first doped region;
在形成第一掺杂区的半导体衬底表面设置带有第二掺杂区图案的第二离子罩;setting a second ion mask with a second doped region pattern on the surface of the semiconductor substrate forming the first doped region;
对设置有第二离子罩的半导体衬底进行第二类型杂质的掺杂,形成第二掺杂区。The semiconductor substrate provided with the second ion mask is doped with the second type impurity to form a second doped region.
与上一个实施例不同的是,本实施例中在半导体衬底的表面采用两个离子罩,分两次分别形成不同的掺杂区,最终形成需要的掺杂图案,在半导体器件的实际生产过程中,可以根据半导体器件背面结构的掺杂区形状或背面阳极的结构进行上述两种制作方法的选择,本发明中对此不进行限定。The difference from the previous embodiment is that in this embodiment, two ion masks are used on the surface of the semiconductor substrate to form different doping regions twice, and finally form the required doping pattern. In the actual production of semiconductor devices During the process, the above two manufacturing methods can be selected according to the shape of the doped region of the back structure of the semiconductor device or the structure of the back anode, which is not limited in the present invention.
本发明的又一个实施例中公开了一种TI-IGBT(Triple modeIntegrate-Insulated Gate Bipolar Transistor,三模式集成绝缘栅型双极晶体管)的制作方法,所述TI-IGBT为将IGBT(Insulated Gate Bipolar Transistor,绝缘栅双极型晶体管)、VDMOS(Vertical Double diffused MOS,垂直双扩散金属-氧化物场效应晶体管)、FRD三种器件的结构和功能巧妙的结合起来的功率半导体器件。Another embodiment of the present invention discloses a method for manufacturing a TI-IGBT (Triple mode Integrate-Insulated Gate Bipolar Transistor, triple mode integrated insulated gate bipolar transistor), the TI-IGBT is an IGBT (Insulated Gate Bipolar Transistor (Insulated Gate Bipolar Transistor), VDMOS (Vertical Double diffused MOS, Vertical Double Diffused Metal-Oxide Field Effect Transistor), FRD is a power semiconductor device that combines the structures and functions of the three devices ingeniously.
本实施例公开的一种TI-IGBT的制作方法,如图4所示,包括:A method for manufacturing a TI-IGBT disclosed in this embodiment, as shown in FIG. 4 , includes:
S1、提供半导体衬底,所述半导体衬底的一个表面内包括多个IGBT元胞,所述IGBT元胞包括漂移区,位于所述漂移区表面内的基区,位于所述基区表面内的两个发射区,以及覆盖所述两个发射区的发射极金属。S1. Provide a semiconductor substrate, one surface of the semiconductor substrate includes a plurality of IGBT cells, the IGBT cells include a drift region, a base region located in the surface of the drift region, and a base region located in the surface of the base region The two emitter regions, and the emitter metal covering the two emitter regions.
所述半导体衬底的形成过程为:提供半导体基片,所述半导体基片的材料可以是硅、碳化硅、氮化镓、金刚石或磷化镓中的任意一种,本实施例中优选的以所述半导体基片为硅片进行详细说明;对所述半导体基片进行全部掺杂形成漂移区;通过光刻工艺,对所述漂移区进行局部遮挡,再进行掺杂类型与漂移区掺杂类型相反的离子注入,在所述漂移区的表面内形成基区;再通过光刻工艺,对所述基区进行局部遮挡,进行掺杂类型与漂移区掺杂类型相同的离子注入,在所述基区的表面内形成两个发射区;最后在所述两个发射区上形成发射区金属,最终形成IGBT元胞。The formation process of the semiconductor substrate is: provide a semiconductor substrate, the material of the semiconductor substrate can be any one of silicon, silicon carbide, gallium nitride, diamond or gallium phosphide, preferably in this embodiment The semiconductor substrate is used as a silicon wafer for detailed description; the semiconductor substrate is fully doped to form a drift region; the drift region is partially shielded by photolithography, and then the doping type and the drift region are doped. Ion implantation of the opposite type of impurity forms a base region in the surface of the drift region; and then through a photolithography process, the base region is partially shielded, and ion implantation with the same doping type as that of the drift region is performed, and the Two emitter regions are formed on the surface of the base region; finally, emitter metal is formed on the two emitter regions, and finally an IGBT unit cell is formed.
如图5所示,所述半导体基片的一个表面包括多个IGBT元胞,每个IGBT元胞均包括漂移区101,位于漂移区101表面内的基区102,位于基区102表面内的两个发射区103,以及覆盖所述两个发射区的发射极金属104,发射区103和发射极金属104之间还包括绝缘层105。需要说明的是,漂移区101与发射区103的掺杂类型相同,且均与基区102的掺杂类型相反。本实施例中对漂移区、发射区和基区的具体掺杂类型不做限定,即所述漂移区的掺杂类型可以是N型,也可以是P型,具体视实际情况而定。As shown in Figure 5, one surface of the semiconductor substrate includes a plurality of IGBT cells, and each IGBT cell includes a drift region 101, a base region 102 located in the surface of the drift region 101, and a base region 102 located in the surface of the base region 102. Two emitter regions 103 , and emitter metal 104 covering the two emitter regions, and an insulating layer 105 is further included between the emitter region 103 and the emitter metal 104 . It should be noted that the doping type of the drift region 101 is the same as that of the emitter region 103 , and is opposite to that of the base region 102 . In this embodiment, the specific doping types of the drift region, the emitter region and the base region are not limited, that is, the doping type of the drift region may be N type or P type, depending on the actual situation.
S2、将所述半导体衬底的另一个表面减薄,并采用离子罩在所述半导体衬底的减薄面上形成所述TI-IGBT的背面结构。S2. Thinning the other surface of the semiconductor substrate, and using an ion mask to form the back structure of the TI-IGBT on the thinned surface of the semiconductor substrate.
其中,所述背面结构包括并列排布且掺杂类型相反的第一掺杂区和第二掺杂区。Wherein, the rear surface structure includes a first doped region and a second doped region which are arranged side by side and have opposite doping types.
需要说明的是,本实施例中所述采用离子罩在所述半导体衬底的减薄面上形成所述TI-IGBT的背面结构可以通过以下两种方法实现。第一种方法,如图6所示,具体包括:It should be noted that, in this embodiment, the formation of the backside structure of the TI-IGBT on the thinned surface of the semiconductor substrate by using an ion mask can be realized by the following two methods. The first method, as shown in Figure 6, specifically includes:
S201、在所述半导体衬底的减薄面上形成全部掺杂的第一掺杂层106,如图7所示;S201, forming a fully doped first doped layer 106 on the thinned surface of the semiconductor substrate, as shown in FIG. 7 ;
S202、在第一掺杂层106上设置带有第二掺杂区图案的离子罩107,对所述第一掺杂层进行局部离子掺杂,如图8所示,最终在半导体衬底的背面形成第二掺杂区108,所述第一掺杂层上的其余部分为第一掺杂区109,如图9所示为最终形成的TI-IGBT。S202. Set an ion mask 107 with a second doped region pattern on the first doped layer 106, and perform local ion doping on the first doped layer, as shown in FIG. 8 , finally on the semiconductor substrate The second doped region 108 is formed on the back side, and the remaining part on the first doped layer is the first doped region 109 , as shown in FIG. 9 , is the finally formed TI-IGBT.
即该方法形成第一掺杂区和第二掺杂区时,仅通过一次离子罩遮挡半导体衬底,然后在原来形成第一掺杂层的局部表面通过离子注入形成第二掺杂区。其中所述第一掺杂区和所述第二掺杂区的掺杂类型相反,如,第一掺杂区的掺杂类型为P型时,第二掺杂区的掺杂类型为N型,而所述第一掺杂区的掺杂类型为N型时,第二掺杂区的掺杂类型为P型,本实施例中对此不做限定。That is, when the method forms the first doped region and the second doped region, the semiconductor substrate is shielded only once by an ion mask, and then the second doped region is formed by ion implantation on the partial surface where the first doped layer was originally formed. Wherein the doping type of the first doping region and the second doping region are opposite, for example, when the doping type of the first doping region is P type, the doping type of the second doping region is N type , and when the doping type of the first doping region is N type, the doping type of the second doping region is P type, which is not limited in this embodiment.
所述采用离子罩在所述在所述半导体衬底的减薄面上形成所述TI-IGBT的背面结构的第二种方法,如图10所示,具体包括:The second method of using an ion mask to form the back structure of the TI-IGBT on the thinned surface of the semiconductor substrate, as shown in FIG. 10 , specifically includes:
S211、在所述半导体衬底的减薄面上设置带有第一掺杂区图案的第一离子罩,对所述半导体衬底的减薄面进行局部离子掺杂,形成第一掺杂区;S211. Set a first ion mask with a first doping region pattern on the thinned surface of the semiconductor substrate, and perform local ion doping on the thinned surface of the semiconductor substrate to form a first doped region;
S212、在所述半导体衬底的减薄面上设置带有第二掺杂区图案的第二离子罩,对所述半导体衬底的减薄面进行局部离子掺杂,形成第二掺杂区。S212. Set a second ion mask with a second doping region pattern on the thinned surface of the semiconductor substrate, and perform local ion doping on the thinned surface of the semiconductor substrate to form a second doped region.
即第二种方法制作第一掺杂区和第二掺杂区时,均采用了离子罩进行局部遮挡,形成局部掺杂。That is to say, in the second method, when the first doped region and the second doped region are fabricated, an ion mask is used for local shielding to form local doping.
需要说明的是,在对所述半导体衬底的另一个表面减薄后,形成TI-IGBT背面结构之前,还可以包括:对所述半导体衬底的减薄表面进行全部掺杂,在所述半导体衬底的减薄表面形成缓冲层。It should be noted that, after thinning the other surface of the semiconductor substrate and before forming the back surface structure of the TI-IGBT, it may also include: doping all the thinned surface of the semiconductor substrate, in the The thinned surface of the semiconductor substrate forms the buffer layer.
如图11所示,为带有缓冲层110的TI-IGBT。其中,缓冲层位于漂移区表面,使器件漂移区的厚度减少,从而使器件的导通电阻率降低,导通压降减小;并且缓冲层掺杂类型与器件漂移区的掺杂类型相同,因此缓冲层能够结合一部分载流子,达到控制器件背面载流子注入率的效果,减少了关断时需要从器件漂移区移出的载流子的数量,从而能够提高器件的关断速率。As shown in FIG. 11 , it is a TI-IGBT with a buffer layer 110 . Wherein, the buffer layer is located on the surface of the drift region, so that the thickness of the device drift region is reduced, thereby reducing the on-resistance of the device and the on-voltage drop; and the doping type of the buffer layer is the same as that of the device drift region, Therefore, the buffer layer can combine some carriers to achieve the effect of controlling the carrier injection rate on the back of the device, reducing the number of carriers that need to be removed from the drift region of the device when it is turned off, thereby improving the turn-off rate of the device.
本实施例中通过离子罩实现TI-IGBT制作过程中对半导体衬底表面的局部遮挡,从而采用简单的工艺实现TI-IGBT背面结构的形成,由于代替了现有技术中的光刻工艺实现局部遮挡,其实现过程中的工艺大大简化,缩短了器件的制作周期,而且在TI-IGBT制作过程中,减少了光刻机的使用,能够在一定程度上降低TI-IGBT的生产成本。In this embodiment, an ion mask is used to partially shield the surface of the semiconductor substrate during the TI-IGBT manufacturing process, thereby adopting a simple process to realize the formation of the back structure of the TI-IGBT. Shading, the process in the realization process is greatly simplified, the production cycle of the device is shortened, and in the process of TI-IGBT production, the use of photolithography machines is reduced, which can reduce the production cost of TI-IGBT to a certain extent.
本说明书中各个部分采用递进的方式描述,每个部分重点说明的都是与其他部分的不同之处,各个部分之间相同相似部分互相参见即可。Each part in this manual is described in a progressive manner, and each part focuses on the difference from other parts, and the same and similar parts of each part can be referred to each other.
对所公开的实施例的上述说明,使本领域专业技术人员能够实现或使用本发明。对这些实施例的多种修改对本领域的专业技术人员来说将是显而易见的,本文中所定义的一般原理可以在不脱离本发明的精神或范围的情况下,在其它实施例中实现。因此,本发明将不会被限制于本文所示的这些实施例,而是要符合与本文所公开的原理和新颖特点相一致的最宽的范围。The above description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the present invention will not be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
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| US20100140658A1 (en) * | 2008-12-10 | 2010-06-10 | Denso Corporation | Method of manufacturing semiconductor device including insulated gate bipolar transistor and diode |
| CN102376759A (en) * | 2010-08-17 | 2012-03-14 | 丰田自动车株式会社 | Semiconductor device having both igbt area and diode area |
| US20130001639A1 (en) * | 2010-04-02 | 2013-01-03 | Toyota Jidosha Kabushiki Kaisha | Semiconductor device comprising semiconductor substrate having diode region and igbt region |
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| US20100140658A1 (en) * | 2008-12-10 | 2010-06-10 | Denso Corporation | Method of manufacturing semiconductor device including insulated gate bipolar transistor and diode |
| US20130001639A1 (en) * | 2010-04-02 | 2013-01-03 | Toyota Jidosha Kabushiki Kaisha | Semiconductor device comprising semiconductor substrate having diode region and igbt region |
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