CN104883157B - A kind of variable subband digital filter - Google Patents

Abstract

A variable sub-band digital filter is used to decompose the [0,2π] frequency band into M uniform sub-bands for gating filtering, and its structure can be realized by a direct FIR filter or a transposed FIR filter. The high-efficiency variable sub-band filter of the present invention can combine different channel filters arbitrarily to form filters with 2 ^M kinds of passband structures, effectively realizing the variable sub-band filter and reducing the occupation of hardware resources.

Description

A Variable Subband Digital Filter

technical field

The invention relates to the field of digital filters, in particular to a variable sub-band digital filter.

Background technique

The available frequency bands in the field of mobile communications are generally limited resources, which require application or purchase to obtain corresponding operating qualifications. Within the same standard, frequency resources are also allocated to multiple different operators. Whether in China or abroad, an operator often obtains operating licenses for multiple discontinuous frequency bands in one system. For example, there are two sub-bands of 890-893MHz (3MHz bandwidth) and 900-901MHz (1MHz bandwidth) of GSM. Different countries have different plans for wireless frequency bands, and at the same time, one operator cannot obtain the right to operate the entire frequency band. Especially in foreign countries, different operators have different frequency band bandwidths. In addition, the bandwidths of multiple discontinuous frequency bands in one standard are not fixed. Therefore, in order to adapt to the operation characteristics of modern wireless mobile networks, communication systems such as base stations, wireless repeaters, mobile terminals and mobile phones need to have the function of multi-subband frequency selection and real-time bandwidth setting to meet the requirements of field applications. Simulation technology can solve multi-network fusion and multi-subband, but it cannot realize "real-time bandwidth setting".

Utilizing the flexible and precise characteristics of digital signal processing technology, the technical problem of "real-time bandwidth setting" can be effectively solved. In digital signal processing technology, a digital-to-analog converter first discretes, quantizes, and encodes a continuous analog signal into a digital signal. Then, the discrete digital signal is restored to an analog signal through digital-to-analog conversion after being processed by a mathematical algorithm. Algorithms of digital signal processing can be realized by programming through computers or digital signal processors (DSP), application-specific integrated circuits (ASIC), FPGA, etc. However, the current research and development of real-time variable sub-band filters is very limited, and there is no targeted and complete design and implementation method.

Contents of the invention

The main purpose of the present invention is to provide an efficient variable sub-band filter, which can reduce the occupation of hardware resources while effectively realizing the variable sub-band filter.

The present invention adopts following technical scheme:

A variable sub-band digital filter is used to decompose the [0,2π] frequency band into M uniform sub-bands for gating filtering, including a filtering input end and a filtering output end, and is characterized in that: its structure includes a direct type FIR filter or transposed FIR filter.

Preferably, the structure implemented by the direct FIR filter is as follows, including a filter input terminal, a filter output terminal, M-1 unit delay units, M-1 synthesis accumulators, M variable coefficient multipliers and M polyphase filter; one of the filter input ends is connected to the input end of the 0th phase polyphase filter, and the other is sequentially delayed by M-1 unit delay units to form an M-1 level delay branch; the M-1 level delay branches are respectively connected to The first to M-1th phase polyphase filter input terminals; the output terminals of the M polyphase filters are respectively connected to one input terminal of the M variable coefficient multipliers, and the other of the M variable coefficient multipliers The input terminals are respectively connected to M variable coefficients S _i , where i=0, 1, 2...M-1; the output terminals of the 0th to M-2th variable coefficient multipliers are respectively connected to the first to M-th One input terminal of one composite accumulator, the output terminal of the M-1th variable coefficient multiplier is connected to the other input terminal of the M-1th composite accumulator, and the M-2th composite accumulator is sequentially accumulated to the first composite accumulator device, the output terminal of the first synthesized accumulator is used as the filter output terminal.

Preferably, the structure realized by the transposition FIR filter is as follows, including M-1 unit delay units, M-1 synthesis accumulators, M variable coefficient multipliers and M polyphase filters; the filter input is divided into M branches, the M branches are respectively connected to the 0th to M-1th polyphase filter input terminals; the output terminals of M polyphase filters are respectively connected to an input terminal of M variable coefficient multipliers, and M The other input terminals of the variable coefficient multipliers are M variable coefficients S _i , where i=0, 1, 2...M-1; the output terminals of the 0th to M-2 variable coefficient multipliers are respectively Connect the first to the M-1th synthesis accumulator input end, the output end of the M-1th variable coefficient multiplier is connected to the other input end of the M-1th synthesis accumulator through the M-1th delay unit, the Mth The output terminals of the -2 composite accumulator to the first composite accumulator are respectively connected to the input terminal of the upper stage composite accumulator via the M-2th delay unit to the first delay unit, and the output terminal of the first composite accumulator is used as a filter output terminal.

Preferably, the M polyphase filters are direct type FIR filters.

Preferably, the polyphase filter includes a sub-filter input terminal, a sub-filter output terminal, N constant coefficient multipliers, N-1 M delay units and N-1 adders; the sub-filter input terminal is connected to the first One constant coefficient multiplier input terminal, the other path is sequentially delayed by N-1 M delay units to form an N-1 stage delay branch; the N-1 stage delay branch is respectively connected to the second to the Nth constant coefficient multiplication The other input terminals of the first to N constant coefficient multipliers are respectively connected to the filter coefficients h ₀ to h _N-1 , and the output terminals of the first to N-1 constant coefficient multipliers are respectively connected to The first to the N-1th adder input end, the output end of the Nth constant coefficient multiplier is connected to the other input end of the N-1th adder, and the N-1th adder is sequentially accumulated to the first adder , the output terminal of the first adder serves as the sub-filter output terminal.

Preferably, the polyphase filter is a transposed FIR filter.

Preferably, the polyphase filter includes a sub-filter input terminal, a sub-filter output terminal, N constant coefficient multipliers, N-1 M delay units, and N-1 adders; the sub-filter input terminal is divided into N branches The N branches are respectively connected to one input end of the first to the Nth constant coefficient multipliers, and the other input ends of the N constant coefficient multipliers are respectively connected to the filter coefficients h ₀ to h _N-1 , the first The output terminals of the first to N-1th constant coefficient multipliers are respectively connected to the input terminals of the first to N-1th adders, and the output terminals of the Nth constant coefficient multiplier are connected to the Nth through the N-1th M delay unit The other input end of the -1 adder, the output ends of the N-2th adder to the first adder are respectively connected to the input end of the upper stage adder through the N-2th delay unit to the first delay unit, the first adder The output terminal of the filter is used as the sub-filter output terminal.

Preferably, the synthesis accumulator adopts a carry-save and pipeline structure to reduce the operation delay of the adder.

Preferably, the unit delay unit, synthesis accumulator, polyphase filter and variable coefficient multiplier are all complex arithmetic units using two channels to filter the in-phase and quadrature signals synchronously.

As can be seen from the above description of the present invention, compared with the prior art, the present invention has the following beneficial effects:

1. The variable sub-band filter realized by the structure of the present invention can arbitrarily combine different channel filters to form filters with 2 ^M kinds of passband structures.

Two, the variable sub-band filter realized by the structure of the present invention can not only realize the all-pass function, but also the ripple characteristics in the passband are consistent with the low-pass prototype filter, and the signal will not produce amplitude distortion after passing through the filter

3. The present invention adopts a polyphase decomposition structure to realize variable multi-subband filtering, which can effectively reduce required hardware resources.

Four, the structure of the present invention is compared with the realization technology of general variable digital filter, can reduce the number of required changing parameters, the parameter that promptly general variable filter needs to change is the number of digital filter coefficient (generally 30 or more), and the number of parameters needed to be changed by the variable sub-band filter of the present invention is that the number of sub-bands is far less than the number of filter coefficients.

5. The variable sub-band filter implemented by the structure of the present invention uses an FIR filter, which has a linear phase characteristic, that is, the group delay for in-band signals is constant.

Description of drawings

Fig. 1 is the basic principle block diagram of existing variable sub-band digital filter;

Fig. 2 is the direct type structure (embodiment one) of variable sub-band digital filter of the present invention;

Fig. 3 is the transpose structure (embodiment two) of variable sub-band digital filter

Fig. 4 is the structure of direct type FIR polyphase filter;

Fig. 5 is the structure of transposition type FIR polyphase filter;

Fig. 6 is the impulse response waveform (N=79) of the 4th band filter;

Fig. 7 is the amplitude-frequency and phase-frequency response (N=79) of the 4th band filter;

Figure 8 is when only the first sub-band is selected, that is , the magnitude-frequency response of the variable subband filter;

Figure 9 is when the 2nd and 3rd subbands are selected, that is , the magnitude-frequency response of the variable subband filter.

detailed description

The present invention will be further described below through specific embodiments.

Embodiment one

A variable subband digital filter, based on a uniform subband filter implemented by a discrete Fourier transform (DFT) filter bank, used to decompose the [0,2π] frequency band into M uniform subbands for gating filtering .

Referring to Fig. 2, the structure realized by the direct type FIR filter includes filter input terminal x[n], filter output terminal y[n], M-1 unit delay units z ^-1 , M-1 synthetic accumulators 400, M variable coefficient multipliers 300 and M polyphase filters E ₀ (z ^M )...EM _-1 (z ^M ). The filter input terminal x[n] is connected to the input terminal E ₀ (z ^M ) of the 0th phase polyphase filter, and the other channel is sequentially delayed by M-1 unit delay units to form an M-1 delay branch; the M- The first-stage delay branches are respectively connected to the input ends of the first to M-1th phase polyphase filters E ₁ (z ^M )...E _M-1 (z ^M ); M polyphase filters E ₀ (z ^M ) ...The output terminals of E _M-1 (z ^M ) are respectively connected to one input terminal of M variable coefficient multipliers 300, and the other input terminals of M variable coefficient multipliers 300 are respectively connected to M variable coefficient S _i where i=0, 1, 2...M-1. The output terminals of the 0th to M-2th variable coefficient multipliers 300 are respectively connected to the input terminals of the first to M-1th synthetic accumulators 400, and the output terminals of the M-1th variable coefficient multipliers 300 The other input end of the M-1th synthetic accumulator 400 is connected, and the M-1th synthetic accumulator sequentially accumulates to the first synthetic accumulator, and the output terminal of the first synthetic accumulator serves as the filter output terminal y[n].

The unit delay unit z ^-1 , the synthesis accumulator 400, the polyphase filter E ₀ (z ^M )...E _M-1 (z ^M ) and the variable coefficient S _i of the variable coefficient multiplier are all complex arithmetic units, namely Synchronous execution of in-phase and quadrature signals using two channels. The unit delay unit z ^-1 is realized by a multi-bit register, and its bit width is equal to the bit width of the input signal. Synthetic accumulator 400 is a multi-input adder, which uses a carry-save adder to compress multiple inputs into two bit vectors of carry (Carry) and sum value (Sum), and adds them only at the first synthetic accumulator close to the output terminal Get the output result. The variable coefficient S _i input by the other end of the M variable coefficient multipliers 300, M-1≥i≥0, is equal to the sum of the modulation coefficients W ^ik _M of each subband, where i is the sequence number of the connected polyphase filter, M-1≥i≥0, M is the total number of subbands, k is the subband number, the subband filter contains several passbands (the passband is the frequency range with no amplitude attenuation), and S _i contains several items W ^ik _M ,which is:

The polyphase filter E _i (z ^M ) in this embodiment is a direct type FIR filter, i=0, 1...M-1. Referring to FIG. 4 , it includes a sub-filter input terminal, a sub-filter output terminal, N constant coefficient multipliers 220 , N-1 M delay units z- ^M , and N-1 adders 230 . One of the input ends of the sub-filter is connected to the input end of the first constant coefficient multiplier, and the other is sequentially delayed by N-1 M delay units z- ^M to form an N-1 delay branch. The N-1 delay branches are respectively connected to one input end of the second to the Nth constant coefficient multipliers, and the other input ends of the first to the Nth constant coefficient multipliers are respectively connected to filter coefficients _h0 to h _N-1 , the output terminals of the 0th to N-2th constant coefficient multipliers are respectively connected to the input terminals of the first to N-1th combined adders, and the output terminals of the N-1th constant coefficient multipliers are connected to the first The other input end of the N-1 adder, the N-1th adder sequentially accumulates to the first adder, and the output end of the first adder serves as the sub-filter output end.

The following describes how to obtain the coefficients of each phase filter of the variable sub-band filter of the polyphase decomposition structure.

The variable sub-band filter prototype low-pass filter of the present invention is an Mth band (or Nyquist) filter. The prototype low-pass filter has only one basic passband, that is, the filter when S _i only contains one k=0 subband. Therefore, the prototype filter coefficients of the variable sub-band filter can be obtained by designing the M-th band (or Nyquist) filter. The Mth band (or called Nyquist) filter can be designed by window method and optimization method. The window method is used here to illustrate the design process.

First, the window shape is selected based on the variable subband filter stopband (passband) ripple (eg, 60dB) and the transition width of the passband corner frequency and the stopband corner frequency (ranging from 0 to 2π/M). Since the Kaiser window can obtain any ripple index by changing the parameters, the Kaiser window is used here.

Secondly, by sampling the impulse response waveform of a low-pass filter with a passband width of 2π/M, the sampling frequency is M. Be [-π/Μ, π/Μ] ideal filter's inverse Fourier transform by pass-band angular frequency ω to obtain its impulse response function as:

Then, the M-th band filter is taken from the above impulse response sequence after the N=2MJ-1 point centered on the time series number n=0 (N is the length of the FIR filter), that is, MJ-1≥n≥-MJ+1 , left shift (delay) (N-1)/2=MJ-1 is converted into a causal FIR filter, 2MJ-2≥n≥0, and each coefficient is multiplied by the Kaiser window sequence W _k [n] to obtain, where the subscript k represents the Kaiser window, namely:

in

I ₀ is a modified Bessel function, which can be expressed as a power series about m, where m takes 25 items to meet the accuracy requirements; α, β are parameters that control the performance of the filter, β is derived from α, and can be obtained through α Change the properties of the window function. As α increases, the main lobe of the filter amplitude spectrum widens and the amplitude of the side lobes decreases. For example, when α=2.12, the transition bandwidth of the main lobe of the filter amplitude spectrum is 3π/N, the passband ripple is 0.27dB, and the minimum attenuation of the stopband is 30dB; when α=7.865, the transition bandwidth is 10π/N, and the passband ripple is 2.75e- 4dB, the minimum attenuation of the stop band is 80dB. Accompanying drawing 6 and 7 have provided the wave form of impulse response of the 4th band filter and the spectrogram of amplitude-frequency characteristic and phase-frequency characteristic (a=7.9, J=10).

Finally, add a 0 to the front of the obtained M-th band filter coefficient, and then the length becomes 2MJ, which can be divided into M groups (or called M phases) of polyphase analysis filters E _i (z) (e _i [n]) Coefficients, namely: or e _i [n] represents the nth coefficient of Ei, _i is the ith phase. The coefficients of the above 4th band filter after 4-phase decomposition are shown in the table below.

E ₀ E ₁ E ₂ E ₃ 0.00 -1.53E-05 -4.58E-05 -4.58E-05 0.00 1.22E-04 2.44E-04 2.44E-04 0.00 -4.27E-04 -7.78E-04 -7.02E-04 0.00 1.10E-03 1.91E-03 1.65E-03 0.00 -2.40E-03 -4.03E-03 -3.39E-03 0.00 4.67E-03 7.72E-03 6.35E-03 0.00 -8.51E-03 -1.39E-02 -1.14E-02 0.00 1.52E-02 2.49E-02 2.05E-02 0.00 -2.85E-02 -4.86E-02 -4.24E-02 0.00 7.34E-02 1.58E-01 2.25E-01 0.25 2.25E-01 1.58E-01 7.34E-02 0.00 -4.24E-02 -4.86E-02 -2.85E-02 0.00 2.05E-02 2.49E-02 1.52E-02 0.00 -1.14E-02 -1.39E-02 -8.51E-03 0.00 6.35E-03 7.72E-03 4.67E-03

0.00 -3.39E-03 -4.03E-03 -2.40E-03 0.00 1.65E-03 1.91E-03 1.10E-03 0.00 -7.02E-04 -7.78E-04 -4.27E-04 0.00 2.44E-04 2.44E-04 1.22E-04 0.00 -4.58E-05 -4.58E-05 -1.53E-05

A variable sub-band filter with 4 sub-bands is designed above, and the gating of the sub-bands can be realized by changing _Si . For example, Figure 8 shows that when only the first subband is gated, that is , the amplitude-frequency response of the variable subband filter; Figure 9 shows when the second and third subbands are selected, namely , the magnitude-frequency response of the variable subband filter.

Implementation two

A variable subband digital filter is used to decompose the [0,2π] frequency band into M uniform subbands for gating filtering. Its difference with embodiment one is as follows:

Referring to Fig. 3, the structure realized by its transposition FIR filter includes M-1 unit delay units, M-1 synthesis accumulators 400, M variable coefficient multipliers 300 and M polyphase filters R ₀ (z ^M )…R _M-1 (z ^M ); the filter input end is divided into M branches, and the M branches are respectively connected to the 0th to Mth polyphase filter input ends R ₀ (z ^M )…R _M-1 (z ^M ); the output ends of M polyphase filters R ₀ (z ^M )...R _M-1 (z ^M ) are respectively connected to an input end of M variable coefficient multipliers 300, and M variable coefficient multipliers 300 The other input terminal of the coefficient multiplier 300 is respectively connected to M variable coefficients S _i , where i=0, 1, 2...M-1. The output terminals of the 0th to M-2th variable coefficient multipliers 300 are respectively connected to an input end of the first to M-1th composite accumulator 400, and the output terminals of the M-1th variable coefficient multipliers are passed through the first The M-1 delay unit is connected to the other input terminal of the M-1 synthesis accumulator, and the output terminals of the M-2 synthesis accumulator to the first synthesis accumulator are respectively connected to the above through the M-2 delay unit to the first delay unit The input end of the first-stage synthesis accumulator, the output end of the first synthesis accumulator is used as the filter output end.

In this embodiment, the unit delay unit z ^-1 , the synthesis accumulator 400, the polyphase filters R ₀ (z ^M )... _RM-1 (z ^M ) and the variable coefficient multiplier S _i are all complex arithmetic units, That is, two channels are used to perform synchronously on the in-phase and quadrature signals. The transposed unit delay unit register is located at the output of the polyphase filter, so the bit width is set by the maximum swing of the output result of the polyphase filter and the precision of the truncation. The synthetic accumulator is a multi-input adder, which uses a carry-save adder to compress multiple inputs into two bit vectors of carry (Carry) and sum (Sum), and only adds them together at the first synthetic accumulator close to the output. Output the result. The variable coefficient S _i input by the other end of the M variable coefficient multipliers, M-1≥i≥0, is equal to the sum of the modulation coefficients W ^ik _M of each subband, where i is the serial number of the connected polyphase filter, M -1≥i≥0, M is the total number of sub-bands, k is the sub-band number, the sub-band filter contains several passbands (the passband is the frequency range with no amplitude attenuation), and S _i contains several items W ^ik _M , which is:

The polyphase filter R _i (z ^M ) is a transposed FIR filter, where i=0, 1, 2...M-1. Referring to FIG. 5 , it includes a sub-filter input terminal, a sub-filter output terminal, N constant coefficient multipliers 220 , N-1 M delay units z- ^M and N-1 adders 230 . The input end of the sub-filter is divided into N branches, and the N branches are respectively connected to one input end of the first stage to the Nth constant coefficient multiplier, and the other input ends of the N constant coefficient multipliers are respectively connected to the filter coefficient h ₀ to h _N-1 , the output terminals of the first to N-1th constant coefficient multipliers are respectively connected to the input terminals of the first to N-1th adders, and the output terminals of the Nth constant coefficient multiplier are passed through the N-th One M delay unit is connected to the other input end of the N-1th adder, and the output ends of the N-2th adder to the first adder are respectively connected to the upper stage through the N-2th delay unit to the first delay unit The input end of the adder, the output end of the first adder is used as the output end of the sub-filter.

The above is only a specific embodiment of the present invention, but the design concept of the present invention is not limited thereto, and any insubstantial changes made to the present invention by using this concept should be an act of violating the protection scope of the present invention.

Claims (6)

1. a kind of variable subband digital filter, for being M uniformly subband progress spatially selecting filterings by [0,2 π] band decomposition, wrap Include filter input and filtering output end, it is characterised in that：Its structure includes Direct-type FIR Filter, Direct-type FIR Filter The structure of realization is as follows, including filter input, filtering output end, M-1 unit delay elements, M-1 synthesis accumulator, M Individual variable coefficient multiplier and M multiphase filter；The filter input connects the 0th phase multiphase filter input all the way, separately Postpone to form M-1 level delayed branch successively through M-1 unit delay elements all the way；The M-1 levels delayed branch connect respectively first to M-1 phase multiphase filter inputs；The output end of M multiphase filter is connected respectively to one of M variable coefficient multiplier Input, and another input of M variable coefficient multiplier connects M variable coefficient S respectively_i, Wherein i by connection multiphase filter sequence number, the M-1 of i=0,1,2 ...,For each gating subband index of modulation sum, k To gate the sequence number of subband, 0≤k≤M-1；0th connects first to the output ends of M-2 variable coefficient multipliers respectively M-1 synthesizes an input of accumulator, and M-1 variable coefficients multiplier outputs connection M-1 synthesis accumulators are another defeated Enter end, M-1 synthesis accumulators are added to the first synthesis accumulator successively, and the output end of the first synthesis accumulator is as filtering Output end.

A kind of 2. variable subband digital filter as claimed in claim 1, it is characterised in that：The multiphase filter includes son Filter input, sub- filtering output end, N number of constant coefficient multiplier, N-1 M delay cells and N-1 adder；The sub- filtering Input connects first constant coefficient multiplier input all the way, and another way postpones to form N-1 successively through N-1 M delay cells Level delayed branch；The N-1 levels delayed branch connects second to n-th constant coefficient multiplier input respectively, and first to n-th Another input of constant coefficient multiplier connects filter coefficient h respectively₀To h_N-1, first to the N-1 multiplication of constant coefficient The output end of device connects first to the N-1 adder input respectively, the output end connection of the n-th constant coefficient multiplier the Another input of N-1 adders, N-1 adders are added to first adder successively, and the output end of the first adder is made For sub- filtering output end.

3. a kind of variable subband digital filter, for being M uniformly subband progress spatially selecting filterings by [0,2 π] band decomposition, wrap Include filter input and filtering output end, it is characterised in that：Its structure includes transposition type FIR filter, and the structure that it is realized is such as Under, including M-1 unit delay elements, M-1 synthesis accumulator, M variable coefficient multiplier and M multiphase filter；Should Filter input is divided into M branch roads, and the M branch roads connect the 0th to the M-1 multiphase filter input respectively；M multiphase filter Output end be connected respectively to an input of M variable coefficient multiplier, and another input of M variable coefficient multiplier Hold as M variable coefficient S_i,Wherein i by connection multiphase filter sequence number, i=0,1,2 ... M-1,For it is each gating subband index of modulation sum, k be gating subband sequence number, 0≤k≤M-1；0th to M-2 Variable coefficient multiplier outputs connect the first to M-1 synthesis accumulator input, the M-1 variable coefficient multipliers respectively Output end synthesizes accumulator to the first conjunction through M-1 delay cells connection M-1 synthesis another inputs of accumulator, the M-1 Output end into accumulator is connected to upper level synthesis accumulator input through M-2 delay cells to the first delay cell respectively End, the first synthesis accumulator output end is as filtering output end.

A kind of 4. variable subband digital filter as claimed in claim 3, it is characterised in that：The multiphase filter includes son Filter input, sub- filtering output end, N number of constant coefficient multiplier, N-1 M delay cells and N-1 adder；The sub- filtering Input is divided into N branch roads, the N branch roads connect respectively first to n-th constant coefficient multiplier an input, this it is N number of often system Another input of number multiplier connects filter coefficient h respectively₀To h_N-1, first to the N-1 constant coefficient multiplier be defeated Going out end, connection first is single through the N-1 M delay to N-1 adder inputs, the n-th constant coefficient multiplier output end respectively Member is connected to another input of N-1 adders, and the output end of the N-1 adders to first adder is prolonged through N-2 respectively Slow unit to the first delay cell is connected to upper level adder input, and the first adder output end exports as son filtering End.

A kind of 5. variable subband digital filter as claimed in claim 3, it is characterised in that：Described synthesis accumulator is to adopt With Carry save array and pipeline organization to reduce the operating delay of adder.

A kind of 6. variable subband digital filter as described in claim 1 or 3, it is characterised in that：Described unit delay list Member, synthesis accumulator, multiphase filter and variable coefficient multiplier are to phase and the same stepping of orthogonal signalling using two passages The complex operation unit of row filtering.