CN104866246A - Solid state hybrid drive - Google Patents
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Abstract
The invention relates to the technical field of electronic equipment storage equipment, in particular to a solid state hybrid drive. The solid state hybrid drive comprises a storage controller and a storage array, wherein the storage array consists of a novel nonvolatile storage chip and a flash memory storage chip. Compared with a traditional NAND or NOR type flash type solid state drive, the solid state hybrid drive is higher in read-write speed and longer in erasing service life. Compared with the solid state drive which adopts a latest technology and is based on the novel nonvolatile storage chip, the solid state hybrid drive is low in cost and high in integration degree and is favorable for saving the power consumption and cost of the solid state drive.
Description
Technical field
The present invention relates to electronic equipment memory device technical field, particularly relate to a kind of hybrid solid-state hard disk.
Background technology
Along with the development of science and technology, NAND (NOT AND) type hybrid solid-state hard disk has become the non-volatile storage technologies of current main flow, be widely used in the every field such as data center, PC, mobile phone, intelligent terminal, consumer electronics, and still present the ever-increasing situation of demand.Figure 1 shows that conventional hard structural drawing, along with the development of science and technology, solid state hard disc technology is different from conventional hard technology, to produce much emerging memory vendor, manufacturer only need buy NAND and store particle, then is equipped with suitable control chip, just solid state hard disc can be manufactured, as shown in Figure 2, the solid state hard disc of a new generation generally adopts SATA interface, compatible with traditional mechanical hard disk.General nand memory can be divided into single layer cell NAND (SLC, single-level cell), multilevel-cell NAND (MLC, multi-level cell) and TLC (triple-level cell) and the stacking NAND of 3D.In order to improve the reading speed of solid state hard disc, take a kind of isomery NAND solid state hard disc structure at present as shown in Figure 2, and then can comprehensively single layer cell NAND and multilevel-cell NAND advantage separately, also possess readwrite performance at a high speed when realizing jumbo solid state hard disc simultaneously.
But along with the continuous propelling in semiconductor process techniques generation, flash memory encounters increasing bottleneck problem, such as floating boom thickness can not be unrestrictedly thinning along with reducing of device size.In addition, other technical disadvantages of flash memory also limit its application, and as high in operating voltage, writing speed is slow.The non-volatile memory technologies of 3D processing procedure is a kind of technology storage unit being changed into 3D stacked vertically from plane, the 3D Phase change memory technology (PCM) that such as technology is ripe gradually now, what therefore the storage density of each chip can be done is very large, the 3D phase transition storage that such as Intel is is researching and developing, the memory capacity of each chip can reach 128Gb or 256Gb, even higher in the near future, such as reach Tb magnitude.
The nonvolatile memory memory capacity of 3D processing procedure is large, read or write speed is fast, but cost is high, and traditional NAND or NOR type solid state disk read-write speed is slow, erasing and writing life is short, therefore, how to make that memory capacity is large, read or write speed is fast and erasing and writing life is long solid state hard disc becomes a great problem that those skilled in the art face.
Summary of the invention
In view of the above problems, the invention provides a kind of hybrid solid-state hard disk, comprise the storage array, control store and the logical circuit layer that are made up of novel non-volatile memory chip and flash memory storage chip-stored, wherein be provided with peripheral circuit and the memory controller circuit of novel non-volatile memory chip in logical circuit layer, this technical scheme is specially:
A kind of hybrid solid-state hard disk, wherein, described hybrid solid-state hard disk comprises:
Storage array chip, comprises novel non-volatile memory chip array and flash memory storage chip array, with non-volatile storage data;
Memory controller, is connected with described storage array chip, performs firmware program and algorithm, controls the reading and writing to described storage array chip and erase operation, carry out data transmission with peripherals.
Above-mentioned hybrid solid-state hard disk, wherein, described novel non-volatile memory chip array comprises phase change memory chip array, magnetoresistive memory chip array, ferroelectric memory chip array and Memister chip array.
Above-mentioned hybrid solid-state hard disk, wherein, described flash memory storage chip array comprises NAND and/or NOR type flash memory storage chip array.
Above-mentioned hybrid solid-state hard disk, wherein, further, described novel non-volatile memory chip is the non-volatile memory chip of 3D processing procedure, and:
The novel non-volatile memory chip of described 3D processing procedure includes logical circuit layer, this logical circuit layer comprises first area and second area, the preparation of described first area has the peripheral logical circuit of the non-volatile memory chip of described 3D processing procedure, described second area preparation has described memory controller circuit, to realize the novel nonvolatile memory chip of described memory controller circuit with described 3D processing procedure to be integrated in same chips.
Above-mentioned hybrid solid-state hard disk, wherein, the external interface of described hybrid solid-state hard disk can also for meeting the interface of EMMC consensus standard, for realizing embedded multi-media card function.
Above-mentioned hybrid solid-state hard disk, wherein, the FTL data of described flash memory storage chip are saved in described novel non-volatile memory chip.
Above-mentioned hybrid solid-state hard disk, wherein, described FTL data comprise the operating system of described hybrid solid-state hard disk, firmware program, algorithm and the logical address mapping table to physical address.
Above-mentioned hybrid solid-state hard disk, wherein, described algorithm comprises wear-leveling algorithm, garbage collection algorithms and allocation of space algorithm.
Above-mentioned hybrid solid-state hard disk, wherein, described hybrid solid-state hard disk comprises self-learning module, and this function is realized by the mode of software or hardware, with by erasable data conversion storage the most frequently in described flash memory storage chip array in described novel non-volatile memory chip.
Above-mentioned hybrid solid-state hard disk, wherein, described self-learning module comprises:
Data capture unit, obtains accessed user application and/or data in the flash memory storage chip of described hybrid solid-state hard disk;
Storage unit, stores user application and/or data that described data capture unit gets;
Statistical module, adds up the application program in described storage unit and/or data, show that access frequency is more than the user application of a threshold value and/or data;
Unloading module, exceedes user application and/or the data conversion storage extremely described novel non-volatile memory chip of threshold value by described access frequency.
Technique scheme tool has the following advantages or beneficial effect:
A kind of hybrid solid-state hard disk that the technical program provides, the solid state hard disc of more traditional NAND or NOR type flash memory, read or write speed is faster, and erasing and writing life is longer; Compared to the solid state hard disc based on novel nonvolatile memory of state-of-the-art technology, cost is low and integrated level is high, is conducive to power consumption and the cost of saving solid state hard disc.
Accompanying drawing explanation
By reading the detailed description done non-limiting example with reference to the following drawings, the present invention and feature, profile and advantage will become more apparent.Mark identical in whole accompanying drawing indicates identical part.Proportionally can not draw accompanying drawing, focus on purport of the present invention is shown.
Fig. 1 is traditional solid state hard disc structural representation;
Fig. 2 is a kind of isomery NAND solid state hard disc structure;
Fig. 3 is a kind of hybrid solid-state hard disc structure in one embodiment of the present invention;
Fig. 4 is a kind of hybrid solid-state hard disc structure in another embodiment of the present invention;
Fig. 5 is the nonvolatile memory chip outboard profile of 3D processing procedure of the present invention;
Fig. 6 is the nonvolatile memory chip vertical view of 3D processing procedure of the present invention;
A kind of FTL date storage method of Fig. 7 A-7B the present invention structural representation;
Fig. 8 A-8B the present invention increases the hybrid solid-state hard disc structure schematic diagram of self-learning module;
Fig. 9 is traditional EMMC structural representation;
Figure 10 is the EMMC schematic diagram based on memory construction of the present invention.
Embodiment
Structure shown in Figure 3, the invention provides a kind of hybrid solid-state hard disk, and wherein, this hybrid solid-state hard disk comprises:
Storage array chip, comprises novel non-volatile memory chip array and flash memory storage chip array, with non-volatile storage data;
Memory controller, is connected with storage array chip, performs firmware program and algorithm, controls the reading and writing to described storage array chip and erase operation, carry out data transmission with peripherals.
As a preferred embodiment of the invention, novel non-volatile memory chip array comprises phase change memory chip array, magnetoresistive memory chip array, ferroelectric memory chip array and Memister chip array.
As a preferred embodiment of the invention, flash memory storage chip array comprises NAND and/or NOR type flash memory storage chip array.
As a preferred embodiment of the invention, structure shown in Figure 4, novel non-volatile memory chip is the novel non-volatile memory chip of 3D processing procedure.The novel non-volatile memory chip technology adopting 3D processing procedure is a kind of technology novel non-volatile memory cells being changed into the vertical manufacturing process of 3D from planar technology, storage unit is made on silicon chip, and can stacking plurality of layers, what therefore the storage density of each chips can be done is very large, because the storage array of the novel non-volatile memory chip of 3D processing procedure is located on silicon chip, a lot of space thus can be left under silicon chip to manufacture transilog.Along with increasing to the demand of memory capacity, the storage array on silicon chip is also just increasing, and the logical circuit under corresponding silicon chip increases seldom, therefore can vacate a lot of regional space.
Structure shown in Figure 5, the novel non-volatile memory chip of 3D processing procedure also comprises silicon substrate 1, logical circuit layer 2 and storage array 3.
On this basis, further, see structure shown in Fig. 6 institute, the logical circuit layer 2 of the novel non-volatile memories core of 3D processing procedure comprises first area 4 and second area 5, first area preparation has the peripheral logical circuit of the non-volatile memory chip of 3D processing procedure, such as booster circuit, decoding scheme, sensor circuit, control circuit and I/O circuit etc., this circuit only accounts for the little part of whole logical circuit layer 2, because 3D storage array occupies very large part.Second area preparation has memory controller circuit, to realize the novel nonvolatile memory chip of memory controller circuit with 3D processing procedure to be integrated in same chips.The program considerably increases chip integration, improves the novel non-volatile memory chip silicon substrate area utilization factor of 3D processing procedure, decreases the motherboard cabling of hybrid solid-state hard disk, is conducive to power consumption and the cost of saving hybrid solid-state hard disk.
As a preferred embodiment of the invention, the area of logical circuit layer is not less than the area of storage array layer.
As a preferred embodiment of the invention, the external interface of hybrid solid-state hard disk can also for meeting the interface of EMMC consensus standard, for realizing embedded multi-media card function.
As a preferred embodiment of the invention, flash translation layer (FTL) (FlashTranslation Layer, the FTL) data of flash memory storage chip are saved in novel non-volatile memory chip.
As a preferred embodiment of the invention, see structure shown in Fig. 7 A and Fig. 7 B, flash memory storage chip array comprises several novel non-volatile flash memory storage chips, the FTL data of all flash memory storage chips be saved in novel non-volatile memory chip array, FTL data comprise the operating system of hybrid solid-state hard disk or firmware program, algorithm (such as wear-leveling algorithm, garbage collection algorithms, allocation of space algorithm etc.) and the logical address mapping table to physical address.Wherein, novel non-volatile memory chip can refer to the non-volatile memory chip that 3D makes.
As a preferred embodiment of the invention, hybrid solid-state hard disk comprises self-learning module, by software or hardware implementing self-learning function.
As a preferred embodiment of the invention, self-learning module is by data conversion storage the most frequently erasable in flash memory storage chip array to novel non-volatile memory chip.
As a preferred embodiment of the invention, self-learning module comprises:
Data capture unit, obtains accessed user application and/or data in the flash memory storage chip of hybrid solid-state hard disk;
Storage unit, the user application that storage data capture unit gets and/or data;
Statistic unit, the application program in statistics storage unit and/or data, show that access frequency is more than the user application of a threshold value and/or data;
Unloading unit, exceedes user application and/or the data conversion storage extremely novel non-volatile memory chip of threshold value by access frequency.
Above-mentioned hybrid solid-state hard disk, wherein, described peripherals is the electronic equipment with digital independent/memory function.
Traditional flash memory storage chip wear-leveling algorithm the data in storage block more for those erasing times is separately deposited in the less storage block of those erasing times, object allows all storage blocks in flash memory all participate in the process of erasing, allow each storage block have close erasing times as far as possible, but this algorithm can produce unnecessary erase operation (because will carry out the unloading of data), also just have lost the erasable number of times of flash memory storage chip.
See structure shown in Fig. 8 A and 8B, the flash memory storage chip wear-leveling algorithm that the present invention is more traditional is different, hybrid solid-state hard disk of the present invention also comprises self-learning module, wherein, data capture unit obtains accessed user application and/or data in the flash memory storage chip of hybrid solid-state hard disk, then the user application that gets of storage unit stores data acquiring unit and/or data, continue the application program in statistic unit statistics storage unit and/or data, show that access frequency is more than the user application of a threshold value and/or data, access frequency is exceeded user application and/or the data conversion storage extremely novel non-volatile memory chip of threshold value by last unloading unit.This self-learning function can be realized by hardware or software, because the erasable life-span of the novel non-volatile memory chip of the present invention is more much higher than flash memory storage chip, thus the erasing and writing life of flash memory storage chip array in hybrid solid-state hard disk of the present invention can be improved, but also can avoid due to the extra erase operation that wear-leveling algorithm brings in flash memory storage chip, thus the life-span of whole hybrid solid-state hard disk can increase greatly.
In addition, by in a period of time to the study of user's use habit, by in flash memory storage chip array in hybrid solid-state hard disk, the most often the user application of accessed (read-write) and/or data are saved in novel non-volatile memory chip of the present invention, when reading and writing this part application program and/data again next time, can directly to conduct interviews operation to this part application program be stored in novel non-volatile memory chip and/data, the flash memory storage chip array avoiding access speed slower, thus read or write speed and the performance of hybrid solid-state hard disk of the present invention can be improved, also can improve life-span and the stability of flash memory storage chip simultaneously.
Enumerate a specific embodiment as follows to set forth:
Hybrid solid-state hard disk of the present invention also may be used for realizing embedded multi-media card (EMMC).EMMC is a kind of storer based on flash memory, and its structure is extremely simple, and broadly TF card, SD card also belong to EMMC.As shown in Figure 9, its volume is extra small, low complex degree, highly integrated, low wiring difficulty for traditional EMMC structure, and effect is similar to hard disk.It is widely used in the fuselage internal memory of panel computer, mobile phone.And apply this hybrid solid-state hard disc structure of the present invention, also can realize EMMC, as shown in Figure 10.It (is the novel Nonvolatile storage array of 3D processing procedure that memory controller circuit in EMMC integrates with the peripheral circuit in the non-volatile memory chip of 3D processing procedure on silicon substrate; Under silicon substrate be 3D processing procedure non-volatile memory chip in peripheral circuit and the memory controller circuit of EMMC).Not only comprise control core in memory controller circuit, also comprise the I/O interface circuit of access storer and flash memory storage chip array and the multimedia card I/O interface mutual with the external world.Visible, this EMMC of the present invention chip integration is higher, and capacity is also larger, and read or write speed and the EMMC of life-span also than traditional far better, because of but the very superior EMMC of a kind of performance.
In sum, the invention discloses a kind of hybrid solid-state hard disk, comprise memory controller and be made up of novel non-volatile memory chip array and flash memory storage chip array, the solid state hard disc of more traditional NAND or NOR type flash memory, read or write speed is faster, and erasing and writing life is longer; Compared to the solid state hard disc based on novel nonvolatile memory of state-of-the-art technology, cost is low and integrated level is high, is conducive to power consumption and the cost of saving solid state hard disc.
It should be appreciated by those skilled in the art that those skilled in the art are realizing described change case in conjunction with prior art and above-described embodiment, do not repeat at this.Such change case does not affect flesh and blood of the present invention, does not repeat them here.
Above preferred embodiment of the present invention is described.It is to be appreciated that the present invention is not limited to above-mentioned particular implementation, the equipment wherein do not described in detail to the greatest extent and structure are construed as to be implemented with the common mode in this area; Any those of ordinary skill in the art, do not departing under technical solution of the present invention ambit, the Method and Technology content of above-mentioned announcement all can be utilized to make many possible variations and modification to technical solution of the present invention, or being revised as the Equivalent embodiments of equivalent variations, this does not affect flesh and blood of the present invention.Therefore, every content not departing from technical solution of the present invention, according to technical spirit of the present invention to any simple modification made for any of the above embodiments, equivalent variations and modification, all still belongs in the scope of technical solution of the present invention protection.
Claims (10)
1. a hybrid solid-state hard disk, is characterized in that, described hybrid solid-state hard disk comprises:
Storage array chip, comprises novel non-volatile memory chip array and flash memory storage chip array, with non-volatile storage data;
Memory controller, is connected with described storage array chip, performs firmware program and algorithm, controls the reading and writing to described storage array chip and erase operation, carry out data transmission with peripherals.
2. hybrid solid-state hard disk as claimed in claim 1, it is characterized in that, described novel non-volatile memory chip array comprises phase change memory chip array, magnetoresistive memory chip array, ferroelectric memory chip array and Memister chip array.
3. hybrid solid-state hard disk as claimed in claim 1, it is characterized in that, described flash memory storage chip array comprises NAND and/or NOR type flash memory storage chip array.
4. hybrid solid-state hard disk as claimed in claim 1, it is characterized in that, further, described novel non-volatile memory chip is the non-volatile memory chip of 3D processing procedure, and:
The novel non-volatile memory chip of described 3D processing procedure includes logical circuit layer, this logical circuit layer comprises first area and second area, the preparation of described first area has the peripheral logical circuit of the non-volatile memory chip of described 3D processing procedure, described second area preparation has described memory controller circuit, to realize the novel nonvolatile memory chip of described memory controller circuit with described 3D processing procedure to be integrated in same chips.
5. hybrid solid-state hard disk as claimed in claim 1, it is characterized in that, the external interface of described hybrid solid-state hard disk is the interface meeting EMMC consensus standard, for realizing embedded multi-media card function.
6. hybrid solid-state hard disk as claimed in claim 1, it is characterized in that, the FTL data of described flash memory storage chip are saved in described novel non-volatile memory chip.
7. hybrid solid-state hard disk as claimed in claim 6, is characterized in that, described FTL data comprise the operating system of described hybrid solid-state hard disk, firmware program, algorithm and the logical address mapping table to physical address.
8. hybrid solid-state hard disk as claimed in claim 7, it is characterized in that, described algorithm comprises wear-leveling algorithm, garbage collection algorithms and allocation of space algorithm.
9. hybrid solid-state hard disk as claimed in claim 1, it is characterized in that, described hybrid solid-state hard disk comprises self-learning module, this function is realized by the mode of software or hardware, with by erasable data conversion storage the most frequently in described flash memory storage chip array in described novel non-volatile memory chip.
10. hybrid solid-state hard disk as claimed in claim 9, it is characterized in that, described self-learning module comprises:
Data capture unit, obtains accessed user application and/or data in the flash memory storage chip of described hybrid solid-state hard disk;
Storage unit, stores user application and/or data that described data capture unit gets;
Statistical module, adds up the application program in described storage unit and/or data, show that access frequency is more than the user application of a threshold value and/or data;
Unloading module, exceedes user application and/or the data conversion storage extremely described novel non-volatile memory chip of threshold value by described access frequency.
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| CN105741875A (en) * | 2016-01-28 | 2016-07-06 | 上海新储集成电路有限公司 | Method for improving random read performance of hybrid memory |
| CN105892939A (en) * | 2016-03-28 | 2016-08-24 | 联想(北京)有限公司 | Information processing method and electronic equipment |
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| CN108053846A (en) * | 2017-11-30 | 2018-05-18 | 上海新储集成电路有限公司 | A kind of mechanical hard disk |
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| CN110413563A (en) * | 2018-04-28 | 2019-11-05 | 上海新储集成电路有限公司 | a microcontroller unit |
| CN111506255A (en) * | 2019-01-31 | 2020-08-07 | 山东存储之翼电子科技有限公司 | NVM-based solid state hard disk metadata management method and system |
| CN111506255B (en) * | 2019-01-31 | 2023-09-26 | 山东存储之翼电子科技有限公司 | NVM-based solid-state drive metadata management method and system |
| CN109947678A (en) * | 2019-03-26 | 2019-06-28 | 联想(北京)有限公司 | A kind of storage device, electronic equipment and data interactive method |
| CN109947678B (en) * | 2019-03-26 | 2021-07-16 | 联想(北京)有限公司 | Storage device, electronic equipment and data interaction method |
| CN111176562A (en) * | 2019-12-24 | 2020-05-19 | 河南文正电子数据处理有限公司 | Storage system |
| CN113190173A (en) * | 2021-04-09 | 2021-07-30 | 北京易华录信息技术股份有限公司 | Low-energy-consumption data cold magnetic storage method and device based on machine learning |
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