CN104810391A - Power device electrode and manufacture method thereof - Google Patents

Abstract

The invention provides a power device electrode and a manufacturing method thereof, wherein the method includes: sequentially forming a first titanium layer, a tungsten-titanium alloy layer and a second titanium layer on a silicon wafer; The silicon wafer is subjected to high-temperature annealing treatment, so that the first titanium layer reacts with the silicon wafer to form a silicon-titanium compound layer located between the surface of the silicon wafer and the tungsten-titanium alloy layer, and forms a silicon-titanium compound layer located on the silicon wafer. A titanium nitride layer on the surface of the second titanium layer; laying a metal interconnection layer on the surface of the titanium nitride layer. Through the power device electrode and the manufacturing method thereof provided by the present invention, the device performance and reliability of the device can be effectively guaranteed and improved in the application scenario of high temperature and high current.

Description

Power device electrode and manufacturing method thereof

technical field

The invention relates to the field of semiconductor technology, in particular to a method for manufacturing electrodes of power devices.

Background technique

For high-frequency and microwave power devices, due to the high current density and high power conditions, especially the current concentration effect and the heat flow cross-sectional area caused by the uneven distribution of current and heat flow on the junction surface Shrinkage, coupled with the influence of rapid changes in working conditions, makes the thermal stability of high frequency and microwave power devices more prominent.

Specifically, the metallized electrode structure of the device directly affects the thermal stability of the device, and has a huge impact on the performance and reliability of the device. At present, an existing power device electrode is a single-layer pure aluminum electrode. With this electrode structure, the performance of the device can still be guaranteed at low current density and low operating temperature. However, under high-frequency and high-power working conditions, this electrode structure shows great limitations. For example, at higher temperatures, the interaction between aluminum and silicon and silicon oxide is very strong, and silicon is also easy to dissolve into the electrode material. In this process, the electrode structure of the device will be destroyed. For example, under high temperature and high current working conditions, an electromigration phenomenon will occur on the aluminum electrode, which will cause voids and protrusions on the surface of the metal electrode material. Therefore, the above-mentioned existing solutions are only applicable to application scenarios with low operating frequency and low operating current density, and cannot guarantee the reliability of devices in application scenarios with high temperature and high current.

Contents of the invention

The invention provides a power device electrode and a manufacturing method thereof, which are used to solve the problem that the existing device electrode structure cannot guarantee the reliability of the device in the application scenario of high temperature and high current.

The first aspect of the present invention is to provide a method for manufacturing electrodes of power devices, including:

Generating the first titanium layer, the tungsten-titanium alloy layer and the second titanium layer sequentially on the silicon wafer;

In a mixed gas of nitrogen and hydrogen, the silicon wafer is subjected to high-temperature annealing treatment, so that the first titanium layer is formed by reacting with the silicon wafer and is located between the surface of the silicon wafer and the tungsten-titanium alloy layer. The silicon-titanium compound layer, and forming a titanium nitride layer on the surface of the second titanium layer;

A metal interconnection layer is laid on the surface of the titanium nitride layer.

Another aspect of the present invention provides a power device electrode, comprising:

A silicon-titanium compound layer on the surface of the silicon wafer;

A tungsten-titanium alloy layer located on the surface of the silicon-titanium compound layer;

a titanium layer on the surface of the tungsten-titanium alloy layer;

a titanium nitride layer on the surface of said titanium layer;

A metal interconnection layer located on the surface of the titanium nitride layer.

In the power device electrode and its manufacturing method provided by the present invention, a silicon-titanium compound layer with good electromigration resistance is formed on the silicon surface, and the silicon-titanium compound layer is in direct contact with the tungsten-titanium alloy layer, which can reduce the contact resistance, and at the same time The titanium nitride layer formed on the surface of the titanium layer located on the surface of the tungsten-titanium alloy layer has a good barrier effect, and can effectively ensure and improve the device performance and reliability of the device in the application scene of high temperature and high current.

Description of drawings

FIG. 1 is a schematic flow chart of a method for manufacturing electrodes of a power device provided by Embodiment 1 of the present invention;

2-4 are schematic cross-sectional views of the electrodes of the power device during the execution of the first embodiment.

Detailed ways

In order to make the purpose, technical solutions and advantages of the embodiments of the present invention more clear, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. For convenience of description, the sizes of different layers and regions are enlarged or reduced, so the sizes and ratios shown in the drawings do not necessarily represent actual sizes, nor do they reflect the proportional relationship of sizes.

Fig. 1 is a schematic flow chart of a method for manufacturing a power device electrode provided in Embodiment 1 of the present invention. In order to describe the method in this embodiment clearly and systematically, Fig. 2-Fig. Sectional schematic diagram, as shown in Figure 1, described method comprises the following steps:

101. Generating a first titanium layer, a tungsten-titanium alloy layer, and a second titanium layer in sequence on a silicon wafer.

Specifically, a schematic cross-sectional view of the electrode of the power device after performing step 101 is shown in FIG. Reference numeral 13 indicates that the second titanium layer is indicated by reference numeral 14 . Wherein, the type of the silicon wafer may include an N-type silicon substrate and a P-type silicon substrate, and the type of the silicon wafer may also include an epitaxial wafer grown with one or more layers of silicon thin films on the silicon substrate.

In practical applications, before performing the process flow, the surface of the silicon wafer is usually cleaned first, and correspondingly, before step 101, the method may also include:

The silicon wafer is cleaned by dry etching and/or wet etching.

Wherein, the dry etching may include but not limited to reactive ion etching, inductively coupled plasma and other etching methods.

It can be understood that by performing the above steps, a multilayer structure of titanium/tungsten-titanium alloy/titanium can be formed on the surface of the silicon wafer. Specifically, the thickness of each structural layer can be determined according to the needs of the actual process and device structure, for example, the thickness of the first titanium layer can be 0.01 μm to 1 μm, and the thickness of the second titanium layer can be 0.1 μm ~20 μm, the thickness of the tungsten-titanium alloy layer may be 0.01 μm-10 μm, which is not limited in this embodiment.

102. In a mixed gas of nitrogen and hydrogen, perform a high-temperature annealing treatment on the silicon wafer, so that the first titanium layer reacts with the silicon wafer to form a layer on the surface of the silicon wafer and the tungsten-titanium alloy layer. between the silicon-titanium compound layers, and form a titanium nitride layer on the surface of the second titanium layer.

Specifically, a schematic cross-sectional view of the electrode of the power device after performing 102 is shown in FIG. Reference numeral 16 represents.

Wherein, each processing parameter in the process of the high-temperature annealing treatment can be determined according to actual process requirements, for example, the volume ratio of nitrogen:hydrogen in the mixed gas can be 100:1-1:1. The temperature may be 550° C. to 1000° C., and the annealing time may be 5 minutes to 60 minutes, which is not limited in this embodiment.

It can be understood that by performing the above steps, the surface of the silicon wafer and the first titanium layer located on the surface of the silicon wafer can be subjected to high-temperature annealing treatment to form a layer located between the surface of the silicon wafer and the tungsten-titanium alloy layer. The silicon-titanium compound layer forms an ohmic contact, effectively reduces contact resistance, and improves device performance and reliability.

Moreover, in this embodiment, the silicon-titanium compound layer is in direct contact with the tungsten-titanium alloy layer, thereby further reducing the contact resistance, and can effectively prevent the silicon-titanium compound layer from protruding, and has good electromigration resistance capabilities, thereby further ensuring and improving device performance and reliability.

In addition, in this embodiment, the surface area of the second titanium layer undergoes the above-mentioned high-temperature annealing treatment to form a titanium nitride layer on the surface of the second titanium layer. The titanium nitride layer has a good barrier effect and can Used as a barrier layer, it will not affect the subsequent preparation of the metal interconnection layer and the device packaging process, and can also improve the reliability of the device electrode, thereby effectively ensuring the reliability of the device.

It can be understood that the silicon-titanium compound layer and the titanium nitride layer in this embodiment can be formed simultaneously in one high-temperature annealing process, thereby simplifying the process flow and reducing the cost of device manufacturing. At the same time, the hydrogen in the mixed gas is used as a protective gas during the annealing process, which can prevent the formation of oxides, thereby further reducing the contact resistance.

103. Laying a metal interconnection layer on the surface of the titanium nitride layer.

Specifically, a schematic cross-sectional view of the electrode of the power device after step 103 is performed is shown in FIG. 4 , wherein the metal interconnection layer is denoted by reference numeral 17 .

Wherein, the material of the metal interconnection layer may be gold, silver, aluminum, platinum or molybdenum, and the selection of the specific material may be determined according to the actual situation. For example, aluminum may be used as the metal electrode material, and correspondingly, 103 may specifically include : An aluminum layer is prepared on the surface of the titanium nitride layer.

In practical applications, before preparing the metal interconnection layer, the current silicon wafer with a multi-layer structure is usually cleaned, and correspondingly, before step 103, the method may also include:

The silicon wafer is cleaned by dry etching and/or wet etching.

Specifically, the dry etching may include but not limited to reactive ion etching, inductively coupled plasma and other etching methods.

The power device electrode manufacturing method provided in this embodiment forms a silicon-titanium compound layer with good electromigration resistance on the silicon surface. The silicon-titanium compound layer is in direct contact with the tungsten-titanium alloy layer, which can reduce the contact resistance. The titanium nitride layer formed on the surface of the tungsten-titanium alloy layer and the titanium layer has a good barrier effect, and can effectively guarantee and improve the device performance and reliability of the device in the application scene of high temperature and high current.

Embodiment 2 of the present invention provides a power device electrode, the cross-sectional schematic diagram of which is shown in FIG. 4 , and the power device electrode includes:

A silicon-titanium compound layer 15 on the surface of the silicon wafer 11;

The tungsten-titanium alloy layer 13 on the surface of the silicon-titanium compound layer 15;

The titanium layer 14 on the surface of the tungsten-titanium alloy layer 13;

a titanium nitride layer 16 on the surface of the titanium layer 14;

Metal interconnection layer 17 on the surface of titanium nitride layer 16 .

Wherein, the second titanium layer in the first embodiment is the titanium layer 14 in this embodiment. The type of the silicon wafer may include an N-type silicon substrate and a P-type silicon substrate, and the type of the silicon wafer may also include an epitaxial wafer grown with one or more layers of silicon thin films on the silicon substrate.

Specifically, the thickness of each structural layer can be determined according to the needs of the actual process and device structure. For example, the thickness of the first titanium layer can be 0.01 μm to 1 μm, and the thickness of the second titanium layer 14 can be 0.1 μm to 1 μm. 20 μm, the thickness of the tungsten-titanium alloy layer 13 may be 0.01 μm˜10 μm, which is not limited in this embodiment.

It can be understood that the ohmic contact formed by the silicon-titanium compound layer 15 located between the surface of the silicon wafer 11 and the tungsten-titanium alloy layer 13 can effectively reduce the contact resistance and improve device performance and reliability.

Moreover, in this embodiment, the silicon-titanium compound layer 15 is in direct contact with the tungsten-titanium alloy layer 13, thereby further reducing the contact resistance, and can effectively prevent the silicon-titanium compound layer 15 from protruding, and has good electromigration resistance, and further Further guarantee and improve device performance and reliability.

In addition, in this embodiment, the titanium nitride layer 16 has a good barrier effect and can be used as a barrier layer without affecting the subsequent preparation of the metal interconnection layer 17 and the device packaging process, and can also improve the reliability of the device electrodes. Reliability, so as to effectively guarantee the reliability of the device.

Wherein, the material of the metal interconnection layer can be gold, silver, aluminum, platinum or molybdenum, and the selection of the specific material can be determined according to the actual situation. For example, aluminum can be used as the metal electrode material, and correspondingly, the metal interconnection layer 17 Specifically, the material may be aluminum.

The power device electrode provided in this embodiment forms a silicon-titanium compound layer with good electromigration resistance on the silicon surface. The silicon-titanium compound layer is in direct contact with the tungsten-titanium alloy layer, which can reduce the contact resistance. The titanium nitride layer formed on the surface of the tungsten-titanium alloy layer and the titanium layer has a good barrier effect, and can effectively ensure and improve the device performance and reliability of the device in the application scenario of high temperature and high current.

Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present invention, rather than limiting them; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: It is still possible to modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements for some or all of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the technical solutions of the various embodiments of the present invention. scope.

Claims (12)

1. a power device electrode manufacturing method, is characterized in that, comprising:

Silicon chip generates the first titanium layer, tungsten-titanium alloy layer and the second titanium layer successively;

In the mist of nitrogen and hydrogen, the high temperature anneal is carried out to described silicon chip, forms the silicon-titanium compound layer between described silicon chip surface and described tungsten-titanium alloy layer to make described first titanium layer by described silicon chip reaction and form the titanium nitride layer being positioned at described second titanium layer surface;

Metal interconnection layer is laid on the surface of described titanium nitride layer.

2. method according to claim 1, is characterized in that, the thickness of described first titanium layer is 0.01 μm ~ 1 μm.

3. method according to claim 1, is characterized in that, the thickness of described second titanium layer is 0.1 μm ~ 20 μm.

4. method according to claim 1, is characterized in that, the thickness of described tungsten-titanium alloy layer is 0.01 μm ~ 10 μm.

5. method according to claim 1, is characterized in that, nitrogen in described mist: the volume ratio of hydrogen is 100:1 ~ 1:1.

6. method according to claim 1, is characterized in that, the annealing temperature of described the high temperature anneal is 550 DEG C ~ 1000 DEG C, and annealing time is 5 minutes ~ 60 minutes.

7. the method according to any one of claim 1-6, is characterized in that, describedly on the surface of described titanium nitride layer, prepares metal interconnection layer, specifically comprises:

Aluminium lamination is laid on the surface of described titanium nitride layer.

8. the method according to any one of claim 1-6, is characterized in that, described on the surface of silicon chip, prepare the first titanium layer, tungsten-titanium alloy layer and the second titanium layer successively before, also comprise:

By dry etching and/or wet etching, clean described silicon chip.

9. the method according to any one of claim 1-6, is characterized in that, described on the surface of described titanium nitride layer, prepare metal interconnection layer before, also comprise:

By dry etching and/or wet etching, clean described silicon chip.

10. the method according to any one of claim 1-6, is characterized in that, the type of described silicon chip comprises N-type silicon substrate and P-type silicon substrate.

11. methods according to any one of claim 1-6, it is characterized in that, the type of described silicon chip comprises the epitaxial wafer that grown one or more layers silicon thin film on a silicon substrate.

12. 1 kinds of power device electrodes, is characterized in that, comprising:

Be positioned at the silicon-titanium compound layer on silicon chip surface;

Be positioned at the tungsten-titanium alloy layer on described silicon-titanium compound layer surface;

Be positioned at the titanium layer on described tungsten-titanium alloy layer surface;

Be positioned at the titanium nitride layer on described titanium layer surface;

Be positioned at the metal interconnection layer on described titanium nitride layer surface.