CN104703409B - Circuit board processing method and relevant apparatus - Google Patents
Circuit board processing method and relevant apparatus Download PDFInfo
- Publication number
- CN104703409B CN104703409B CN201310661288.2A CN201310661288A CN104703409B CN 104703409 B CN104703409 B CN 104703409B CN 201310661288 A CN201310661288 A CN 201310661288A CN 104703409 B CN104703409 B CN 104703409B
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- Prior art keywords
- pores
- thickness
- metal level
- hole wall
- metalized
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- 238000003672 processing method Methods 0.000 title claims abstract description 15
- 239000011148 porous material Substances 0.000 claims abstract description 520
- 239000002184 metal Substances 0.000 claims abstract description 474
- 229910052751 metal Inorganic materials 0.000 claims abstract description 474
- 238000005553 drilling Methods 0.000 claims description 32
- 238000000034 method Methods 0.000 claims description 29
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 18
- 239000010931 gold Substances 0.000 claims description 18
- 229910052737 gold Inorganic materials 0.000 claims description 18
- 230000005611 electricity Effects 0.000 claims description 3
- 230000015572 biosynthetic process Effects 0.000 claims 1
- 150000002739 metals Chemical class 0.000 claims 1
- 238000007747 plating Methods 0.000 description 10
- 238000001465 metallisation Methods 0.000 description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 4
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 4
- 229910052802 copper Inorganic materials 0.000 description 4
- 239000010949 copper Substances 0.000 description 4
- MSNOMDLPLDYDME-UHFFFAOYSA-N gold nickel Chemical compound [Ni].[Au] MSNOMDLPLDYDME-UHFFFAOYSA-N 0.000 description 4
- LQBJWKCYZGMFEV-UHFFFAOYSA-N lead tin Chemical compound [Sn].[Pb] LQBJWKCYZGMFEV-UHFFFAOYSA-N 0.000 description 4
- 229910052709 silver Inorganic materials 0.000 description 4
- 239000004332 silver Substances 0.000 description 4
- 239000000126 substance Substances 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 238000009713 electroplating Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 206010068052 Mosaicism Diseases 0.000 description 1
- 241001074085 Scophthalmus aquosus Species 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000004069 differentiation Effects 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- 238000003754 machining Methods 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 210000003765 sex chromosome Anatomy 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
The embodiment of the invention discloses a kind of circuit board processing method and relevant apparatus.Wherein, a kind of circuit board processing method, it may include：N1 the first pores and N2 the second pores are drilled out on circuit boards；First metalized is carried out to circuit board, to form the metal level of first thickness on the hole wall of N1 the first pores and N2 the second pores；All metal levels including removing the metal level including first thickness formed on the hole wall of N2 the second pores；Second metalized is carried out to circuit board, to form the metal level of second thickness on the hole wall of N1 the first pores and N2 the second pores, wherein, N1 and N2 are positive integer.The scheme of the embodiment of the present invention is advantageous to further improve the reliability for processing multistage plated through-hole on circuit boards, and then lifts product fine rate.
Description
Technical field
The present invention relates to circuit board processing and manufacturing technology, and in particular to a kind of circuit board processing method and related dress
Put.
Background technology
With social progress and development, the circuit board that electronic applications use is more and more, and the differentiation of circuit board is needed
Ask also increasing.Under some scenes, it may be required that the metal hole wall metal layer thickness in the different metal hole in circuit board has
Certain ladder sex differernce.
Prior art has multiple plated through-holes of ladder sex differernce in processing hole wall metal layer thickness（Can referred to as multistage gold
Categoryization hole）When, it need to be completed by way of the plating that drill in batches.For the gold of every kind of thickness hole wall metal layer thickness
Categoryization hole（I.e. per rank plated through-hole）, these manufactured plated through-holes just are covered with dry film after machining, then
The plated through-hole of other hole wall metal layer thickness is being processed, by that analogy, until completing the processing of all plated through-holes.
The process of the existing multistage plated through-hole of processing need to repeatedly drill in batches to circuit board, due to the plating of circuit board
The possible simultaneously out-of-flatness in surface, it may make it that dirt is bored caused by multiple batches of boring procedure remains in groove gap etc., it is multiple batches of
The brill dirt of drilling be likely difficult to remove clean and cause to be layered；Furthermore if using dry film perforate or small opening, around hole and surface
Because the reason for etching and plating, is likely to form step, it is seen that necessarily reliable in the process of existing multistage plated through-hole be present
Sex chromosome mosaicism, and then may considerable influence product fine rate.
The content of the invention
The embodiment of the present invention provides a kind of circuit board processing method and relevant apparatus, to further improve on circuit boards
The reliability of multistage plated through-hole is processed, and then lifts product fine rate.
First aspect of the embodiment of the present invention provides a kind of circuit board processing method, it may include：
N1 the first pores and N2 the second pores are drilled out on circuit boards；
First metalized is carried out to the circuit board, to cause in the N1 the first pores and the N2 second
The metal level of first thickness is formed on the hole wall of pores；
Remove the owning including the metal level of the first thickness formed on the hole wall of the N2 the second pores
Metal level；
Second metalized is carried out to the circuit board, to cause in the N1 the first pores and the N2 second
The metal level of second thickness is formed on the hole wall of pores, wherein, the N1 and the N2 are positive integer.
Optionally, the first thickness sets for the hole wall metal level of the N1 the first pores and the N2 the second pores
Count the difference of thickness；Or first pores and second pores are hole wall metal level design thickness on the circuit board
Adjacent or non-conterminous two pores.
Optionally, the metal level for including the first thickness formed on the hole wall for removing N2 second pores
All metal levels inside include：Remove what is formed on the hole wall of N2 second pores based on power auger and/or laser drilling
All metal levels including the metal level of the first thickness.
Optionally, the compensation pore diameter range of the N1 the first pores drilled out is 0.1 millimeter to 0.2 millimeter.
Optionally, the compensation pore diameter range of the N2 the second pores drilled out is -0.1 millimeter to -0.2 millimeter.
Optionally, it is described that the circuit board is carried out before the first metalized also to include：
N3 the 3rd pores are drilled out on circuit boards, wherein, the N3 is positive integer；
Wherein, the hole wall also caused to the first metalized of circuit board progress in the N3 the 3rd pores
The upper metal level for forming first thickness, second metalized that carried out to the circuit board also cause in the N3 the individual 3rd
The metal level of second thickness is formed on the hole wall of pores；
It is described that the circuit board is carried out after the second metalized also to include：Remove the hole of the N3 the 3rd pores
All metal levels including the metal level of the first thickness and the metal level of the second thickness formed on wall；To institute
State circuit board and carry out the 3rd metalized, to cause in the N1 the first pores and the N2 the second pores and the N3
The metal level of the 3rd thickness is formed on the hole wall of individual 3rd pores.
Optionally, the second thickness sets for the hole wall metal level of the N2 the second pores and the N3 the 3rd pores
Count the difference of thickness；Second pores and the 3rd pores be on the circuit board hole wall metal level design thickness it is adjacent or
Non-conterminous two pores.
Optionally, the metal level for including the first thickness formed on the hole wall for removing N3 the 3rd pores
With all metal levels including the metal level of the second thickness, including：Removed based on power auger and/or laser drilling described N3
The institute including the metal level of the first thickness and the metal level of the second thickness formed on the hole wall of 3rd pores
There is metal level.
Optionally, the compensation pore diameter range of the N3 the 3rd pores drilled out is -0.1 millimeter to -0.2 millimeter.
Optionally, it is described that the circuit board is carried out before the first metalized also to include：
N4 the 4th pores are drilled out on circuit boards, wherein, the N4 is positive integer；
Wherein, the hole wall also caused to the first metalized of circuit board progress in the N4 the 4th pores
The upper metal level for forming first thickness, second metalized that carried out to the circuit board also cause in the N4 the individual 4th
The metal level of second thickness is formed on the hole wall of pores；It is described that the 3rd metalized of circuit board progress is also caused in institute
State the metal level that the 3rd thickness is formed on the hole wall of N4 the 4th pores；
It is described that the circuit board is carried out after the 3rd metalized also to include：Remove the hole of the N4 the 4th pores
The metal level of the metal level including the first thickness, the metal level of the second thickness and the 3rd thickness that are formed on wall
All metal levels inside；4th metalized is carried out to the circuit board, to cause in the N1 the first pores, described
The metal level of the 4th thickness is formed on the hole wall of N2 the second pores, the N3 the 3rd pores and the N4 the 4th pores.
Optionally, the 3rd thickness sets for the hole wall metal level of the N3 the 3rd pores and the N4 the 4th pores
Count the difference of thickness；3rd pores and the 4th pores be on the circuit board hole wall metal level design thickness it is adjacent or
Non-conterminous two pores.
Optionally, the metal for including the first thickness formed on the hole wall for removing N4 the 4th pores
All metal levels including the metal level of layer, the metal level of the second thickness and the 3rd thickness, including：Based on power auger
And/or laser drilling removes the metal level including the first thickness formed on the hole wall of the N4 the 4th pores, described the
All metal levels including the metal level of the metal level of two thickness and the 3rd thickness.
Optionally, the compensation pore diameter range of the N4 the 4th pores drilled out is -0.1 millimeter to -0.2 millimeter.
Optionally, the metal level includes layers of copper, silver layer, layer gold, nickel-gold layer and/or tin lead layer.
Second aspect of the present invention provides a kind of circuit board processing device, it may include：
Drilling equipment, for drilling out N1 the first pores and N2 the second pores on circuit boards；
Metalized device, for carrying out the first metalized to the circuit board, to cause in the N1 the
The metal level of first thickness is formed on the hole wall of one pores and the N2 the second pores；
Metal level remove device, what is formed on the hole wall for removing the N2 the second pores includes the first thickness
Metal level including all metal levels；
The metalized device is additionally operable to, and the second metalized is carried out to the circuit board, to cause described
The metal level of second thickness is formed on the hole wall of N1 the first pores and the N2 the second pores, wherein, the N1 and described
N2 is positive integer.
Optionally, the first thickness sets for the hole wall metal level of the N1 the first pores and the N2 the second pores
Count the difference of thickness；Or first pores and second pores are hole wall metal level design thickness on the circuit board
Adjacent or non-conterminous two pores.
Optionally, the metal for including the first thickness formed on the hole wall for removing N2 second pores
The aspect of all metal levels including layer, metal level remove device are specifically used for：Based on described in power auger and/or laser drilling removing
All metal levels including the metal level of the first thickness formed on the hole wall of N2 the second pores.
Optionally, the compensation pore diameter range for the N1 the first pores that the drilling equipment drills out is 0.1 millimeter to 0.2
Millimeter.
Optionally, the compensation pore diameter range of the drilling equipment drills out the N2 the second pores for -0.1 millimeter to -
0.2 millimeter.
Optionally, the drilling equipment is additionally operable to, and the first gold medal is carried out to the circuit board in the metalized device
Before categoryization processing, N3 the 3rd pores are drilled out on circuit boards, wherein, the N3 is positive integer；Wherein, at the metallization
Reason device carries out the first metalized to the circuit board and also to form first on the hole wall of the N3 the 3rd pores
The metal level of thickness, the hole wall also caused to the second metalized of circuit board progress in the N3 the 3rd pores
The upper metal level for forming second thickness；
The metal level remove device is additionally operable to, and the second metal is carried out to the circuit board in the metalized device
After change processing, the metal level including the first thickness that is formed on the hole wall of the N3 the 3rd pores and described the are removed
All metal levels including the metal level of two thickness；The metalized device is additionally operable to, and the 3rd is carried out to the circuit board
Metalized, to cause in the N1 the first pores and the hole wall of the N2 the second pores and the N3 the 3rd pores
The upper metal level for forming the 3rd thickness.
Optionally, the second thickness sets for the hole wall metal level of the N2 the second pores and the N3 the 3rd pores
Count the difference of thickness.
Optionally, second pores and the 3rd pores are that hole wall metal level design thickness is adjacent on the circuit board
Or non-conterminous two pores.
Optionally, the metal level remove device removes including of being formed on the hole wall of N3 the 3rd pores described the
All metal levels including the metal level of one thickness and the metal level of the second thickness include：Based on power auger and/or laser
Bore the metal level including the first thickness formed on the hole wall for removing the N3 the 3rd pores and the second thickness
All metal levels including metal level.
Optionally, the compensation pore diameter range of the drilling equipment drills out the N3 the 3rd pores for -0.1 millimeter to -
0.2 millimeter.
Optionally, the drilling equipment is additionally operable to, and the first gold medal is carried out to the circuit board in the metalized device
Before categoryization processing, N4 the 4th pores are drilled out on circuit boards, wherein, the N4 is positive integer.
Wherein, the metalized device also causes at the N4 to the first metalized of circuit board progress
The metal level of first thickness is formed on the hole wall of 4th pores, the metalized device carries out the second gold medal to the circuit board
Categoryization processing also causes the metal level that second thickness is formed on the hole wall of the N4 the 4th pores；The metalized dress
Put and the 3rd metalized of circuit board progress also to form the 3rd thickness on the hole wall of the N4 the 4th pores
Metal level；
The metal level remove device is additionally operable to, and the 3rd metal is carried out to the circuit board in the metalized device
After change processing, the metal level including the first thickness formed on the hole wall of the N4 the 4th pores, described the are removed
All metal levels including the metal level of the metal level of two thickness and the 3rd thickness；
The metalized device is additionally operable to, and the 4th metalized is carried out to the circuit board, to cause described
Formed on the hole wall of individual second pores of N1 the first pores, the N2, the N3 the 3rd pores and the N4 the 4th pores
The metal level of 4th thickness.
Optionally, the 3rd thickness sets for the hole wall metal level of the N3 the 3rd pores and the N4 the 4th pores
Count the difference of thickness；3rd pores and the 4th pores be on the circuit board hole wall metal level design thickness it is adjacent or
Non-conterminous two pores.
Optionally, the metal level remove device removes including of being formed on the hole wall of N4 the 4th pores described the
All metal levels including the metal level of the metal level of one thickness, the metal level of the second thickness and the 3rd thickness, tool
Body includes：What is formed on hole wall based on power auger and/or laser drilling removing N4 the 4th pores includes the described first thickness
All metal levels including the metal level of the metal level of degree, the metal level of the second thickness and the 3rd thickness.
Optionally, the compensation pore diameter range of the drilling equipment drills out the N4 the 4th pores for -0.1 millimeter to -
0.2 millimeter.
Optionally, the metal level includes layers of copper, silver layer, layer gold, nickel-gold layer and/or tin lead layer.
As can be seen that in the scheme of the present embodiment, N1 the first pores and N2 the second pores are first drilled out on circuit boards；
First metalized is carried out to foregoing circuit plate, to cause the hole in above-mentioned N1 the first pores and above-mentioned N2 the second pores
The metal level of first thickness is formed on wall；Remove the first thickness that includes formed on the hole wall of above-mentioned N2 the second pores
All metal levels including metal level；The second metalized then is carried out to foregoing circuit plate, to cause in above-mentioned N1 the
The metal level of second thickness is formed on the hole wall of one pores and above-mentioned N2 the second pores.Due to can be in metalized hole wall
All each rank holes are first drilled out before, are then formed by being alternately performed on the hole wall of certain pores of metalized circuit board and removal
Metal level the step of, form the multistage plated through-holes of different hole wall metal layer thickness.Because the drilling of multistage plated through-hole can
A collection of completion, this is advantageous for reducing the difficulty for removing and boring dirty residual caused by boring procedure.And in multiple metallization processes
Can without using dry film perforate or small opening, this be advantageous for avoiding because using dry film perforate or small opening and caused by around hole and table
Face forms the possibility of step because the reason such as etching and electroplating, it is seen that safety can in the process of the multistage plated through-hole of the present invention
It is higher by property, and then be advantageous to lift product fine rate.
Brief description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing
There is the required accompanying drawing used in technology description to be briefly described, it should be apparent that, drawings in the following description are only this
Some embodiments of invention, for those of ordinary skill in the art, without having to pay creative labor, may be used also
To obtain other accompanying drawings according to these accompanying drawings.
Fig. 1 is a kind of schematic flow sheet of circuit board processing method provided in an embodiment of the present invention；
Fig. 2-a~Fig. 2-e are that a kind of flow for processing 2 rank plated through-holes on circuit boards provided in an embodiment of the present invention is shown
It is intended to；
Fig. 3-a~Fig. 3-f are that a kind of flow for processing 3 rank plated through-holes on circuit boards provided in an embodiment of the present invention is shown
It is intended to；
Fig. 4 is a kind of schematic diagram of circuit board processing device provided in an embodiment of the present invention.
Embodiment
The embodiment of the present invention provides a kind of circuit board processing method and relevant apparatus, to further improve on circuit boards
The reliability of multistage plated through-hole is processed, and then lifts product fine rate.
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete
Site preparation describes, it is clear that described embodiment is only part of the embodiment of the present invention, rather than whole embodiments.It is based on
Embodiment in the present invention, those of ordinary skill in the art are obtained every other under the premise of creative work is not made
Embodiment, belong to the scope of protection of the invention.
Term " first ", " second ", " the 3rd " " in description and claims of this specification and above-mentioned accompanying drawing
Four " etc.（If there is）It is for distinguishing similar object, without for describing specific order or precedence.It should manage
The data that solution so uses can exchange in the appropriate case, so as to embodiments of the invention described herein for example can with except
Order beyond those for illustrating or describing herein is implemented.In addition, term " comprising " and " having " and theirs is any
Deformation, it is intended that cover it is non-exclusive include, for example, containing the process of series of steps or unit, method, system, production
Product or equipment are not necessarily limited to those steps clearly listed or unit, but may include not list clearly or for this
The intrinsic other steps of a little process, method, product or equipment or unit.
One embodiment of circuit board processing method of the present invention, wherein, a kind of circuit board processing method, it can include：
N1 the first pores and N2 the second pores are drilled out on circuit board；First metalized is carried out to foregoing circuit plate, to cause
The metal level of first thickness is formed on the hole wall of above-mentioned N1 the first pores and above-mentioned N2 the second pores；Remove above-mentioned N2
All metal levels including the metal level of above-mentioned first thickness formed on the hole wall of second pores；Foregoing circuit plate is entered
The metalized of row second, to form the second thickness on the hole wall of above-mentioned N1 the first pores and above-mentioned N2 the second pores
The metal level of degree, wherein, above-mentioned N1 and above-mentioned N2 are positive integer.
Referring firstly to Fig. 1, Fig. 1 is a kind of flow signal for circuit board processing method that one embodiment of the invention provides
Figure.As shown in figure 1, a kind of circuit board processing method that one embodiment of the invention provides can include herein below：
101st, N1 the first pores and N2 the second pores are drilled out on circuit boards.
Wherein, above-mentioned first thickness is the hole wall metal level design of above-mentioned N1 the first pores and above-mentioned N2 the second pores
The difference of thickness；Or above-mentioned first thickness is less than the hole wall metal of above-mentioned N1 the first pores and above-mentioned N2 the second pores
The difference of layer design thickness.
In some embodiments of the invention, above-mentioned first pores and above-mentioned second pores are hole wall gold on foregoing circuit plate
It is adjacent or non-conterminous to belong to layer design thickness（I.e., it is also possible to hole wall metal level design thickness be present between the first pores and above-mentioned
A kind of or more pores between two pores）Two pores.
Wherein, the first pores is different with the design thickness of the hole wall metal level of the second pores.Circuit board may be designed with more
Pores, the design thickness of the hole wall metal level per pores is different, and the first pores and the second pores are believed that the hole on circuit board
Wall metal level design thickness is adjacent or non-conterminous any two pores.Such as two pores are devised on circuit board, the hole of two pores
The design thickness of wall metal level is different, and the first pores can be the thicker pores of design thickness of hole wall metal level, and the
Two pores can be then the relatively thin pores of the design thickness of hole wall metal level.For example, on circuit board devise three classes again
Hole, the design thickness of the hole wall metal level of three pores is variant, and the first pores can be most thick for the design thickness of hole wall metal level
A pores, and the second pores can be then time thick or most thin pores of design thickness of hole wall metal level；Or the first kind
Hole can be the thick pores of the design thickness time of hole wall metal level, and the second pores can be then the design thickness of hole wall metal level
The most thin pores of degree.Four pores for example, on circuit board are devised again, the design thickness of the hole wall metal level of four pores is each
Difference, and the first pores can be the most thick pores of design thickness of hole wall metal level, and the second pores can be then hole wall
The secondary thick or secondary thick or most thin pores of the design thickness of metal level；Or first pores can be hole wall metal level design
The thick pores of thickness time, and the second pores can be then the secondary thick or most thin pores of design thickness time of hole wall metal level；
Or first pores can be hole wall metal level the thick pores of design thickness time time；And the second pores can be then hole wall
The most thin pores of the design thickness of metal level.Situation existing for more pores can be by that analogy.
In some embodiments of the invention, it is assumed that the first pores is that the design thickness of hole wall metal level on circuit board is most thick
A pores, then the compensation pore diameter range of the above-mentioned N1 drilled out in circuit board the first pores for 0.1 millimeter to 0.2 millimeter or its
Its scope, if the first pores is not the most thick pores of design thickness of hole wall metal level on circuit board, drilled out in circuit board
The compensation pore diameter range of above-mentioned N1 the first pores can be -0.1 millimeter to -0.2 or other scope.Wherein, in circuit twist drill
The compensation pore diameter range of above-mentioned N2 the second pores gone out can be -0.1 millimeter to -0.2 millimeter or other scopes.
102nd, the first metalized is carried out to foregoing circuit plate, to cause in above-mentioned N1 the first pores and above-mentioned N2
The metal level of first thickness is formed on the hole wall of second pores.Wherein, above-mentioned first thickness is above-mentioned N1 the first pores and upper
State the difference of the hole wall metal level design thickness of N2 the second pores.
Wherein, the mode of plating can be combined by chemical plating mode or chemical plating, the first metal is carried out to foregoing circuit plate
Change is handled.
103rd, it is all including removing the metal level including first thickness formed on the hole wall of above-mentioned N2 the second pores
Metal level.
In some embodiments of the invention, what is formed on the hole wall of the above-mentioned N2 of above-mentioned removing the second pores includes first
All metal levels including the metal level of thickness may include：Based on power auger and/or laser drilling（Or other means）Remove above-mentioned
All metal levels including the metal level including first thickness formed on the hole wall of N2 the second pores.
104th, the second metalized is carried out to foregoing circuit plate, to cause in above-mentioned N1 the first pores and above-mentioned N2
The metal level of second thickness is formed on the hole wall of second pores, wherein, above-mentioned N1 and above-mentioned N2 are positive integer.
It is appreciated that due to before carrying out the second metalized to foregoing circuit plate, not removing the above-mentioned N1 first kind
All metal levels including the metal level including first thickness formed on the hole wall in hole, but remove above-mentioned N2 the second pores
All metal levels including the metal level including first thickness formed on hole wall.Therefore first is being carried out to foregoing circuit plate
After metalized and the second metalized, formd altogether on the hole wall of N1 the first pores first thickness metal level and
The thickness of the metal level formed on the hole wall of the metal level of second thickness, i.e. N1 the first pores is thick plus second for first thickness
Degree.And formed on the hole wall of N2 the second pores be second thickness metal level, therefore, which achieves above-mentioned N1 first
The metal level of different-thickness is formed on the hole wall of pores and above-mentioned N2 the second pores.That is, two ranks are formd in foregoing circuit plate
Plated through-hole.
In some embodiments of the invention, it is above-mentioned to foregoing circuit for the scenes of at least 3 rank plated through-holes need to be processed
Plate can also further comprise before the first metalized：N3 the 3rd pores are drilled out on circuit boards, wherein, above-mentioned N3
For positive integer；The wherein above-mentioned hole wall also caused to the first metalized of foregoing circuit plate progress in above-mentioned N3 the 3rd pores
The upper metal level for forming first thickness, above-mentioned second metalized that carried out to foregoing circuit plate also cause in above-mentioned N3 the individual 3rd
The metal level of second thickness is formed on the hole wall of pores.
It is understood that due to before carrying out the 3rd metalized to foregoing circuit plate, not removing above-mentioned N1 the
All metal levels including the metal level of first thickness and the metal level of second thickness formed on the hole wall of one pores,
All metal levels including not removing the metal level including second thickness formed on the hole wall of above-mentioned N2 the second pores, still
Remove formed on the hole wall of above-mentioned N3 the 3rd pores including the metal level of first thickness and the metal of second thickness
All metal layers.Therefore the first metalized, the second metalized and the 3rd metal are being carried out to foregoing circuit plate
After change processing, the metal level of first thickness, the metal level of second thickness and the are formd on the hole wall of N1 the first pores altogether
The metal level of three thickness, i.e. the thickness of the metal level formed on the hole wall of N1 the first pores is thick plus second for first thickness
Degree adds the 3rd thickness.And what is formed on the hole wall of N2 the second pores is the metal level of second thickness and the metal of the 3rd thickness
Layer, i.e. the thickness of the metal level formed on the hole wall of N2 the second pores adds the 3rd thickness for second thickness.And N3 the 3rd
What is formed on the hole wall of pores is the metal level of the 3rd thickness.Therefore, which achieves above-mentioned N1 the first pores, above-mentioned N2 are individual
The metal level of different-thickness is formed on the hole wall of second pores and above-mentioned N3 the 3rd pores.That is, formd in foregoing circuit plate
Three rank plated through-holes.
Wherein, it is above-mentioned that foregoing circuit plate is carried out to may also include after the second metalized：Remove above-mentioned N3 the 3rd
All metal levels including the metal level of first thickness and the metal level of second thickness formed on the hole wall of pores；To upper
State circuit board and carry out the 3rd metalized, to cause in above-mentioned N1 the first pores and above-mentioned N2 the second pores and above-mentioned N3
The metal level of the 3rd thickness is formed on the hole wall of individual 3rd pores.
Wherein, second thickness can be equal to or less than N2 the second pores and the hole wall metal level design of N3 the 3rd pores is thick
The difference of degree.In some embodiments of the invention, the second pores and the 3rd pores can be hole wall metal level design on circuit board
Thickness is adjacent or non-conterminous two pores.
In some embodiments of the invention, what is formed on the hole wall of the above-mentioned N3 of above-mentioned removing the 3rd pores includes first
All metal levels including the metal level of thickness and the metal level of second thickness, it may include：Based on power auger and/or laser drilling
（Or other means）It is all including removing the metal level including first thickness formed on the hole wall of above-mentioned N3 the 3rd pores
The metal level of metal level and second thickness.
In some embodiments of the invention, the compensation aperture of above-mentioned N3 the 3rd pores drilled out on foregoing circuit plate
Scope can be -0.1 millimeter to -0.2 millimeter or other scopes.
In some embodiments of the invention, it is above-mentioned to foregoing circuit for the scenes of at least 4 rank plated through-holes need to be processed
Plate may also include before the first metalized：N4 the 4th pores are drilled out on circuit boards, and above-mentioned N4 is positive integer；Its
In, above-mentioned first metalized that carried out to foregoing circuit plate also to form first on the hole wall of above-mentioned N4 the 4th pores
The metal level of thickness, the above-mentioned hole wall also caused to the second metalized of foregoing circuit plate progress in above-mentioned N4 the 4th pores
The upper metal level for forming second thickness；Above-mentioned the 3rd metalized that carried out to foregoing circuit plate also causes in above-mentioned N4 the individual 4th
The metal level of the 3rd thickness is formed on the hole wall of pores.
It is understood that due to before carrying out the 4th metalized to foregoing circuit plate, not removing above-mentioned N1 the
The metal level of the metal level including first thickness, the metal level of second thickness and the 3rd thickness that are formed on the hole wall of one pores exists
Interior all metal levels, the metal level including second thickness that is formed on the hole wall of above-mentioned N2 the second pores and the are not removed yet
All metal levels including the metal level of three thickness, the 3rd formed on the hole wall of above-mentioned N3 the 3rd pores is not removed equally yet
The metal level of thickness, but remove the metal level including first thickness formed on the hole wall of above-mentioned N4 the 4th pores, second
All metal levels including the metal level of the metal level of thickness and the 3rd thickness.Therefore, the first gold medal is being carried out to foregoing circuit plate
After categoryization processing, the second metalized, the 3rd metalized and the 4th metalized, the hole wall of N1 the first pores
On form the metal level of first thickness, the metal level of second thickness, the metal level of the 3rd thickness and the metal of the 4th thickness altogether
Layer, i.e. the thickness of the metal level formed on the hole wall of N1 the first pores is thick plus the 3rd plus second thickness for first thickness
Degree adds the 4th thickness.Formd on the hole wall of N2 the second pores the metal level of second thickness, the metal level of the 3rd thickness and
The thickness of the metal level formed on the hole wall of the metal level of 4th thickness, i.e. N2 the second pores is thick plus the 3rd for second thickness
Degree adds the 4th thickness.And what is formed on the hole wall of N3 the 3rd pores is the metal level of the 3rd thickness and the metal of the 4th thickness
Layer, i.e. the thickness of the metal level formed on the hole wall of N3 the 3rd pores adds the 4th thickness for the 3rd thickness.And N4 the 4th
What is formed on the hole wall of pores is the metal level of the 4th thickness.Therefore, which achieves above-mentioned N1 the first pores, above-mentioned N2 are individual
The metal level of different-thickness is formed on the hole wall of second pores, above-mentioned N3 the 3rd pores and above-mentioned N4 the 4th pores.That is, exist
Foregoing circuit plate forms quadravalence plated through-hole.
Wherein, it is above-mentioned that foregoing circuit plate is carried out to may also include after the 3rd metalized：Remove above-mentioned N4 the 4th
Formed on the hole wall of pores including the metal level of the metal level of first thickness, the metal level of second thickness and the 3rd thickness
All metal levels；4th metalized is carried out to foregoing circuit plate, it is individual in above-mentioned N1 the first pores, above-mentioned N2 to cause
The metal level of the 4th thickness is formed on the hole wall of second pores, above-mentioned N3 the 3rd pores and above-mentioned N4 the 4th pores.
Wherein, the 3rd thickness can be equal to or less than N3 the 3rd pores and the hole wall metal level design of N4 the 4th pores is thick
The difference of degree.In some embodiments of the invention, the 3rd pores and the 4th pores can be hole wall metal level design on circuit board
Thickness is adjacent or non-conterminous two pores.
In some embodiments of the invention, what is formed on the hole wall of the above-mentioned N4 of above-mentioned removing the 4th pores includes first
All metal levels including the metal level of the metal level of thickness, the metal level of second thickness and the 3rd thickness, including：Based on machinery
Bore and/or laser drilling removes the metal level including first thickness formed on the hole wall of above-mentioned N4 the 4th pores, second thickness
Metal level and the 3rd thickness metal level including all metal levels.
In some embodiments of the invention, the compensation pore diameter range of the above-mentioned above-mentioned N4 drilled out the 4th pores is -0.1
Millimeter is to -0.2 millimeter.
Similarly, if more multistage plated through-hole need to be processed, it can still be based on such scheme and implement, not continue to lift herein
Example.
Wherein, first thickness is the difference of hole wall metal layer thickness required by the second pores and the first pores, second thickness
For the difference of hole wall metal layer thickness required by the 3rd pores and the second pores, the 3rd thickness is the 4th pores and the 3rd pores institute
It is required that the difference of hole wall metal layer thickness.
For example, quadravalence plated through-hole need to be processed on circuit boards（Wherein, quadravalence plated through-hole represents 4 kinds of hole wall gold
Belong to the different hole of thickness degree）.Where it is assumed that the hole wall metal level design thickness of the first pores is 70 ounces, the hole of the second pores
Wall metal level design thickness is 50 ounces, the hole wall metal level design thickness of the 3rd pores is 40 ounces, the hole wall of the 4th pores
Metal level design thickness is 10 ounces.
Wherein, the first metalized is carried out to circuit board, in the first pores, the second pores, the 3rd pores and the 4th class
The specific thickness of metal level for the first thickness that the hole wall in hole is formed is 70-50=20 ounce.Circuit board is carried out at the second metallization
Reason, in the specific thickness of metal level for the second thickness that the hole wall of the first pores, the second pores, the 3rd pores and the 4th pores is formed
For 50-40=10 ounce.3rd metalized is carried out to circuit board, in the first pores, the second pores, the 3rd pores and the 4th
The specific thickness of metal level for the 3rd thickness that the hole wall of pores is formed is 40-10=30 ounce.The 4th metallization is carried out to circuit board
Processing, it is specifically thick in the metal level for the 3rd thickness that the hole wall of the first pores, the second pores, the 3rd pores and the 4th pores is formed
Spend for 10 ounces.By that analogy.It can be seen that there is rank plated through-hole, metalized several times just is carried out to circuit board.
In some embodiments of the invention, above-mentioned metal level includes layers of copper, silver layer, layer gold, nickel-gold layer and/or tin lead layer
Etc..
As can be seen that in the scheme of the present embodiment, N1 the first pores and N2 the second pores are first drilled out on circuit boards；
First metalized is carried out to foregoing circuit plate, to cause the hole in above-mentioned N1 the first pores and above-mentioned N2 the second pores
The metal level of first thickness is formed on wall；Remove the metal for including first thickness formed on the hole wall of above-mentioned N2 the second pores
All metal levels including layer；The second metalized then is carried out to foregoing circuit plate, to cause in the above-mentioned N1 first kind
The metal level of second thickness is formed on the hole wall of hole and above-mentioned N2 the second pores.Due to can before metalized hole wall first
All each rank holes are drilled out, then by being alternately performed the metal formed on the hole wall of certain pores of metalized circuit board and removal
The step of layer, form the multistage plated through-hole of different hole wall metal layer thickness.Because the drilling of multistage plated through-hole can be a collection of complete
Into this is advantageous for reducing the difficulty for removing and boring dirty residual caused by boring procedure.Also, can nothing in multiple metallization processes
Dry film perforate or small opening need to be used, this be advantageous for avoiding because using dry film perforate or small opening and caused by around hole and surface because of erosion
Carve and the reason such as plating and form the possibility of step, it is seen that in the process of the multistage plated through-hole of the present invention security reliability compared with
Height, and then be advantageous to lift product fine rate.
For ease of being better understood from and implementing the such scheme of the embodiment of the present invention, citing is a kind of separately below processes 2 ranks
Plated through-hole and a kind of scene for processing 3 rank plated through-holes.
Referring to Fig. 2-a~Fig. 2-e, wherein, Fig. 2-a~Fig. 2-e show that one kind processes 2 rank plated through-holes on circuit boards
Flow.
Referring to Fig. 2-a, wherein, Fig. 2-a show a kind of multilayer circuit board of plated through-hole to be processed.
Referring to Fig. 2-b, wherein, Fig. 2-b are shown processes N1 the first pores 201 and N2 the on multilayer circuit board
Two pores 202.
Referring to Fig. 2-c, wherein, Fig. 2-c are shown carries out the first metalized to multilayer circuit board, to cause above-mentioned
The metal layer A 1 of first thickness is formed on the hole wall of N1 the first pores 201 and above-mentioned N2 the second pores 202.
Referring to Fig. 2-d, wherein, Fig. 2-d show that what is formed on the hole wall for removing above-mentioned N2 the second pores 202 includes
All metal levels including the metal layer A 1 of first thickness.
Referring to Fig. 2-e, wherein, Fig. 2-e are shown carries out the second metalized to multilayer circuit board, to cause above-mentioned
The metal layer A 2 of second thickness is formed on the hole wall of N1 the first pores 201 and above-mentioned N2 the second pores 202.
Wherein, the thickness of metal layer A 1 is approximately equal to the requirement hole wall metal layer thickness of the first pores 201 and the second pores 201
Difference.
As can be seen that due to before carrying out the second metalized to foregoing circuit plate, not removing the above-mentioned N1 first kind
All metal levels including the metal layer A 1 including first thickness formed on the hole wall in hole 201, but remove above-mentioned N2 the
All metal levels including the metal layer A 1 including first thickness formed on the hole wall of two pores 202.Therefore, to above-mentioned electricity
After road plate has carried out the first metalized and the second metalized, formd altogether on the hole wall of N1 the first pores 201
The metal layer A 1 of first thickness and the metal layer A 2 of second thickness, i.e. the metal level formed on the hole wall of N1 the first pores 201
Thickness add second thickness for first thickness.And formed on the hole wall of N2 the second pores 202 be second thickness metal
Layer A2, which achieves different-thickness is formed on the hole wall of above-mentioned N1 the first pores 201 and above-mentioned N2 the second pores 202
Metal level.The plated through-hole of two ranks is formd in foregoing circuit plate.
Referring to Fig. 3-a~Fig. 3-f, wherein, Fig. 3-a~Fig. 3-f show that one kind processes 3 rank plated through-holes on circuit boards
Flow.
Referring to Fig. 3-a, Fig. 3-a are shown processes N1 the first pores 301 and N2 the second classes on multilayer circuit board
Hole 302 and N3 the 3rd pores 303.
Referring to Fig. 3-b, Fig. 3-b are shown carries out the first metalized to multilayer circuit board, to cause at above-mentioned N1
The gold of first thickness is formed on the hole wall of first pores 301, above-mentioned N2 the second pores 302 and above-mentioned N3 the 3rd pores 303
Belong to layer B1.
Referring to Fig. 3-c, wherein, Fig. 3-c show that what is formed on the hole wall for removing above-mentioned N2 the second pores 302 includes
All metal levels including the metal level B1 of first thickness.
Wherein, metal level B1 thickness is approximately equal to the hole wall metal layer thickness design of the first pores 301 and the second pores 302
Difference.
Referring to Fig. 3-d, wherein, Fig. 3-d show to carry out the second metalized to multilayer circuit board, to cause in above-mentioned N1
Second thickness is formed on the hole wall of individual first pores 301, above-mentioned N2 the second pores 302 and above-mentioned N3 the 3rd pores 303
Metal level B2.
Wherein, metal level B2 thickness is approximately equal to the requirement hole wall metal layer thickness of the second pores 302 and the 3rd pores 303
Difference.
As can be seen that due to before carrying out the second metalized to foregoing circuit plate, not removing the above-mentioned N1 first kind
All metal levels including the metal level B1 including first thickness formed on the hole wall in hole 301, but remove above-mentioned N2 the
All metal levels including the metal level B1 including first thickness formed on the hole wall of two pores 302.Therefore, to above-mentioned electricity
After road plate has carried out the first metalized and the second metalized, formd altogether on the hole wall of N1 the first pores 301
The metal level B1 of the first thickness and metal level B2 of second thickness, i.e. the metal level formed on the hole wall of N1 the first pores 301
Thickness add second thickness for first thickness.And formed on the hole wall of N2 the second pores 302 be second thickness metal
Layer B2, which achieves different-thickness is formed on the hole wall of above-mentioned N1 the first pores 301 and above-mentioned N2 the second pores 302
Metal level.The plated through-hole of two ranks is formd in foregoing circuit plate.
Referring to Fig. 3-e, wherein, Fig. 3-e show that what is formed on the hole wall for removing above-mentioned N3 the 3rd pores 303 includes
All metal levels including the metal level B1 of the first thickness and metal level B2 of second thickness.
Referring to Fig. 3-f, wherein, Fig. 3-d show to carry out the 3rd metalized to multilayer circuit board, to cause in above-mentioned N1
The 3rd thickness is formed on the hole wall of individual first pores 301, above-mentioned N2 the second pores 302 and above-mentioned N3 the 3rd pores 303
Metal level B3.
As can be seen that before carrying out the 3rd metalized to foregoing circuit plate, above-mentioned N1 the first pores 301 are not removed
Hole wall on all metal levels including the metal level B1 of first thickness and the metal level B2 of second thickness for being formed, also not
All metal levels including removing the metal level B2 including second thickness formed on the hole wall of above-mentioned N2 the second pores 302,
But remove formed on the hole wall of above-mentioned N3 the 3rd pores 303 including the metal level B1 of first thickness and the gold of second thickness
Belong to all metal levels including layer B2.Therefore, the first metalized, the second metalized are being carried out to foregoing circuit plate
After the 3rd metalized, metal level B1, the second thickness of first thickness are formd on the hole wall of N1 the first pores 301 altogether
The metal level B2 of the degree and metal level B3 of the 3rd thickness, i.e. the thickness of the metal level formed on the hole wall of N1 the first pores 301
For first thickness the 3rd thickness is added plus second thickness.And what is formed on the hole wall of N2 the second pores 302 is second thick
The metal level B2 of the degree and metal level B3 of the 3rd thickness, i.e. the thickness of the metal level formed on the hole wall of N2 the second pores 302
The 3rd thickness is added for second thickness.That formed on the hole wall of N3 the 3rd pores 303 is the metal level B3 of the 3rd thickness.Therefore
Which achieves the hole wall of above-mentioned N1 the first pores 301, above-mentioned N2 the second pores 302 and above-mentioned N3 the 3rd pores 303
The upper metal level for forming different-thickness.That is, three rank plated through-holes are formd in foregoing circuit plate.
It is appreciated that Fig. 2-a~Fig. 2-e and Fig. 3-a~Fig. 3-f schematically illustrate one kind respectively processes second order on circuit boards
The flow of plated through-hole and three rank plated through-holes, and the flow that more multistage plated through-hole is processed in circuit board can be with such
Push away, here is omitted.
Referring to Fig. 4, Fig. 4 is a kind of schematic flow sheet for circuit board processing device that another embodiment of the present invention provides.
As shown in figure 4, a kind of circuit board processing device that another embodiment of the present invention provides can include drilling equipment 401, metal
Change processing unit 402 and metal level remove device 403.
Wherein, drilling equipment 401, for drilling out N1 the first pores and N2 the second pores on circuit boards.
In some embodiments of the invention, the compensation pore diameter range of above-mentioned N1 the first pores drilled out in circuit board is
0.1 millimeter to 0.2 millimeter or other scopes.Wherein, the compensation pore diameter range of above-mentioned N2 the second pores drilled out in circuit board
Can be -0.1 millimeter to -0.2 millimeter or other scopes.
Metalized device 402, for carrying out the first metalized to foregoing circuit plate, to cause at above-mentioned N1
The metal level of first thickness is formed on the hole wall of first pores and above-mentioned N2 the second pores.
Wherein, metalized 402 can combine the mode of plating by chemical plating mode or chemical plating, to foregoing circuit plate
Carry out the first metalized.
Wherein, above-mentioned first thickness is the hole wall metal level design of above-mentioned N1 the first pores and above-mentioned N2 the second pores
The difference of thickness；Or above-mentioned first thickness is less than the hole wall metal of above-mentioned N1 the first pores and above-mentioned N2 the second pores
The difference of layer design thickness.
In some embodiments of the invention, above-mentioned first pores and above-mentioned second pores are hole wall gold on foregoing circuit plate
It is adjacent or non-conterminous to belong to layer design thickness（I.e., it is also possible to hole wall metal level design thickness be present between the first pores and above-mentioned
A kind of or more pores between two pores）Two pores.
Wherein, the first pores is different with the design thickness of the hole wall metal level of the second pores.Circuit board may be designed with more
Pores, the design thickness of the hole wall metal level per pores is different, and the first pores and the second pores are believed that the hole on circuit board
Wall metal level design thickness is adjacent or non-conterminous any two pores.Such as two pores are devised on circuit board, the hole of two pores
The design thickness of wall metal level is different, and the first pores can be the thicker pores of design thickness of hole wall metal level, and the
Two pores can be then the relatively thin pores of the design thickness of hole wall metal level.For example, on circuit board devise three classes again
Hole, the design thickness of the hole wall metal level of three pores is variant, and the first pores can be most thick for the design thickness of hole wall metal level
A pores, and the second pores can be then time thick or most thin pores of design thickness of hole wall metal level；Or the first kind
Hole can be the thick pores of the design thickness time of hole wall metal level, and the second pores can be then the design thickness of hole wall metal level
The most thin pores of degree.Four pores for example, on circuit board are devised again, the design thickness of the hole wall metal level of four pores is each
Difference, and the first pores can be the most thick pores of design thickness of hole wall metal level, and the second pores can be then hole wall
The secondary thick or secondary thick or most thin pores of the design thickness of metal level；Or first pores can be hole wall metal level design
The thick pores of thickness time, and the second pores can be then the secondary thick or most thin pores of design thickness time of hole wall metal level；
Or first pores can be hole wall metal level the thick pores of design thickness time time；And the second pores can be then hole wall
The most thin pores of the design thickness of metal level.Situation existing for more pores can be by that analogy.
Metal level remove device 403, what is formed on the hole wall for removing above-mentioned N2 the second pores includes first thickness
Metal level including all metal levels.
In some embodiments of the invention, metal level remove device 403 can be specifically used for, and based on power auger and/or swash
Drill finish（Or other means）Including removing the metal level including first thickness formed on the hole wall of above-mentioned N2 the second pores
All metal levels.
Wherein, metalized device 402 is additionally operable to carry out the second metalized to foregoing circuit plate, to cause upper
The metal level that second thickness is formed on the hole wall of N1 the first pores and above-mentioned N2 the second pores is stated, wherein, above-mentioned N1 and upper
It is positive integer to state N2.
It is understood that due to foregoing circuit plate carry out the second metalized before, metal level remove device 403
All metal levels including not removing the metal level including first thickness formed on the hole wall of above-mentioned N1 the first pores, still
Including metal level remove device 403 removes the metal level including first thickness formed on the hole wall of above-mentioned N2 the second pores
All metal levels.Therefore, first metalized and the second metal have been carried out to foregoing circuit plate in metalized device 402
After change processing, the metal level of first thickness and the metal level of second thickness are formd altogether on the hole wall of N1 the first pores, i.e.
The thickness of the metal level formed on the hole wall of N1 the first pores adds second thickness for first thickness.And individual second pores of N2
What is formed on hole wall is the metal level of second thickness, therefore which achieves above-mentioned N1 the first pores and above-mentioned N2 the second classes
The metal level of different-thickness is formed on the hole wall in hole.That is, the plated through-hole of two ranks is formd in foregoing circuit plate.
In some embodiments of the invention, for the scenes of at least 3 rank plated through-holes, metalized device need to be processed
Before 402 pairs of foregoing circuit plates carry out the first metalized, drilling equipment 401 can also be drilled out further on foregoing circuit plate
N3 the 3rd pores, wherein, above-mentioned N3 is positive integer；Wherein, metalized device 402 carries out the first gold medal to foregoing circuit plate
Categoryization processing also causes the metal level that first thickness is formed on the hole wall of above-mentioned N3 the 3rd pores, above-mentioned to foregoing circuit plate
Carry out the metal level that the second metalized also to form second thickness on the hole wall of above-mentioned N3 the 3rd pores.
It is understood that due to before carrying out the 3rd metalized to foregoing circuit plate, not removing above-mentioned N1 the
All metal levels including the metal level of first thickness and the metal level of second thickness formed on the hole wall of one pores,
All metal levels including not removing the metal level including second thickness formed on the hole wall of above-mentioned N2 the second pores, still
Remove formed on the hole wall of above-mentioned N3 the 3rd pores including the metal level of first thickness and the metal level of second thickness
All metal levels.Therefore the first metalized, the second metalized and the 3rd metal are being carried out to foregoing circuit plate
After change processing, the metal level of first thickness, the metal level of second thickness and the are formd on the hole wall of N1 the first pores altogether
The metal level of three thickness, i.e. the thickness of the metal level formed on the hole wall of N1 the first pores is thick plus second for first thickness
Degree adds the 3rd thickness.And what is formed on the hole wall of N2 the second pores is the metal level of second thickness and the metal of the 3rd thickness
Layer, i.e. the thickness of the metal level formed on the hole wall of N2 the second pores adds the 3rd thickness for second thickness.And N3 the 3rd
What is formed on the hole wall of pores is the metal level of the 3rd thickness.Therefore, which achieves above-mentioned N1 the first pores, above-mentioned N2 are individual
The metal level of different-thickness is formed on the hole wall of second pores and above-mentioned N3 the 3rd pores.That is, formd in foregoing circuit plate
Three rank plated through-holes.
After metalized device 402 carries out the second metalized to foregoing circuit plate, metal level remove device 403
Remove formed on the hole wall of above-mentioned N3 the 3rd pores including the metal level of first thickness and the metal level of second thickness
All metal levels；Metalized device 402 carries out the 3rd metalized to foregoing circuit plate, to cause at above-mentioned N1
The metal level of the 3rd thickness is formed in first pores and the hole wall of above-mentioned N2 the second pores and above-mentioned N3 the 3rd pores.
Wherein, second thickness can be equal to or less than N2 the second pores and the hole wall metal level design of N3 the 3rd pores is thick
The difference of degree.In some embodiments of the invention, the second pores and the 3rd pores can be hole wall metal level design on circuit board
Thickness is adjacent or non-conterminous two pores.
In some embodiments of the invention, metal level remove device 403 is removed on the hole wall of above-mentioned N3 the 3rd pores
All metal levels including the metal level of first thickness and the metal level of second thickness formed may include：Based on power auger
And/or laser drilling（Or other means）Remove the metal level for including first thickness formed on the hole wall of above-mentioned N3 the 3rd pores
With all metal levels including the metal level of second thickness.
In some embodiments of the invention, the compensation aperture of above-mentioned N3 the 3rd pores drilled out on foregoing circuit plate
Scope can be -0.1 millimeter to -0.2 millimeter or other scopes.
In some embodiments of the invention, for the scenes of at least 4 rank plated through-holes, metalized device need to be processed
Before 402 pairs of foregoing circuit plates carry out the first metalized, drilling equipment 401 drills out N4 the 4th pores on circuit boards,
Above-mentioned N4 is positive integer；Above-mentioned first metalized that carried out to foregoing circuit plate also causes in the hole of individual 4th pores of above-mentioned N4
The metal level of first thickness is formed on wall, metalized device 402 carries out the second metalized to foregoing circuit plate also to be made
Obtain the metal level that second thickness is formed on the hole wall of above-mentioned N4 the 4th pores；It is above-mentioned that 3rd metal is carried out to foregoing circuit plate
Change processing also causes the metal level that the 3rd thickness is formed on the hole wall of above-mentioned N4 the 4th pores.
It is understood that due to before carrying out the 4th metalized to foregoing circuit plate, not removing above-mentioned N1 the
The metal level of the metal level including first thickness, the metal level of second thickness and the 3rd thickness that are formed on the hole wall of one pores exists
Interior all metal levels, the metal level including second thickness that is formed on the hole wall of above-mentioned N2 the second pores and the are not removed yet
All metal levels including the metal level of three thickness, the 3rd formed on the hole wall of above-mentioned N3 the 3rd pores is not removed equally yet
The metal level of thickness, but remove the metal level including first thickness formed on the hole wall of above-mentioned N4 the 4th pores, second
All metal levels including the metal level of the metal level of thickness and the 3rd thickness.Therefore, the first metal is carried out to foregoing circuit plate
After change processing, the second metalized, the 3rd metalized and the 4th metalized, on the hole wall of N1 the first pores
The metal level of first thickness, the metal level of second thickness, the metal level of the 3rd thickness and the metal level of the 4th thickness are formd altogether,
That is, the thickness of the metal level formed on the hole wall of N1 the first pores adds for first thickness plus second thickness plus the 3rd thickness
Upper 4th thickness.Metal level, the metal level and the 4th of the 3rd thickness of second thickness are formd on the hole wall of N2 the second pores
The metal level of thickness, i.e. the thickness of the metal level formed on the hole wall of N2 the second pores adds the 3rd thickness for second thickness
Plus the 4th thickness.And what is formed on the hole wall of N3 the 3rd pores is the metal level of the 3rd thickness and the metal of the 4th thickness
Layer, i.e. the thickness of the metal level formed on the hole wall of N3 the 3rd pores adds the 4th thickness for the 3rd thickness.And N4 the 4th
What is formed on the hole wall of pores is the metal level of the 4th thickness.Therefore, which achieves above-mentioned N1 the first pores, above-mentioned N2 are individual
The metal level of different-thickness is formed on the hole wall of second pores, above-mentioned N3 the 3rd pores and above-mentioned N4 the 4th pores.That is, exist
Foregoing circuit plate forms quadravalence plated through-hole.
After metalized device 402 carries out the 3rd metalized to foregoing circuit plate, metal level remove device 403
Remove the metal level including first thickness, the metal level and the 3rd thickness of second thickness formed on the hole wall of N4 the 4th pores
Metal level including all metal levels；Metalized device 402 carries out the 4th metalized to foregoing circuit plate, so that
Obtain in the hole of above-mentioned N1 the first pores, above-mentioned N2 the second pores, above-mentioned N3 the 3rd pores and above-mentioned N4 the 4th pores
The metal level of the 4th thickness is formed on wall.
Wherein, the 3rd thickness can be equal to or less than N3 the 3rd pores and the hole wall metal level design of N4 the 4th pores is thick
The difference of degree.In some embodiments of the invention, the 3rd pores and the 4th pores can be hole wall metal level design on circuit board
Thickness is adjacent or non-conterminous two pores.
In some embodiments of the invention, metal level remove device 403 is removed on the hole wall of above-mentioned N4 the 4th pores
All metal levels including the metal level of the metal level of first thickness, the metal level of second thickness and the 3rd thickness formed
It may include：Remove based on power auger and/or laser drilling the first thickness that includes formed on the hole wall of above-mentioned N4 the 4th pores
All metal levels including the metal level of metal level, the metal level of second thickness and the 3rd thickness.
In some embodiments of the invention, the compensation aperture model for above-mentioned N4 the 4th pores that drilling equipment 401 drills out
Enclose for -0.1 millimeter to -0.2 millimeter.
In some embodiments of the invention, above-mentioned metal level includes layers of copper, silver layer, layer gold, nickel-gold layer and/or tin lead layer
Etc..
As can be seen that in the scheme of the present embodiment, circuit board processing device first drills out N1 the first pores on circuit boards
With N2 the second pores；First metalized is carried out to foregoing circuit plate, to cause in above-mentioned N1 the first pores and above-mentioned
The metal level of first thickness is formed on the hole wall of N2 the second pores；Remove the bag formed on the hole wall of above-mentioned N2 the second pores
Include all metal levels including the metal level of first thickness；The second metalized then is carried out to foregoing circuit plate, to cause
The metal level of second thickness is formed on the hole wall of above-mentioned N1 the first pores and above-mentioned N2 the second pores.Due to can be in metal
All each rank holes are first drilled out before changing processing hole wall, then by being alternately performed metalized circuit board and removing certain pores
The step of metal level formed on hole wall, form the multistage plated through-hole of different hole wall metal layer thickness.Due to multistage metallization
The drilling in hole a collection of can be completed, and this is advantageous for reducing the difficulty for removing and boring dirty residual caused by boring procedure.Also, repeatedly gold
During categoryization can without using dry film perforate or small opening, this be advantageous for avoiding because using dry film perforate or small opening and caused by
Around hole and surface forms the possibility of step because the reason such as etching and electroplating, it is seen that the multistage plated through-hole of the present invention it is processed
Security reliability is higher in journey, and then is advantageous to lift product fine rate.
It should be noted that for foregoing each method embodiment, in order to be briefly described, therefore it is all expressed as a series of
Combination of actions, but those skilled in the art should know, the present invention is not limited by described sequence of movement because
According to the present invention, some steps can use other orders or carry out simultaneously.Secondly, those skilled in the art should also know
Know, embodiment described in this description belongs to preferred embodiment, and involved action and module are not necessarily of the invention
It is necessary.In the above-described embodiments, the description to each embodiment all emphasizes particularly on different fields, and does not have the portion being described in detail in some embodiment
Point, it may refer to the associated description of other embodiment.
The Wiring board processing method and relevant apparatus provided above the embodiment of the present invention is described in detail, herein
In apply specific case to the present invention principle and embodiment be set forth, the explanation of above example is only intended to help
Assistant solves the method and its core concept of the present invention；Meanwhile for those of ordinary skill in the art, the think of according to the present invention
Think, in specific embodiments and applications there will be changes, to sum up, this specification content should not be construed as to this hair
Bright limitation.
Claims (9)
- A kind of 1. circuit board processing method, it is characterised in that including：N1 the first pores and N2 the second pores are drilled out on circuit boards, and first pores and second pores are hole wall Two different pores of metal layer thickness；First metalized is carried out to the circuit board, to cause in the N1 the first pores and the N2 the second pores Hole wall on formed first thickness metal level, the first thickness for first pores hole wall metal layer thickness with it is described Thickness corresponding to the difference of the hole wall metal layer thickness of second pores；Remove all metals including the metal level of the first thickness formed on the hole wall of the N2 the second pores Layer；Second metalized is carried out to the circuit board, to cause in the N1 the first pores and the N2 the second pores Hole wall on formed second thickness metal level, wherein, the N1 and the N2 are positive integer.
- 2. according to the method for claim 1, it is characterised in that formed on the hole wall for removing N2 second pores All metal levels including the metal level of the first thickness include：Based on described in power auger and/or laser drilling removing All metal levels including the metal level of the first thickness formed on the hole wall of N2 the second pores.
- 3. according to the method for claim 1, it is characterised in thatThe compensation pore diameter range of the N1 the first pores drilled out is 0.1 millimeter to 0.2 millimeter；The compensation pore diameter range of the N2 the second pores drilled out is -0.1 millimeter to -0.2 millimeter.
- 4. according to the method for claim 1, it is characterised in thatIt is described that the circuit board is carried out before the first metalized also to include：N3 the 3rd pores are drilled out on circuit boards, wherein, the N3 is positive integer；Wherein, first metalized that carried out to the circuit board also causes the shape on the hole wall of individual 3rd pores of the N3 Into the metal level of first thickness, second metalized that carried out to the circuit board also causes in the N3 the 3rd pores Hole wall on formed second thickness metal level；It is described that the circuit board is carried out after the second metalized also to include：On the hole wall for removing the N3 the 3rd pores All metal levels including the metal level of the first thickness and the metal level of the second thickness formed；To the electricity Road plate carries out the 3rd metalized, to cause in the N1 the first pores and the N2 the second pores and the N3 the The metal level of the 3rd thickness is formed on the hole wall of three pores.
- 5. according to the method for claim 4, it is characterised in thatThe compensation pore diameter range of the N3 the 3rd pores drilled out is -0.1 millimeter to -0.2 millimeter.
- 6. according to the method described in any one of claim 4 to 5, it is characterised in thatIt is described that the circuit board is carried out before the first metalized also to include：N4 the 4th pores are drilled out on circuit boards, wherein, the N4 is positive integer；Wherein, first metalized that carried out to the circuit board also causes the shape on the hole wall of individual 4th pores of the N4 Into the metal level of first thickness, second metalized that carried out to the circuit board also causes in the N4 the 4th pores Hole wall on formed second thickness metal level；It is described that the 3rd metalized of circuit board progress is also caused in the N4 The metal level of the 3rd thickness is formed on the hole wall of individual 4th pores；After the 3rd metalized of progress to the circuit board, in addition to：Remove the hole wall of the N4 the 4th pores The metal level of the metal level including the first thickness of upper formation, the metal level of the second thickness and the 3rd thickness exists Interior all metal levels；4th metalized is carried out to the circuit board, to cause in the N1 the first pores, the N2 The metal level of the 4th thickness is formed on the hole wall of individual second pores, the N3 the 3rd pores and the N4 the 4th pores.
- 7. according to the method for claim 6, it is characterised in that formed on the hole wall for removing N4 the 4th pores The institute including the metal level of the metal level of the first thickness, the metal level of the second thickness and the 3rd thickness There is metal level, including：Including for being formed on hole wall based on power auger and/or laser drilling removing N4 the 4th pores is described All metal levels including the metal level of the metal level of first thickness, the metal level of the second thickness and the 3rd thickness.
- 8. according to the method for claim 7, it is characterised in that the compensation pore diameter range of the N4 the 4th pores drilled out For -0.1 millimeter to -0.2 millimeter.
- A kind of 9. circuit board processing device, it is characterised in that including：Drilling equipment, for drilling out N1 the first pores and N2 the second pores on circuit boards, first pores and described Second pores is two different pores of hole wall metal layer thickness；Metalized device, for carrying out the first metalized to the circuit board, to cause in the N1 first kind The metal level of first thickness is formed on the hole wall of hole and the N2 the second pores, the first thickness is first pores The corresponding thickness of the difference of the hole wall metal layer thickness of hole wall metal layer thickness and second pores；Metal level remove device, the gold for including the first thickness formed on the hole wall for removing the N2 the second pores Belong to all metal levels including layer；The metalized device is additionally operable to, and the second metalized is carried out to the circuit board, to cause at the N1 The metal level of second thickness is formed on the hole wall of first pores and the N2 the second pores, wherein, the N1 and the N2 are Positive integer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310661288.2A CN104703409B (en) | 2013-12-09 | 2013-12-09 | Circuit board processing method and relevant apparatus |
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| CN201310661288.2A CN104703409B (en) | 2013-12-09 | 2013-12-09 | Circuit board processing method and relevant apparatus |
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| CN104703409A CN104703409A (en) | 2015-06-10 |
| CN104703409B true CN104703409B (en) | 2018-03-16 |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US10356906B2 (en) * | 2016-06-21 | 2019-07-16 | Abb Schweiz Ag | Method of manufacturing a PCB including a thick-wall via |
| CN111712065B (en) * | 2020-07-08 | 2022-08-12 | 高德(江苏)电子科技股份有限公司 | Machining process for avoiding fracture of copper in holes of rigid-flex board |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1156948A (en) * | 1995-12-01 | 1997-08-13 | 国际商业机器公司 | Method of making circuitized substrate using two different metallization processes |
| CN102625576A (en) * | 2011-01-31 | 2012-08-01 | 精材科技股份有限公司 | Interposer and method of forming the same |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5515586B2 (en) * | 2009-10-05 | 2014-06-11 | 株式会社デンソー | Wiring board and manufacturing method thereof |
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2013
- 2013-12-09 CN CN201310661288.2A patent/CN104703409B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1156948A (en) * | 1995-12-01 | 1997-08-13 | 国际商业机器公司 | Method of making circuitized substrate using two different metallization processes |
| CN102625576A (en) * | 2011-01-31 | 2012-08-01 | 精材科技股份有限公司 | Interposer and method of forming the same |
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Address after: 518053 No. 99 East Qiaocheng Road, Nanshan District, Shenzhen City, Guangdong Province Patentee after: SHENZHEN SHENNAN CIRCUIT CO., LTD. Address before: 518053 No. 99 East Qiaocheng Road, Nanshan District, Shenzhen City, Guangdong Province Patentee before: Shenzhen Shennan Circuits Co., Ltd. |
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