CN104573189A - Method for designing optical fiber embedded structure of optoelectronic interconnected baseplate - Google Patents

Abstract

The design method of an optical fiber embedded structure of an optoelectronic interconnection substrate proposed by the present invention aims to provide a method for an optical fiber embedded structure with relatively low hardware requirements, strong implementability, and a large amount of experimental cost and time savings. The present invention is realized through the following technical solutions: A numerical simulation model is established for different optical fiber embedding structures; the maximum stress value and the maximum position offset of the optical fiber in different structures under temperature impact cyclic load are simulated and calculated, and the parameters of the filler material and the maximum position offset are obtained. The influence curve of fiber groove depth, spacing and fiber thermal stress, compare and choose an optical fiber with smaller fiber stress and position deviation as the embedded structure; establish the fiber embedded structure analysis model of the fiber groove size, and use the filler to fill the glass The gap between the optical fiber and the fiber groove, and the single or array glass fiber is buried in the fiber groove to fix the fiber. The invention solves the problem of lack of the design method of the optical fiber embedded structure in the current photoelectric interconnection substrate.

Description

Design method of optical fiber embedded structure in optoelectronic interconnection substrate

technical field

The invention relates to a board-level photoelectric interconnection method in the field of optical transmission, in particular to a structural method for embedding optical fibers in a photoelectric interconnection substrate.

Background technique

Traditional printed circuit boards are limited by the physical characteristics of electrical connections, and the increase in transmission speed has almost reached the limit, and with the further improvement of integration and computing speed, the crosstalk of transmitted signals will be aggravated so that the chip cannot work , which creates a bottleneck for the practicality of modern broadband communications that require high-speed transmission. There are several ways to achieve faster signal transmission on the copper backplane, thicken the conductive copper layer, make the dielectric layer thinner, use a dielectric layer with lower dielectric loss to add more signal layers, and reduce the length of the signal. Distance between signals; increase board area to be wider and longer to handle more signals per layer. However, this is unrealistic in view of the development requirements of the electronics industry. Due to the mutual interference and loss from the resistance and capacitance in the interconnection wires, the method of increasing the frequency and increasing the bandwidth to increase the data transmission rate soon reaches the limit. Today's high-performance computers all use parallel technology, using the parallel computing of multiple processors to improve the performance that is impossible for a single processor to break through the calculation speed of 100 billion to 1 trillion times per second. As the number of processors increases, the communication between processors becomes the main bottleneck of parallel computing. The interconnection technology between processors is a key hardware technical problem. The traditional electrical interconnection technology encounters an insurmountable problem. difficulty. In this context, high-speed optical connection technology is used to replace the copper wire connection currently used in computers, and a new generation of photoelectric printed circuit board optical interconnection technology is required. To put it simply, the photoelectric printed circuit board is the packaging substrate required for the new generation of high computing that integrates light and electricity, uses light for signal transmission, and uses electricity for computing. A layer of light guide layer, that is, organic optical waveguide soft film, and then assemble and integrate the photoelectric components and their driving components on the circuit board. Based on the fact that the speed of optical transmission can be several times faster than that of circuit transmission, the effect of short-distance high-speed transmission can be achieved. However, this structure needs to be spin-coated layer by layer in the production process. During the process, the alignment error between the layers and the scattering loss caused by the imperfect fabrication of the upper layer will affect the vertical coupling efficiency, and the coupling efficiency is low. Low. Due to the rapid development of computer and information network technology, the wide application of broadband communication has been promoted. In the future, network applications such as broadband video conferencing, audio and video transmission, animation and games are expected to become the basic needs of individuals and businesses. This also means that future information network systems or end users must have high-speed transmission systems and equipment in order to truly achieve the goal of high-speed two-way transmission. For example, current network operators use the existing broadband transmission technology, and the asymmetric digital subscriber loop has successfully applied telephone lines to provide high-speed transmission rates. However, the computer used by the end user is always limited by the electrical signal transmission speed of the printed circuit board, and the high-speed signal transmitted from the microprocessor of the computer and server cannot be transmitted to the internal or peripheral modules of the system at high speed, so Delayed the real-time nature of network terminal users receiving or sending information. In the future, systems designed and manufactured using high-speed transmission photoelectric printed circuit boards are expected to greatly improve this defect. At the same time, the bit rate transmitted by the copper wire depends on its parasitic parameters resistance, capacitance and inductance. The data transfer rate of copper wiring is affected by its parasitic parameters resistance, inductance and capacitance. In the low frequency band, the series resistance and bypass capacitor of the circuit board have a great influence on the performance, which directly determines the transition time of the rising edge and the falling edge, thereby affecting the data transmission rate; Beyond the resistors, the end result is the same as series resistors and bypass capacitors, limiting the rate at which data can be transferred. All of these parasitic parameters are largely dependent on the geometry of the wire. The resistance is proportional to the length of the wire and inversely proportional to the cross-sectional area. Therefore, the longer and thinner the wire, the lower the data transmission rate. Existing space constraints will not allow for thicker wires. Although a harder connection can be used to reduce the conversion time, it will increase noise and power consumption at the same time, and the increase in heat generation will be difficult to control. As the printed circuit board series inductance used now is more important as the impedance factor than the resistance, but the result is to limit the transmission rate of the pulse signal. The situation in the telecommunications network is similar to that of signals, where the rate drops immediately from the fiber optic trunk line to the copper line. Therefore, the telecommunications company should connect the optical fiber to the place closest to the end user as much as possible. If the optical interconnect designer wants to get the maximum bandwidth, he must place the optical interconnect as close as possible to the processor

In recent years, optical interconnection, as an implementation scheme to solve the bandwidth problem existing in electrical interconnection, has attracted the attention of many research institutions in the world. In the chip-to-chip communication system on the motherboard, optical interconnection has proven to have great potential, with the advantages of fast transmission rate, low energy consumption, and extremely low bit error rate during high-speed data transmission. At present, the optoelectronic interconnection substrate is a new type of printed circuit board that introduces optical interconnection into the traditional printed circuit board, although it can effectively solve the electronic transmission "bottleneck" problem of pure electrical interconnection. However, there are still few applications of optoelectronic interconnection substrates, and the fabrication of optoelectronic interconnection substrates is still in the research stage. Optoelectronic interconnections embedded in optical fibers basically have good optical transmission performance and have become a research hotspot today. However, the research on the embedded structure of optical fibers in optoelectronic substrates is relatively single, and many scholars only research and analyze one embedded structure of optical fibers. The embedded structure of the optical fiber in the optoelectronic substrate is different. In the optoelectronic substrate, the force on the fiber will affect the theoretical life of the fiber. The smaller the force on the fiber, the longer the theoretical life; the positional deviation of the fiber will affect the alignment accuracy of the end face of the fiber and the optical connector, thereby affecting the coupling efficiency of the optical signal . During the lamination process and service process of the optoelectronic substrate, the optical fiber is subjected to different forces, and choosing a reasonable optical fiber embedding structure will help improve the process reliability and service reliability of the optical fiber. When the optoelectronic substrate is in service, like the PCB, it is inevitable to encounter sharply changing temperature shocks. According to the standard GJB_362B-2009, the temperature difference range of the temperature shock is 180 ° C (-55 ° C ~ 125 ° C), the temperature rise and fall between the highest temperature and the lowest temperature The time does not exceed 2 minutes, the highest temperature and the lowest temperature are kept warm for 15 minutes, and the cycle is 100 times.

The first generation of optoelectronic printed circuit boards dispersed fiber optic chip-chip interconnection and board-board interconnection in the early 1990s, mainly using separate optical fibers and optical fiber connectors to carry out between modules or modules. The interchange between groups and components is widely used in current mainframes. Due to the simple construction, it can provide a relatively cheap point-to-point optical connection. This form of optical interconnection is a derivative of the optical fiber communication technology that has been used in the past due to the optical interconnection in the carrier board using single-mode optical fibers. Therefore, it is relatively easy to realize the form of directional transmission that transmits optical communication signals from one point to another. The second-generation optoelectronic printed circuit board flexible substrate optical connection technology was developed in the middle of the 1990s. It uses flexible substrates for optical fiber distribution. Similarly, this technology can use connectors as mentioned above for point-to-point optical connections. The formation of optical signal network by flexible optical waveguide sheet is the most prominent feature of the second development stage of optical waveguide line product form and technology. Metal wires are replaced by optical fibers. In this way, its characteristic is that the flexible material is used as a fixed carrier to realize the optical signal transmission of the flexible optical fiber. Compared with the original electrical wiring form, it has also been significantly improved in the aspect of high-precision control of the characteristic impedance in the wiring. The third-generation photoelectric printed circuit board hybrid photoelectric connection technology can be roughly divided into the following four technologies according to the characteristics of embedded materials and structures, surface polymer waveguide, embedded polymer waveguide, and embedded optical fiber technology , Embedded optical waveguide glass. The third-generation optical waveguide circuit method is an optoelectronic printed circuit board that integrates existing printed circuit boards and optical transmission lines. The advantage of realizing this kind of compounding is that the wiring density of the optical transmission line can be higher than that of the optical fiber wiring form introduced in the early stage on the board. At the same time, the automatic installation of photoelectric conversion elements and the like has been realized. In the development trend of materials used in the optical transmission path in the PCB, high polymers with low transmission loss and high heat resistance are used as optical waveguide line materials. Due to the limitations of electrical interconnection in terms of physical performance, optical interconnection has entered a new generation of historical stage, which mainly involves optical waveguide materials, optical waveguide manufacturing methods, low-cost optical components and transmission components. Assembled with receiving element and light, etc. Moreover, the above technologies must be compatible with traditional design, manufacturing, processing and matching precision. Integrated circuits and optical interconnections With the rapid increase in the integration level and operating frequency of VLSI, the parasitic effects of the interconnection lines on the chip, such as parasitic capacitance, delay time, signal crosstalk, etc., have become very significant, and become a faster integrated circuit. a huge obstacle to development. The potential and theoretical advantages of the above-mentioned optical interconnection have inspired a large number of researchers to devote themselves to the research and development of optical interconnection related components and their integration with integrated circuits, mainly with CMOS integrated circuits. So far, many achievements have been made. However, there is still a considerable distance from the practical application of optical interconnection on integrated circuit chips. Many key issues such as material, efficiency, size, power consumption, compatibility with silicon integrated circuit technology and production cost of optical interconnection components have not yet found the best solution. Free-space optical interconnection and fiber optic interconnection must have optical transmitters and receivers in structure, and there must be photoelectric conversion and electro-optical conversion. The effect of "electronic bottleneck" has weakened, and "photoelectric bottleneck" may appear again. The multi-dimensional and multi-reusability of optical transmission In the process of high-speed information electrical transmission and conversion, in addition to being limited by the number of transmission channels, there is also a serious "electronic bottleneck". Even when using optical transmission, in addition to the In addition to the delay, it is more obvious that the optical-electrical conversion/electrical-optical conversion requires a certain time delay, which is the so-called "optical-electrical conversion/electrical-optical conversion bottleneck".

Contents of the invention

The task of the present invention is to provide a photoelectric interconnection substrate optical fiber embedment system with relatively low hardware requirements, strong implementability and high process reliability, which can save a lot of experimental costs and time, and is suitable for embedding single or array glass optical fibers in photoelectric substrates. way into the structure. In order to solve the lack of design methods for optical fiber embedded structures in the current optoelectronic interconnection substrate.

The above object of the present invention can be achieved by the following measures, a design method of optical fiber interconnection substrate embedded structure, characterized in that it comprises the following steps:

Determine the relevant dimensions and material parameters of the optoelectronic interconnection substrate PCB and filler 7, and establish numerical simulation models for different optical fiber embedded structures; numerical simulation calculates the maximum stress value and maximum position offset of optical fibers in different structures under temperature shock cyclic loads, Obtain the parameters of the filler material and the influence curve of the fiber groove depth, spacing and fiber thermal stress, and compare and select an optical fiber with smaller fiber stress and position deviation as the embedded structure; according to the fiber groove of the selected fiber embedded structure Size and type of optical fiber, combined with PCB lamination process, the optical fiber embedding process model is established according to the size and material parameters of prepreg and copper foil, and the maximum stress value of optical fiber under the process temperature load is further numerically simulated, and then through the control variable method, it is obtained Filler material parameters, optical fiber groove size factor and optical fiber force influence curve; according to the relationship curve between filler material parameters and optical fiber thermal stress, select at least three fillers with similar material parameters 7, and carry out matching design under process temperature load , choose the filler 7 with the smallest force on the fiber, and for the three kinds of filler 7, respectively establish the analysis model of the embedded structure of the optical fiber groove size, and carry out parametric optimization design on the size of the fiber groove, and get the fiber stress. Small fiber groove size to obtain fiber embedded structure with high reliability of fiber use and process reliability; use filler 7 to fill the gap between glass fiber and fiber groove, and embed single or array glass fiber Insert it into the fiber groove to fix the fiber.

The present invention has following beneficial effect:

The invention selects an optical fiber embedded structure with smaller optical fiber stress value and optical fiber position deviation through numerical simulation, thereby improving the process reliability and use reliability of the optical fiber.

The present invention uses the optical fiber stress value and position offset as the reliability evaluation standard, combined with the design method of the optical fiber embedded structure in the optoelectronic interconnection substrate proposed by computer simulation software, solves the lack of the current design method of the optical fiber embedded structure in the optoelectronic interconnection substrate question.

The present invention adopts a numerical simulation model, an optical fiber embedding process model, simulates and calculates the maximum stress value of the optical fiber under the process temperature load, and obtains the simulation analysis of the influence curve of the filler material parameters, the size factor of the optical fiber groove and the force of the optical fiber through the control variable method In this way, the optical fiber embedding structure analysis model is respectively established, and the parameterized optimization design of the fiber groove size is obtained to obtain the fiber groove size with less stress on the fiber, and obtain the fiber embedding with high reliability of fiber use and process reliability. The structure and hardware requirements are relatively low, and the implementability is strong, which can save a lot of experimental cost and time. Moreover, it is suitable for embedding single or array glass optical fibers in optoelectronic interconnection substrate optical fibers.

The invention utilizes finite element simulation software, and can be used in the design of the optical fiber embedded structure in the photoelectric interconnection substrate through control variable method and parameterized optimization design.

The invention adopts a limited simulation method to improve the reliability of the embedded optical fiber, comparatively analyzes and optimizes the design of the optical fiber embedded structure, and has good practicability.

Description of drawings

Fig. 1 is a flow chart of the optical fiber embedded structure of the optoelectronic interconnection substrate of the present invention.

Fig. 2 is a schematic cross-sectional view of the 1/2 optoelectronic interconnection substrate fiber embedded structure of the present invention.

Fig. 3 shows schematic diagrams of embodiments of two optical fiber groove-shaped structures of the present invention.

Fig. 4 is a schematic diagram of the structure of the glass optical fiber of the present invention.

Fig. 5 is a schematic diagram of the temperature shock cycle curve of the glass optical fiber of the present invention.

Fig. 6 is a schematic diagram of the process temperature loading curve of the present invention.

Figure 7 is a schematic diagram of the influence curve of the parameters of the filler material on the force of the optical fiber in the present invention, wherein Figure a is the influence curve of the elastic modulus of the filler on the force of the optical fiber, and Figure b is the influence curve of the coefficient of thermal expansion of the filler on the force of the optical fiber, Figure 7 c is the influence curve of the Poisson's ratio of the filler on the force of the optical fiber.

Fig. 8 is a schematic diagram of the influence curve of the fiber groove depth and spacing on the fiber force of the present invention, wherein Figure a is the influence curve of the fiber groove depth on the fiber force, and Figure b is the influence curve of the fiber groove spacing on the fiber force.

In the figure : 1 copper foil, 2 FR4 dielectric layer packaging substrate, 3 prepreg, 4 optical fiber groove, 5 glass optical fiber, 6 light guide layer, 7 filling glue, 8 inner coating layer, 9 outer coating layer, 10 cladding, 11 core layers.

Detailed ways

The present invention will be described in further detail below in conjunction with the accompanying drawings .

See Figure 1 . According to the method for designing the optical fiber embedded structure of the optoelectronic interconnection substrate proposed by the present invention, the process mainly includes the selection of the fiber groove type and the fiber type, the matching design of the filling material and the optimal design of the fiber groove size, specifically including the following steps:

1) Screen the fiber groove type and fiber type, and carry out the combination design of the fiber embedding structure; according to the currently achievable fiber groove type and the existing glass fiber type, carry out the combined design of the possible fiber embedding structure, and use the filling Glue 7 fills the gap between the glass fiber and the fiber groove, and at the same time fixes the fiber to prevent the fiber warping from affecting the process accuracy; according to the fiber groove type and fiber type of the existing fiber embedded structure, determine the fiber groove size and fiber groove size. Groove spacing and existing glass fiber determine fiber size and material parameters; combined design of fiber embedded structure: several possible fiber embedded structures are obtained through screening and combination. The screening of the optical fiber groove type and fiber type is based on the high temperature and high pressure conditions of the optical fiber embedding process and the service environment of the optoelectronic substrate; Randomly combined to form a variety of fiber embedded structures.

2) Establish an analysis model of the fiber embedded structure, calculate the maximum force and position deviation of the fiber, and select a more reasonable fiber embedded structure. Ignore the copper wiring, simplify the embedded structure of the optical fiber, determine the relevant dimensions of the optoelectronic interconnection substrate PCB and the material parameters of the filling glue 7, and establish an analysis model for the embedded structure of the optical fiber for different embedded structures of optical fibers. Optimal optical fiber embedded structure: apply temperature shock cyclic load and calculate, obtain the maximum force and maximum position deviation of optical fiber in different structures, and select a more reasonable optical fiber embedded structure by comparison; the more reasonable optical fiber embedded structure Refers to the optical fiber embedded structure with relatively small maximum force and maximum position deviation of the optical fiber; the analysis model of the optical fiber embedded structure refers to the establishment of various optical fiber embedded structures in step 1 using finite element analysis software The finite element analysis model calculates the maximum force and maximum position deviation of the optical fiber during the load application process.

3) Establish the optical fiber embedding process model, obtain the influence curve of the influence factors such as the parameters of the filler material and the size of the optical fiber groove on the force of the optical fiber; calculate the maximum force and maximum position offset of the optical fiber in different structures under temperature impact, through A fiber embedding structure with smaller fiber stress and position deviation is selected by comparison; the fiber embedding structure selected according to the fiber groove size and fiber type is combined with the PCB lamination process to establish a fiber embedding process model. The size and material parameters of prepreg and copper foil need to be considered separately when modeling. Analyze the influencing factors of optical fiber reliability, model the optical fiber embedding process model, apply the process temperature load and calculate, and obtain the relational curve of the influence of the filler material parameters and the depth and spacing of the optical fiber groove on the optical fiber force. The factors affecting the force of the optical fiber refer to the elastic modulus, thermal expansion coefficient and Poisson's ratio of the filler 7, and the size of the optical fiber groove; the acquisition of the relationship curve refers to the use of the control variable method, changing the numerical value of different factors, and calculating the process temperature respectively Under the stress of the optical fiber, the influence curve of various factors on the force of the optical fiber is obtained. For multi-factor (multi-variable) problems in physics, the method of controlling factors (variables) is often used to turn multi-factor problems into multiple single-factor problems. Only one of the factors is changed at a time, and the remaining factors are kept unchanged, so as to study the influence of the changed factor on things, study them separately, and finally solve them comprehensively. This method is called the control variable method.

4) The parameter matching design of the filling material and the optimal design of the optical fiber groove size. Calculate the maximum force of the optical fiber under the temperature load of the process, and obtain the influence curve of the filler material parameters, the size of the fiber groove and other factors and the force of the fiber through the control variable method, which is used for the matching design of the filler material parameters and the optimization of the fiber groove size design for reference. Optimal design of filler material parameter matching design and optical fiber groove size: according to the relationship curve between filler material parameters and optical fiber thermal stress, select at least three fillers with similar material parameters 7, and carry out matching design under process temperature load, from which The filler 7 with the smallest force on the optical fiber is selected, and for the three kinds of filler 7, an analysis model of the embedded structure of the optical fiber with the groove size is established respectively. The relationship curve between the parameters of the filler material and the thermal stress of the optical fiber includes the relationship curve of the influence of the parameter of the filler material and the depth and spacing of the optical fiber grooves on the force on the optical fiber. According to the influence curve of fiber groove depth and spacing on the force of the fiber, combined with the actual size of the PCB to determine the design range of the design variables, optimize the size of the fiber groove, so as to obtain the filling glue 7 and fiber groove with less stress on the fiber Size, in order to obtain the optical fiber groove size with less stress on the optical fiber, and finally obtain the optical fiber embedded structure with high reliability of optical fiber use and process reliability. The matching design of the filler material parameters refers to the selection of at least three different elastic moduli, thermal expansion coefficients, and Poisson's ratios in combination with the relationship curves of the filler material parameters and the depth and spacing of the optical fiber grooves on the force on the optical fiber in step 3. The glue 7 is filled, and the force process of the optical fiber at the process temperature is calculated respectively. Optical fiber groove size optimization design refers to the variable size of the fiber groove as the design variable, combined with the influence curve of the filler material parameters in step 3 and the relationship curve of the fiber groove depth and spacing on the force of the fiber and the PCB size The design interval is set, and the size of the fiber groove is optimized with the goal of minimizing the force on the fiber; combining the matching design and the optimization design results, the filling glue 7 and the size of the fiber groove that are less stressed on the fiber are selected.

(1) Firstly, screen the existing fiber groove types and fiber types, select feasible fiber groove types and fiber types for combined design, and obtain several possible fiber embedding structures.

Table 1 shows the four fiber embedded structures described in this example structure type 1 2 3 4 Glass fiber type Uncoated Fiber Uncoated Fiber coated optical fiber coated optical fiber Fiber groove method V groove U-groove V groove U-groove

Table 2 shows the fiber groove and fiber cross-sectional size information (unit: μm) D. h h d d1 d2 d3 Fiber outer diameter 1139 532 62.5 125 200 250

Table 3 Substrate, Filler 7 and Optical Fiber Material Parameter Information Material Elastic modulus/Pa Poisson's ratio Coefficient of thermal expansion/℃ ^-1 Glass Optical Fiber (Core and Cladding) 72.5E+9 0.17 5.6E-7 inner coating 10E+6 0.495 2.5E-4 outer coating 1.2E+9 0.365 2E-4 FR-4 board 22E+9 0.28 18E-6 Filler 7 7.84E+9 0.3 27E-6

(2) Next, the fiber embedded structure is preferred. The width of the photoelectric substrate is tentatively set at 5cm, regardless of its length. In order to improve calculation efficiency, for half of the base surface of the photoelectric substrate shown in Figure 2 , the commonly used analysis software ANSYS14.0 was used, combined with the design parameters in Figure 3 , to establish a finite element analysis model, and the Plane183 unit was selected for mesh division.

When the optoelectronic substrate is in service, like the PCB, it is inevitable to encounter sharply changing temperature shocks. According to the standard GJB_362B-2009, the temperature range of the temperature shock is 180°C (-55°C ~ 125°C), and the temperature rise and fall between the highest temperature and the lowest temperature The time does not exceed 2 minutes, the highest temperature and the lowest temperature are kept warm for 15 minutes, and the cycle is 100 times. Here, only three temperature shock cycles are performed on the photoelectric substrate.

In the temperature cycle curve shown in Figure 4 , the zero stress and strain reference temperature is selected as 25°C. Through numerical analysis, the maximum force of the optical fiber in different optical fiber embedded structures and the maximum positional deviation of the optical fiber in the X and Y directions during the temperature shock process are obtained, as shown in Table 4 .

Table 4 Maximum force of optical fiber in different embedded structures structure 1 2 3 4 Maximum force σ _max [MPa] 39.28 37.23 12.78 13.12

Table 5 The maximum position deviation of the optical fiber in the X direction in different embedded structures structure 1 2 3 4 ΔX _max [μm] 3.05 3.02 7.48 7.27

Table 6 The maximum position deviation of the optical fiber in the Y direction in different embedded structures structure 1 2 3 4 ΔY _max [μm] 4.36 4.71 36.00 26.35

According to the numerical analysis results given in Table 4 , Table 5 and Table 6 , a better fiber embedded structure is compared and selected. The core diameter of the embedded optical fiber is 62.5 μm, and the cladding diameter is 125 μm, and the optical signal is mainly transmitted in the core. In structure 3 and structure 4, the temperature shock causes the optical fiber to deviate in the Y direction by about 30 μm. Assuming that the position accuracy of the optical connector remains unchanged, the position deviation of 30 μm will seriously affect the optical signal coupling efficiency; structure 1 The position deviation of the optical fiber in structure 2 is close to and less, so considering comprehensively, structure 2 is a reasonable choice for the fiber-embedded structure in the optical fiber substrate.

(3) Re-analyze the influencing factors of the optical fiber embedding process (filler material parameters and optical fiber groove size). According to the selected optical fiber embedding structure (structure 2), the analysis software ANSYS14.0 is used to establish the optical fiber embedding process model. Here, the structural size and parameters of copper wiring and prepreg need to be considered separately. As shown in FIG. 2 , it is a schematic diagram of design parameters related to the embedded structure of the optical fiber during the embedding process.

Table 7 Prepreg and copper foil material parameter information Material Elastic modulus/Pa Poisson's ratio Coefficient of thermal expansion/℃ ^-1 Prepreg 5.8E+9 0.3 2.6557e-5 copper foil 136E+9 0.3 1.75E-5

In the process temperature loading curve of the optical fiber embedding process shown in Figure 6 , before the optical fiber embedding process, the temperature is room temperature (25°C), no pressure is applied, and the optical fiber is considered to be in a zero stress state. During the optical fiber embedding process, the temperature change is mainly divided into three stages: heating, heat preservation and curing, and cooling. First, the temperature is gradually increased from room temperature to 190°C, and the temperature rise rate is set at 1.8°C to 2.5°C/min, and then heat preservation and curing for 1h , and finally gradually cooled to room temperature, and then numerical analysis with ANSYS14.0 analysis software can obtain the maximum force of the embedded optical fiber in the process of process temperature loading.

Using the control variable method, respectively changing the elastic modulus, thermal expansion coefficient and Poisson's ratio of the filler 7, through numerical calculation and curve fitting, the influence curves of the filler material parameters on the force on the optical fiber shown in Figure 7 can be obtained respectively.

Using the control variable method, the variable dimensions of the U-groove: depth and spacing are changed respectively. Through numerical calculation and curve fitting, the influence curves of fiber groove depth and spacing on the force on the fiber can be obtained respectively as shown in Figure 8 .

(4) Finally, the matching design of the filler material parameters is carried out, and the optimal design of the optical fiber groove size is carried out. According to the influence curve of the filler material parameters and the force of the optical fiber given in Figure 7 , select at least three fillers 7 with similar material parameters for matching design; according to the influence of the groove depth and spacing on the force of the optical fiber given in Figure 8 The curve, combined with the actual size of the PCB, determines the design range of the design variables, and optimizes the groove depth and spacing of the optical fiber. According to the two design results, the filling glue 7 and the size of the optical fiber groove are selected with less force on the optical fiber.

Table 8 Matching design results for three fillers 7 Material Elastic modulus/Pa Poisson's ratio Coefficient of thermal expansion/℃ ^-1 [MPa] Filler 71 7.84E+9 0.3 27E-7 64.13

Filler 72 5.2E+9 0.3 40E-6 71.37 Filler 73 10E+9 0.3 33E-6 62.02

Table 9 Optimal design results of optical fiber groove depth and spacing

In the embodiment of embedding a 1x12 optical fiber array shown in Figure 2 , the optical fiber embedded structure of the optoelectronic interconnection substrate includes: a dielectric layer packaging substrate 2 with a copper foil 1 fixedly connected to the upper and lower planes and a bottom fixed connection 1 light guide layer 6 with copper foil, and the prepreg 3 located between the FR4 dielectric layer packaging substrate 2 and the light guide layer 6, single or array glass optical fiber embedded in the single or array optical fiber of the light guide layer 6 The groove 4 is fixed by the prepreg 3 and encapsulated by the dielectric layer packaging substrate 2 to form an optoelectronic interconnection substrate. FR4 in the picture is the code name of the flame-resistant material grade, and most of them are composite materials made of so-called four-function (Tera-Function) epoxy resin plus filler (Filler) and glass fiber.

In the two types of optical fiber groove shapes shown in Figure 3 , the optical fiber groove can be embedded in the optical fiber using the V-shaped groove shown in Figure 3a , or embedded in the optical fiber in the rectangular groove or U-shaped groove shown in Figure 3b .

In the glass optical fiber structure shown in Figure 4 , the glass optical fiber structure includes a concentric circular glass optical fiber 5, an inner coating layer 8 and an outer coating layer 9 from the inside to the outside, and the glass optical fiber 5 is composed of a core layer 11 and a cladding layer 10. .

Claims (10)

1. a method for designing for structure imbedded by photoelectricity interconnect substrate optical fiber, it is characterized in that comprising the steps:

Determine photoelectricity interconnect substrate PCB and fill glue 7 relative dimensions and material parameter, imbedding structure for different fiber, set up numerical simulation model; The maximum stress value of optical fiber and maximum position offset amount in different structure under numerical simulation accounting temperature impact cycle load, obtain and fill glue material parameter and optical fiber groove depth, spacing and optical fiber thermal stress influence curve, a kind of fiber stress of alternative and position offset less optical fiber as imbedding structure; Optical fiber groove dimensions and the fiber type of structure is imbedded according to selected optical fiber, in conjunction with PCB laminating technology, the size of foundation semi-solid preparation and Copper Foil and material parameter are set up optical fiber and are imbedded process modeling, further numerical simulation calculates the optical fiber maximum stress value under technological temperature load, again by control variate method, obtain filling glue material parameter, optical fiber groove dimensions factor and optic fibre force influence curve; According to filling glue material parameter and optical fiber thermal stress relation curve, select the filling glue that at least three kinds of material parameters are close, compatibility design is carried out under technological temperature load, therefrom choose the filling glue that optic fibre force is minimum, and fill glue for three kinds, Structural Analysis Model imbedded by the optical fiber setting up optical fiber groove dimensions respectively, parameter optimization design is carried out to optical fiber groove dimensions, obtain the optical fiber groove dimensions that optic fibre force is less, to obtain optical fiber dependability and structure imbedded by the higher optical fiber of reliability of technology; Adopt the gap of filling between glue filling glass optical fiber and optical fiber cutting, single or array glass optical fiber are imbedded in optical fiber cutting, fixed fiber simultaneously.

2. construction design method imbedded by the optical fiber of the photoelectricity interconnect substrate according to claim, it is characterized in that: described optical fiber is imbedded construction design method and mainly comprised: the selection of optical fiber cutting type and fiber type, fill glue material compatibility design and optical fiber groove dimensions optimal design.

3. construction design method imbedded by the optical fiber of the photoelectricity interconnect substrate according to claim, it is characterized in that: Structural Analysis Model imbedded by described optical fiber is use finite element analysis software, structure is imbedded to multiple optical fiber and sets up finite element analysis model, to calculate the most stressed and maximum position offset of optical fiber in load applying process.

4. construction design method imbedded by the optical fiber of the photoelectricity interconnect substrate according to claim, it is characterized in that: ignore thin copper film, structure is imbedded to optical fiber and carries out simplify processes, determine photoelectricity interconnect substrate PCB relative dimensions and fill glue material parameter, imbed structure for different fiber, set up optical fiber and imbed Structural Analysis Model.

5. construction design method imbedded by the optical fiber of the photoelectricity interconnect substrate according to claim, it is characterized in that: according to optical fiber groove depth and spacing to the influence curve of optic fibre force, design in conjunction with PCB physical size determination design variable is interval, design is optimized to optical fiber groove dimensions, obtains the less filling glue of optic fibre force and optical fiber groove dimensions.

6. construction design method imbedded by the optical fiber of the photoelectricity interconnect substrate according to claim, it is characterized in that: filling glue material parameter and optical fiber thermal stress relation curve comprise the relation curve of filling glue material parameter and optical fiber groove depth and spacing and affecting optic fibre force.

7. construction design method imbedded by the optical fiber of photoelectricity interconnect substrate according to claim 2, it is characterized in that: filling the design of glue material parameter matching performance is combine the relation curve of filling glue material parameter and optical fiber groove depth and spacing and affecting optic fibre force, select the filling glue that at least three kinds of elastic modulus modulus, thermal expansivity are different with Poisson ratio, calculate the optic fibre force process under technological temperature respectively.

8. construction design method imbedded by the optical fiber of photoelectricity interconnect substrate according to claim 2, it is characterized in that: optical fiber groove dimensions optimal design is variable-sized for design variable with optical fiber cutting, in conjunction with filling the relation curve and PCB size setting design interval that glue material parameter and optical fiber groove depth and spacing affect optic fibre force, minimum with optic fibre force is objective optimization optical fiber groove dimensions; In conjunction with compatibility design and Optimum Design Results, the process of the filling glue that selection optic fibre force is less and optical fiber groove dimensions.

9. construction design method imbedded by the optical fiber of the photoelectricity interconnect substrate according to claim, it is characterized in that: carry out optical fiber when imbedding technique, temperature variation is divided into intensification, heat preservation solidification and cooling three phases, first temperature is elevated to 190 DEG C gradually from room temperature, programming rate is set as 1.8 DEG C ~ 2.5 DEG C/min, then heat preservation solidification 1h, is finally cooled to room temperature gradually, then carries out with ANSYS14.0 analysis software the maximum weighted that optical fiber is imbedded in numerical analysis acquisition in temperature loading procedure.

10. construction design method imbedded by the optical fiber of photoelectricity interconnect substrate according to claim 1, it is characterized in that: structure imbedded by the optical fiber of described photoelectricity interconnect substrate, comprise: upper and lower two planes are fixedly connected with the optical waveguide layer (6) that the dielectric layer base plate for packaging (2) of Copper Foil (1) and bottom are fixedly connected with (1) of Copper Foil, and the prepreg (3) be positioned between above-mentioned dielectric layer base plate for packaging (2) and optical waveguide layer (6), single or array glass optical fiber is embedded in the optical fiber cutting (4) of the single or array of optical waveguide layer (6), fixed by prepreg (3), photoelectricity interconnect substrate is packaged into through dielectric layer base plate for packaging (2).