CN104333239B - A kind of fully integrated AC DC transducer of high efficiency - Google Patents
A kind of fully integrated AC DC transducer of high efficiency Download PDFInfo
- Publication number
- CN104333239B CN104333239B CN201410570678.3A CN201410570678A CN104333239B CN 104333239 B CN104333239 B CN 104333239B CN 201410570678 A CN201410570678 A CN 201410570678A CN 104333239 B CN104333239 B CN 104333239B
- Authority
- CN
- China
- Prior art keywords
- transistor
- output
- current mirror
- voltage
- output port
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
- H02M7/02—Conversion of AC power input into DC power output without possibility of reversal
- H02M7/04—Conversion of AC power input into DC power output without possibility of reversal by static converters
- H02M7/12—Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/21—Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/217—Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M7/219—Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only in a bridge configuration
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/14—Arrangements for reducing ripples from DC input or output
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Amplifiers (AREA)
- Dc-Dc Converters (AREA)
Abstract
本发明公开了一种高效率全集成的AC‑DC转换器,包括第一交流信号输入端口、第二交流信号输入端口、第一线性稳压器、第二线性稳压器、接地输出端口、直流输出端口和由第一晶体管至第六晶体管组成的三栅极交叉结构自控整流器。本发明把整流器和稳压器结合起来,省去整流器后面的大电容,输出电容小,易于集成且输出纹波小;包括三栅极交叉结构自控整流器,用三个栅极交叉结构自控制的方式取代多路选择器,无需多路选择器产生的脉冲波信号,解决了有源二极管结构的反向漏电流问题,保证了转换的效率。本发明可广泛应用于集成电路技术领域。
The invention discloses a high-efficiency fully integrated AC-DC converter, comprising a first AC signal input port, a second AC signal input port, a first linear voltage regulator, a second linear voltage regulator, a ground output port, A direct current output port and a self-controlled rectifier with a three-gate cross structure composed of the first transistor to the sixth transistor. The invention combines the rectifier and the voltage stabilizer, saves the large capacitor behind the rectifier, has small output capacitance, is easy to integrate and has small output ripple; it includes a self-controlled rectifier with a three-gate cross structure, and a self-controlled rectifier with a three-gate cross structure The method replaces the multiplexer, does not need the pulse wave signal generated by the multiplexer, solves the reverse leakage current problem of the active diode structure, and ensures the conversion efficiency. The invention can be widely applied in the technical field of integrated circuits.
Description
技术领域technical field
本发明涉及集成电路技术领域,尤其是一种高效率全集成的AC-DC转换器。The invention relates to the technical field of integrated circuits, in particular to a high-efficiency fully integrated AC-DC converter.
背景技术Background technique
基于感性耦合的无线电源传输技术越来越广泛应用于因电池尺寸、使用寿命及成本控制等因素而导致电池使用不便或无法安装电池的系统中,如生物医疗植入器件、无线射频识别标签及近距离无线通讯设备等。这种基于电感耦合的能量自激系统通常包含3个部分:阅读器、感应线圈及应答器。应答器通过感应线圈将阅读器发出的载波信号获取,并通过AC-DC转换器将交流信号转换为直流电压。传统的无线电源传输系统框图如图1所示,通常AC-DC转换器包括整流和稳压两个部分,每个部分都需要一个较大的耦合电容。Wireless power transmission technology based on inductive coupling is more and more widely used in systems where batteries are inconvenient to use or cannot be installed due to factors such as battery size, service life and cost control, such as biomedical implants, radio frequency identification tags and Short-range wireless communication equipment, etc. This energy self-excitation system based on inductive coupling usually includes three parts: reader, induction coil and transponder. The transponder acquires the carrier signal sent by the reader through the induction coil, and converts the AC signal into a DC voltage through the AC-DC converter. The block diagram of a traditional wireless power transmission system is shown in Figure 1. Usually, the AC-DC converter includes two parts: rectification and voltage regulation, and each part requires a large coupling capacitor.
整流器是用来把交流信号转换为直流信号的装置。最基本的整流器是二极管整流器,但不管是用整流二极管还是二极管接法的MOSFET(金属-氧化层-半导体-场效晶体管)都会存在较大的导通压降,限制了输入信号的幅值和电压转换效率,所以常规的二极管整流器很少用在集成系统中。近十年来,基于有源二极管的全波整流器成为主流。这种全波整流器采用四个功率晶体管,通过控制它们的导通和截止来实现电流的流向一致。因此,从理论上讲,输出输入电压之差仅由晶体管的导通电阻及负载电流决定,而跟功率晶体管的阈值电压无关,从而显著降低了整流器的内部功耗,大大提高了转换效率。实际上,这种结构下影响其效率的一个主要问题是晶体管的同步问题:负载较大时,晶体管需要设计成大尺寸以满足电流密度及效率的要求,但大尺寸的晶体管的栅极电容较大,导致充放电时间较长,这样整流器在高频下容易形成相对长时间的反向导通通路,影响了整流器的效率。因此,如何避免因晶体管同时导通而形成的反向导通通路是整流器设计的难点所在。A rectifier is a device used to convert an AC signal into a DC signal. The most basic rectifier is a diode rectifier, but whether it is a rectifier diode or a diode-connected MOSFET (metal-oxide-semiconductor-field-effect transistor), there will be a large conduction voltage drop, which limits the amplitude and voltage conversion efficiency, so conventional diode rectifiers are rarely used in integrated systems. In the past decade, full-wave rectifiers based on active diodes have become mainstream. This kind of full-wave rectifier uses four power transistors, by controlling their conduction and cut-off to realize the flow direction of current. Therefore, theoretically speaking, the difference between the output and input voltages is only determined by the on-resistance of the transistor and the load current, and has nothing to do with the threshold voltage of the power transistor, thereby significantly reducing the internal power consumption of the rectifier and greatly improving the conversion efficiency. In fact, one of the main problems affecting its efficiency under this structure is the synchronization problem of transistors: when the load is large, the transistor needs to be designed with a large size to meet the requirements of current density and efficiency, but the gate capacitance of a large-sized transistor is relatively large. Large, resulting in a long charge and discharge time, so the rectifier is easy to form a relatively long reverse conduction path at high frequency, which affects the efficiency of the rectifier. Therefore, how to avoid the reverse conduction path formed by simultaneous conduction of the transistors is the difficulty in the design of the rectifier.
整流器输出的直流电压受感应线圈的相对距离和角度等因素影响而变化显著,纹波较大,所以应答器整流之后还需要一个稳压器来得到一个稳定的直流电压。对于无线能量传输系统电路,稳压器的最基本要求就是低静态功耗。加上成本问题,无需电感并易于完全集成化的线性稳压器(LDO)便成为了这类应用的首选。但LDO的静态电流极低,瞬态性能较弱且电源噪声的抑制能力较低。此外,为了提高集成度,无线能量传输系统电路要尽量减少片外大电容。所以无片外输出电容、瞬态响应快速、电源噪声抑制能力高、低静态功耗和稳定的LDO是稳压器设计的难点所在。The DC voltage output by the rectifier changes significantly due to factors such as the relative distance and angle of the induction coil, and the ripple is large, so a voltage regulator is needed to obtain a stable DC voltage after the transponder is rectified. For wireless energy transfer system circuits, the most basic requirement of a voltage regulator is low static power consumption. Coupled with cost issues, a linear regulator (LDO) that does not require an inductor and is easy to fully integrate has become the first choice for this type of application. However, the quiescent current of the LDO is extremely low, the transient performance is weak and the suppression ability of the power supply noise is low. In addition, in order to improve the integration level, the circuit of the wireless energy transmission system should minimize the large capacitance outside the chip. Therefore, no off-chip output capacitor, fast transient response, high power supply noise suppression capability, low static power consumption and stable LDO are the difficulties in voltage regulator design.
对于需要全集成和低成本的生物医疗植入器件来说,提高AC-DC转换器的性能和节省面积是两个需要考虑的关键问题。衡量AC-DC转换器性能优劣的指标是将AC信号转化为DC信号的能力以及提供电压和电流的能力,具体来说,就是功率转换效率(PCE)和电压转换效率以及输出的纹波。目前的整流器一般只能达到82%以下的功率转换效率,LDO的功率转换效率能达到95%左右,所以整个AC-DC转换器的PCE为。电压转换效率(VCR)与输出阻抗的大小以及信号传输回路各元件的压降有关,整个AC-DC转换器的压降包括整流压降和稳压压降这两部分。而输出纹波则与输出电容有关,整流器一般会有一个大的存储电容,稳压器也需要一个大的稳压电容,而且这两个输出电容一般在μF量级,占用太大的版图面积,不利于集成。如果减小输出电容,又需要考虑稳定性的问题和纹波抑制的方法。For biomedical implants that require full integration and low cost, improving the performance of the AC-DC converter and saving area are two key issues that need to be considered. The indicators to measure the performance of AC-DC converters are the ability to convert AC signals into DC signals and the ability to provide voltage and current, specifically, power conversion efficiency (PCE) and voltage conversion efficiency and output ripple. The current rectifiers generally can only achieve a power conversion efficiency of less than 82%, and the power conversion efficiency of an LDO can reach about 95%, so the PCE of the entire AC-DC converter is . The voltage conversion efficiency (VCR) is related to the size of the output impedance and the voltage drop of each component of the signal transmission loop. The voltage drop of the entire AC-DC converter includes the rectification voltage drop and the voltage regulation voltage drop. The output ripple is related to the output capacitor. The rectifier generally has a large storage capacitor, and the voltage regulator also needs a large voltage stabilizing capacitor, and these two output capacitors are generally in the order of μF, which takes up too much layout area. , is not conducive to integration. If the output capacitance is reduced, stability issues and ripple suppression methods need to be considered.
针对输出电容大这个问题,T.J Sun提出了一种新的电路结构——整流稳压器(rectigulator),把整流器和稳压器结合起来,直接将交流信号转化为稳定的直流信号输出,从而省掉整流器后面的大电容,但其仍需要一个μF级的电容,如图2所示。图3给出了T.JSun所提出的rectigulator的具体电路原理图。该电路由以下四部分组成:四个晶体管、两个运算放大器、两个二选一多路选择器和一个直流电压分压电路。其中,四个晶体管(M1、M2、M3和M4)是AC-DC转换器的主路径,晶体管M1和M2的栅极由运算放大器驱动,交替导通,通过从交流输入端到直流输出端的信号;晶体管M3和M4是栅极交叉(cross-gate)结构,交替导通,通过由地到交流输入端的直流信号。此结构可以看作是由一般的运算放大器驱动的有源二极管整流器和LDO共享了一对晶体管,在整流的同时进行稳压。而且,此结构的输出端只需要一个电容,该电容同时作为整流器的存储电容和稳压器的稳压电容。但是,在这个结构中,运算放大器的输入端信号是由多路选择器产生的脉冲波信号,该信号是类似于DC-DC转换器开关管的驱动信号,因此输出会有较大噪声。其次,该结构本质上还是运算放大器驱动的有源二极管,当频率较高时运放存在offset(偏移),导致漏电流的形成,进一步降低了转换效率。Aiming at the problem of large output capacitance, T.J Sun proposed a new circuit structure - a rectifier regulator (rectigulator), which combines the rectifier and the regulator to directly convert the AC signal into a stable DC signal output, thereby saving Remove the large capacitor behind the rectifier, but it still needs a μF capacitor, as shown in Figure 2. Figure 3 shows the specific circuit schematic diagram of the rectigulator proposed by T.JSun. The circuit consists of four parts: four transistors, two operational amplifiers, two two-to-one multiplexers, and a DC voltage divider circuit. Among them, four transistors (M1, M2, M3, and M4) are the main path of the AC-DC converter. The gates of transistors M1 and M2 are driven by operational amplifiers, and they are alternately turned on, passing the signal from the AC input to the DC output. ; Transistors M3 and M4 are gate cross-gate (cross-gate) structure, alternate conduction, through the DC signal from the ground to the AC input. This structure can be regarded as an active diode rectifier driven by a general operational amplifier and a pair of transistors shared by an LDO to stabilize voltage while rectifying. Moreover, only one capacitor is needed at the output end of this structure, and this capacitor simultaneously serves as the storage capacitor of the rectifier and the stabilizing capacitor of the voltage regulator. However, in this structure, the input signal of the operational amplifier is a pulse wave signal generated by a multiplexer, which is similar to the driving signal of a switch tube of a DC-DC converter, so the output will have relatively large noise. Secondly, the structure is essentially an active diode driven by an operational amplifier. When the frequency is high, the operational amplifier has an offset (offset), which leads to the formation of leakage current and further reduces the conversion efficiency.
发明内容Contents of the invention
为了解决上述技术问题,本发明的目的是:提供一种易于集成、输出纹波小和不存在反向漏电流的,高效率全集成的AC-DC转换器。In order to solve the above technical problems, the object of the present invention is to provide a fully integrated AC-DC converter with high efficiency, which is easy to integrate, has small output ripple and no reverse leakage current.
本发明解决其技术问题所采用的技术方案是:The technical solution adopted by the present invention to solve its technical problems is:
一种高效率全集成的AC-DC转换器,包括第一交流信号输入端口、第二交流信号输入端口、第一线性稳压器、第二线性稳压器、接地输出端口、直流输出端口和由第一晶体管至第六晶体管组成的三栅极交叉结构自控整流器,所述第一交流信号输入端口分别与第一晶体管的源极、第二晶体管的栅极、第三晶体管的漏极和第四晶体管的栅极连接,所述第三晶体管的源极与第四晶体管的源极连接,所述第三晶体管的栅极和第四晶体管的漏极均与直流输出端口连接,所述第一线性稳压器并行连接在第四晶体管的源极和漏极之间;所述第二交流信号输入端口分别与第一晶体管的栅极、第二晶体管的源极、第五晶体管的漏极和第六晶体管的栅极连接,所述第五晶体管的源极与第六晶体管的源极连接,所述第五晶体管的栅极和第六晶体管的漏极均与直流输出端口连接,所述第二线性稳压器并行连接在第六晶体管的源极和漏极之间;所述第一晶体管的漏极和第二晶体管的漏极均与接地输出端口连接。A high-efficiency fully integrated AC-DC converter, including a first AC signal input port, a second AC signal input port, a first linear voltage regulator, a second linear voltage regulator, a ground output port, a DC output port and A self-controlled rectifier with a three-gate cross structure composed of the first transistor to the sixth transistor, the first AC signal input port is connected to the source of the first transistor, the gate of the second transistor, the drain of the third transistor, and the first transistor respectively. The gates of the four transistors are connected, the source of the third transistor is connected to the source of the fourth transistor, the gate of the third transistor and the drain of the fourth transistor are connected to the DC output port, and the first The linear regulator is connected in parallel between the source and the drain of the fourth transistor; the second AC signal input port is respectively connected to the gate of the first transistor, the source of the second transistor, the drain of the fifth transistor and The gate of the sixth transistor is connected, the source of the fifth transistor is connected to the source of the sixth transistor, the gate of the fifth transistor and the drain of the sixth transistor are both connected to the DC output port, the first The two linear regulators are connected in parallel between the source and drain of the sixth transistor; the drain of the first transistor and the drain of the second transistor are both connected to the ground output port.
进一步,所述第一晶体管至第六晶体管的关系满足:若第一交流信号输入端口的电压大于直流输出端口的电压,则第二晶体管和第三晶体管均导通,第一晶体管、第四晶体管和第五晶体管均截止;若第一交流信号输入端口的电压小于直流输出端口的电压,则第二晶体管和第三晶体管均截止,第一晶体管和第四晶体管均导通;若第二交流信号输入端口的电压大于直流输出端口的电压,则第一晶体管和第五晶体管均导通,第二晶体管、第三晶体管和第六晶体管均截止;若第二交流信号输入端口的电压小于直流输出端口的电压,则第一晶体管和第五晶体管均截止,第二晶体管和第六晶体管均导通。Further, the relationship between the first transistor and the sixth transistor satisfies: if the voltage of the first AC signal input port is greater than the voltage of the DC output port, the second transistor and the third transistor are both turned on, and the first transistor and the fourth transistor and the fifth transistor are all off; if the voltage of the first AC signal input port is less than the voltage of the DC output port, the second transistor and the third transistor are all off, and the first transistor and the fourth transistor are all on; if the second AC signal The voltage of the input port is greater than the voltage of the DC output port, the first transistor and the fifth transistor are all turned on, and the second transistor, the third transistor and the sixth transistor are all turned off; if the voltage of the second AC signal input port is lower than the DC output port voltage, the first transistor and the fifth transistor are all turned off, and the second transistor and the sixth transistor are both turned on.
进一步,所述第一线性稳压器或第二线性稳压器包括第一级放大电路、第二级放大电路、第三级放大电路、前馈二极管、高通滤波器和密勒补偿电容,所述第一级放大电路包括偏置电流镜、差分输入电路和电流镜负载,所述第二级放大电路包括共源放大晶体管和电流放大电流镜,所述第三级放大电路包括第七晶体管和负载,所述第七晶体管的源极分别与前馈二极管的阴极、电流放大电流镜和偏置电流镜的一端连接,所述偏置电流镜的另一端与差分输入电路连接,所述差分输入电路的一输入端与负载连接,所述差分输入电路的另一输入端接基准电压,所述差分输入电路还与电流镜负载连接,所述电流镜负载还分别与密勒补偿电容和共源放大晶体管连接,所述密勒补偿电容与直流输出端口连接;所述第七晶体管的栅极分别与前馈二极管的阳极、电流放大电流镜和高通滤波器连接,所述电流镜负载、共源放大晶体管和高通滤波器均与接地输出端口连接,所述电流放大电流镜和高通滤波器还均接输入电压;所述第七晶体管的漏极分别与负载和直流输出端口连接。Further, the first linear voltage regulator or the second linear voltage regulator includes a first-stage amplifier circuit, a second-stage amplifier circuit, a third-stage amplifier circuit, a feedforward diode, a high-pass filter, and a Miller compensation capacitor, so The first-stage amplifying circuit includes a bias current mirror, a differential input circuit and a current mirror load, the second-stage amplifying circuit includes a common-source amplifying transistor and a current amplifying current mirror, and the third-stage amplifying circuit includes a seventh transistor and Load, the source of the seventh transistor is respectively connected to the cathode of the feedforward diode, the current amplification current mirror and one end of the bias current mirror, and the other end of the bias current mirror is connected to the differential input circuit, and the differential input One input terminal of the circuit is connected to the load, the other input terminal of the differential input circuit is connected to the reference voltage, the differential input circuit is also connected to the current mirror load, and the current mirror load is also connected to the Miller compensation capacitor and the common source The amplifying transistor is connected, and the Miller compensation capacitor is connected to the DC output port; the grid of the seventh transistor is respectively connected to the anode of the feedforward diode, the current amplification current mirror and the high-pass filter, and the current mirror load, common source Both the amplifying transistor and the high-pass filter are connected to the ground output port, and both the current amplifying current mirror and the high-pass filter are also connected to the input voltage; the drain of the seventh transistor is respectively connected to the load and the DC output port.
进一步,所述偏置电流镜为PMOS电流镜,所述电流镜负载为NMOS电流镜,所述差分输入电路为PMOS差分对管输入电路。Further, the bias current mirror is a PMOS current mirror, the current mirror load is an NMOS current mirror, and the differential input circuit is a PMOS differential pair transistor input circuit.
进一步,所述第一晶体管和第二晶体管均为NMOS管,所述第三晶体管、第四晶体管、第五晶体管、第六晶体管和第七晶体管均为PMOS管。Further, the first transistor and the second transistor are all NMOS transistors, and the third transistor, the fourth transistor, the fifth transistor, the sixth transistor and the seventh transistor are all PMOS transistors.
本发明的有益效果是:把整流器和稳压器结合起来,省去整流器后面的大电容,输出电容小,易于集成且输出纹波小;包括三栅极交叉结构自控整流器,用三个栅极交叉结构自控制的方式取代多路选择器,无需多路选择器产生的脉冲波信号,解决了有源二极管结构的反向漏电流问题,保证了转换的效率。进一步,线性稳压器包括差分输入放大级、高增益级、高通滤波器、前馈二极管、密勒补偿电容和第七晶体管,通过高通滤波器与二极管连接的晶体管协同前馈的方法来提高线性稳压器的电源噪声抑制能力,进一步减小了输出纹波。The beneficial effects of the present invention are: combining the rectifier and the voltage stabilizer, eliminating the large capacitor behind the rectifier, the output capacitor is small, easy to integrate and the output ripple is small; The self-control method of the crossover structure replaces the multiplexer without the pulse wave signal generated by the multiplexer, which solves the reverse leakage current problem of the active diode structure and ensures the conversion efficiency. Further, the linear regulator includes a differential input amplifier stage, a high-gain stage, a high-pass filter, a feed-forward diode, a Miller compensation capacitor, and a seventh transistor, and the linearity is improved through a cooperative feed-forward method of the high-pass filter and the diode-connected transistor The regulator's power supply noise rejection capability further reduces output ripple.
附图说明Description of drawings
下面结合附图和实施例对本发明作进一步说明。The present invention will be further described below in conjunction with drawings and embodiments.
图1是传统无线电源传输系统的原理框图;Figure 1 is a schematic block diagram of a traditional wireless power transfer system;
图2是基于rectigulator结构的无线电源传输系统的原理框图;Fig. 2 is a functional block diagram of a wireless power transmission system based on a rectigulator structure;
图3是rectigulator结构的电路原理图;Fig. 3 is a schematic circuit diagram of the rectigulator structure;
图4是本发明一种高效率全集成的AC-DC转换器的电路原理图;Fig. 4 is the circuit schematic diagram of a kind of high-efficiency fully integrated AC-DC converter of the present invention;
图5是本发明第一线性稳压器或第二线性稳压器的电路原理图。FIG. 5 is a schematic circuit diagram of the first linear voltage regulator or the second linear voltage regulator of the present invention.
具体实施方式detailed description
参照图4,一种高效率全集成的AC-DC转换器,包括第一交流信号输入端口AC1、第二交流信号输入端口AC2、第一线性稳压器LLDO、第二线性稳压器RLDO、接地输出端口、直流输出端口DC Output和由第一晶体管至第六晶体管M1~M6组成的三栅极交叉结构自控整流器,所述第一交流信号输入端口AC1分别与第一晶体管M1的源极、第二晶体管M2的栅极、第三晶体管M3的漏极和第四晶体管M4的栅极连接,所述第三晶体管M3的源极与第四晶体管M4的源极连接,所述第三晶体管M3的栅极和第四晶体管M4的漏极均与直流输出端口DCOutput连接,所述第一线性稳压器LLDO并行连接在第四晶体管M4的源极和漏极之间;所述第二交流信号输入端口AC2分别与第一晶体管M1的栅极、第二晶体管M2的源极、第五晶体管M5的漏极和第六晶体管M6的栅极连接,所述第五晶体管M5的源极与第六晶体管M6的源极连接,所述第五晶体管M5的栅极和第六晶体管M6的漏极均与直流输出端口DC Output连接,所述第二线性稳压器RLDO并行连接在第六晶体管M6的源极和漏极之间;所述第一晶体管M1的漏极和第二晶体管M2的漏极均与接地输出端口连接。Referring to FIG. 4, a high-efficiency fully integrated AC-DC converter includes a first AC signal input port AC1, a second AC signal input port AC2, a first linear voltage regulator LLDO, a second linear voltage regulator RLDO, A ground output port, a DC output port DC Output, and a three-gate cross-structure self-controlled rectifier composed of the first transistor to the sixth transistor M1-M6, the first AC signal input port AC1 is respectively connected to the source of the first transistor M1, The gate of the second transistor M2, the drain of the third transistor M3 are connected to the gate of the fourth transistor M4, the source of the third transistor M3 is connected to the source of the fourth transistor M4, and the third transistor M3 The gate of the gate and the drain of the fourth transistor M4 are both connected to the DC output port DCOutput, and the first linear voltage regulator LLDO is connected in parallel between the source and the drain of the fourth transistor M4; the second AC signal The input port AC2 is respectively connected to the gate of the first transistor M1, the source of the second transistor M2, the drain of the fifth transistor M5 and the gate of the sixth transistor M6, and the source of the fifth transistor M5 is connected to the gate of the sixth transistor M6. The source of the transistor M6 is connected, the gate of the fifth transistor M5 and the drain of the sixth transistor M6 are both connected to the DC output port DC Output, and the second linear regulator RLDO is connected in parallel to the sixth transistor M6 Between the source and the drain; the drain of the first transistor M1 and the drain of the second transistor M2 are both connected to the ground output port.
进一步作为优选的实施方式,所述第一晶体管M1至第六晶体管M6的关系满足:若第一交流信号输入端口AC1的电压大于直流输出端口DC Output的电压,则第二晶体管M2和第三晶体管M3均导通,第一晶体管M1、第四晶体管M4和第五晶体管M5均截止;若第一交流信号输入端口AC1的电压小于直流输出端口DC Output的电压,则第二晶体管M2和第三晶体管M3均截止,第一晶体管M1和第四晶体管M4均导通;若第二交流信号输入端口AC2的电压大于直流输出端口DC Output的电压,则第一晶体管M1和第五晶体管M5均导通,第二晶体管M2、第三晶体管M3和第六晶体管M6均截止;若第二交流信号输入端口AC2的电压小于直流输出端口DC Output的电压,则第一晶体管M1和第五晶体管M5均截止,第二晶体管M2和第六晶体管M6均导通。As a further preferred embodiment, the relationship between the first transistor M1 and the sixth transistor M6 satisfies: if the voltage of the first AC signal input port AC1 is greater than the voltage of the DC output port DC Output, the second transistor M2 and the third transistor M3 are all turned on, and the first transistor M1, the fourth transistor M4 and the fifth transistor M5 are all turned off; if the voltage of the first AC signal input port AC1 is less than the voltage of the DC output port DC Output, the second transistor M2 and the third transistor Both M3 are turned off, and both the first transistor M1 and the fourth transistor M4 are turned on; if the voltage of the second AC signal input port AC2 is greater than the voltage of the direct current output port DC Output, the first transistor M1 and the fifth transistor M5 are both turned on, The second transistor M2, the third transistor M3 and the sixth transistor M6 are all turned off; if the voltage of the second AC signal input port AC2 is lower than the voltage of the direct current output port DC Output, the first transistor M1 and the fifth transistor M5 are all turned off, and the second transistor M5 is turned off. Both the second transistor M2 and the sixth transistor M6 are turned on.
参照图5,进一步作为优选的实施方式,所述第一线性稳压器或第二线性稳压器包括第一级放大电路1、第二级放大电路2、第三级放大电路3、前馈二极管4、高通滤波器5和密勒补偿电容Cm,所述第一级放大电路1包括偏置电流镜11、差分输入电路12和电流镜负载13,所述第二级放大电路包括共源放大晶体管21和电流放大电流镜22,所述第三级放大电路包括第七晶体管M7和负载load,所述第七晶体管M7的源极分别与前馈二极管4的阴极、电流放大电流镜22和偏置电流镜11的一端连接,所述偏置电流镜11的另一端与差分输入电路12连接,所述差分输入电路12的一输入端与负载load连接,所述差分输入电路12的另一输入端接基准电压Vref,所述差分输入电路12还与电流镜负载13连接,所述电流镜负载13还分别与密勒补偿电容Cm和共源放大晶体管21连接,所述密勒补偿电容Cm与直流输出端口DCOutput连接;所述第七晶体管M7的栅极分别与前馈二极管4的阳极、电流放大电流镜22和高通滤波器5连接,所述电流镜负载13、共源放大晶体管21和高通滤波器5均与接地输出端口连接,所述共电流放大电流镜22和高通滤波器5还均接输入电压VIN;所述第七晶体管M7的漏极分别与负载load和直流输出端口DC Output连接。Referring to Fig. 5, further as a preferred embodiment, the first linear voltage regulator or the second linear voltage regulator includes a first-stage amplifying circuit 1, a second-stage amplifying circuit 2, a third-stage amplifying circuit 3, a feedforward Diode 4, high-pass filter 5 and Miller compensation capacitor Cm, the first-stage amplifying circuit 1 includes a bias current mirror 11, a differential input circuit 12 and a current mirror load 13, and the second-stage amplifying circuit includes a common source amplifier A transistor 21 and a current amplifying current mirror 22, the third stage amplifying circuit includes a seventh transistor M7 and a load load, the source of the seventh transistor M7 is respectively connected to the cathode of the feedforward diode 4, the current amplifying current mirror 22 and the bias One end of the current mirror 11 is connected, the other end of the bias current mirror 11 is connected to the differential input circuit 12, one input end of the differential input circuit 12 is connected to the load load, and the other input of the differential input circuit 12 The terminal is connected to the reference voltage Vref, and the differential input circuit 12 is also connected to the current mirror load 13, and the current mirror load 13 is also respectively connected to the Miller compensation capacitor Cm and the common source amplifier transistor 21, and the Miller compensation capacitor Cm is connected to the common source amplifier transistor 21. The DC output port DCOutput is connected; the gate of the seventh transistor M7 is connected with the anode of the feedforward diode 4, the current amplification current mirror 22 and the high-pass filter 5, the current mirror load 13, the common source amplification transistor 21 and the high-pass filter The filters 5 are all connected to the ground output port, and the common current amplifying current mirror 22 and the high-pass filter 5 are both connected to the input voltage VIN; the drains of the seventh transistor M7 are respectively connected to the load load and the DC output port DC Output .
其中,第一放大电路和第二放大电路构成了两级运算放大器,用于对输出端负载的反馈信号进行放大。而密勒补偿电容Cm,则用于保证整个线性稳压器环路的稳定性。Wherein, the first amplifying circuit and the second amplifying circuit constitute a two-stage operational amplifier for amplifying the feedback signal of the load at the output end. The Miller compensation capacitor Cm is used to ensure the stability of the entire linear regulator loop.
进一步作为优选的实施方式,所述偏置电流镜11为PMOS电流镜,所述电流镜负载13为NMOS电流镜,所述差分输入电路12为PMOS差分对管输入电路。As a further preferred embodiment, the bias current mirror 11 is a PMOS current mirror, the current mirror load 13 is an NMOS current mirror, and the differential input circuit 12 is a PMOS differential pair transistor input circuit.
进一步作为优选的实施方式,所述第一晶体管M1和第二晶体管M2均为NMOS管,所述第三晶体管M3、第四晶体管M4、第五晶体管M5、第六晶体管M6和第七晶体管M7均为PMOS管。As a further preferred embodiment, the first transistor M1 and the second transistor M2 are both NMOS transistors, and the third transistor M3, the fourth transistor M4, the fifth transistor M5, the sixth transistor M6 and the seventh transistor M7 are all For the PMOS tube.
下面结合说明书附图和具体实施例对本发明作进一步详细介绍。The present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.
实施例一Embodiment one
参照图4,本发明的第一实施例:Referring to Fig. 4, the first embodiment of the present invention:
本发明的AC-DC转换器是个简单的双端口网络,其中,AC1和AC2是输入端口,DCOutput和GND接地输出端口是输出端口。整个AC-DC转换器包括两个主要部分:由三个栅极交叉结构组成的自控制整流器和高电源电压抑制比的线性稳压器。这两部分共享一个输出电容,大小只需要4nF,易于片上集成。The AC-DC converter of the present invention is a simple two-port network, wherein AC1 and AC2 are input ports, and DCOutput and GND output ports are output ports. The whole AC-DC converter consists of two main parts: a self-controlled rectifier consisting of three gate crossover structures and a linear regulator with high supply voltage rejection ratio. These two parts share an output capacitor, and the size only needs 4nF, which is easy to integrate on-chip.
其中,整流器的核心是三个栅极交叉结构。晶体管M3和M5是交流信号从输入端到输出端的主通路,而晶体管M1和M2是输入端到地的直流信号主通路。晶体管M4和M6为用于实现自控制的开关,以避免像rectigulator结构那样要用多路选择器产生外部脉冲信号来控制整流器的工作路径。Among them, the core of the rectifier is a three-gate cross structure. Transistors M3 and M5 are the main paths of the AC signal from the input end to the output end, while transistors M1 and M2 are the main path of the DC signal from the input end to the ground. The transistors M4 and M6 are switches for realizing self-control, so as to avoid using a multiplexer to generate an external pulse signal to control the working path of the rectifier as in the rectigulator structure.
本发明整个电路的工作过程如下:The working process of the whole circuit of the present invention is as follows:
在一个半周期内,当输入端AC1的电压高于直流输出端口的输出电压时,M3打开,电流从M3经过LLDO到达直流输出端,同时M2也打开通过地到AC1的电流,而M5则关断以避免直流输出端到地的反向漏电流。此时,M4关断,M1也关断,其信号主通路如图4中的虚线和箭头所示,转换器主要利用LLDO来稳压。此状态下转换器输出的直流电压为,其中,Vref为基准电压,R1和R2是转换器的分压电阻。而当AC1小于输出端的信号时,M3关断,主信号通路关断,此时,LLDO不工作,M2也关断。由于LLDO的瞬态响应很快,所以其关断时间很短,所以可以有效地避免反向漏电流通过。此时,M4打开,稳压通过直流输出端存储电容的充放电来实现;M1也打开,从而实现左右两边的电路交替工作。而输入端AC2的工作过程与输入端AC1工作过程类似。In a half cycle, when the voltage of the input terminal AC1 is higher than the output voltage of the DC output port, M3 is turned on, and the current passes through LLDO from M3 to the DC output terminal, and at the same time, M2 also turns on the current through the ground to AC1, while M5 is turned off. to avoid reverse leakage current from the DC output to ground. At this time, M4 is turned off, and M1 is also turned off. The main signal path is shown by the dotted line and the arrow in Figure 4. The converter mainly uses LLDO to stabilize the voltage. In this state, the DC voltage output by the converter is , among them, Vref is the reference voltage, R1 and R2 are the divider resistors of the converter. And when AC1 is smaller than the signal at the output end, M3 is turned off, and the main signal path is turned off. At this time, LLDO does not work, and M2 is also turned off. Because the transient response of LLDO is very fast, its off time is very short, so it can effectively avoid the passage of reverse leakage current. At this time, M4 is turned on, and the voltage stabilization is realized by charging and discharging the storage capacitor at the DC output end; M1 is also turned on, so that the circuits on the left and right sides work alternately. The working process of the input terminal AC2 is similar to that of the input terminal AC1.
为了进一步提供转换器的转换效率,本发明还需要输出电容小、瞬态响应高、电源纹波抑制能力强的LDO。图5为本发明LDO的具体电路原理图。本发明采用一个PMOS管差分输入,N管有源放大的两级运算放大器(第一级放大电路和第二级放大电路)来放大负载的反馈信号。其中,第一级放大电路用于差分输入管的共源放大,负载电流镜13作为其负载;第二级放大电路(高增益级)是提高增益的主要电路,其中电流放大电流镜22把第二级的输出电流提高了10倍,从而提高了跨导,减小了输出阻抗,增加了带宽,这样的输出级也可以提高输出电压的摆幅。本发明前馈二极管和高通滤波器合起来组成前馈通路,把电源纹波前馈到晶体管M7的栅极。二极管连接的PMOSFET主要用于前馈低频纹波,高通滤波器主要用于前馈中高频纹波,这两个信号在晶体管M7的栅极处叠加。该前馈通路,提高了中频段的电源噪声抑制能力,减小了输出纹波。此外,本发明还采用了一个1pF的密勒补偿电容Cm来保证整个环路的稳定性。In order to further improve the conversion efficiency of the converter, the present invention also requires an LDO with small output capacitance, high transient response and strong power ripple suppression capability. FIG. 5 is a specific circuit schematic diagram of the LDO of the present invention. The present invention adopts a PMOS tube differential input and a two-stage operational amplifier (first-stage amplifying circuit and second-stage amplifying circuit) of N-tube active amplification to amplify the feedback signal of the load. Among them, the first-stage amplifying circuit is used for the common-source amplification of the differential input tube, and the load current mirror 13 is used as its load; the second-stage amplifying circuit (high gain stage) is the main circuit for increasing the gain, and the current amplifying current mirror 22 takes the first The output current of the second stage is increased by 10 times, thereby increasing the transconductance, reducing the output impedance, and increasing the bandwidth. Such an output stage can also increase the swing of the output voltage. In the present invention, the feed-forward diode and the high-pass filter together form a feed-forward path, and feed forward the power supply ripple to the gate of the transistor M7. The diode-connected PMOSFET is mainly used to feed-forward the low-frequency ripple, and the high-pass filter is mainly used to feed-forward the mid-high frequency ripple. These two signals are superimposed at the gate of transistor M7. The feed-forward path improves the power supply noise suppression capability of the mid-frequency band and reduces output ripple. In addition, the present invention also uses a 1pF Miller compensation capacitor Cm to ensure the stability of the entire loop.
本发明提出一种新的AC-DC转换电路结构,与rectigulator结构思想类似地,都是把整流器和稳压器结合起来,以省去整流器后面的大电容。但与rectigulator结构不同的是,本发明采用了三个栅极交叉(cross-gate)结构自控制的方式避免使用多路选择器,解决了有源二极管结构的反向漏电流问题,同时通过高通滤波器与二极管连接的MOS管协同前馈的方法来提高LDO的电源噪声抑制能力,减小了输出纹波。本发明的AC-DC转换器,适用于低成本的无线电源传输系统,简单实用,易于集成且性能较高,特别适合与生物医疗植入器件使用。The present invention proposes a new AC-DC conversion circuit structure, which is similar to the rectigulator structure idea, combining the rectifier and the voltage stabilizer to save the large capacitor behind the rectifier. However, different from the rectigulator structure, the present invention adopts a three-gate cross-gate structure self-control method to avoid the use of multiplexers, and solves the reverse leakage current problem of the active diode structure. The MOS tube connected with the filter and the diode cooperates with the feed-forward method to improve the power supply noise suppression ability of the LDO and reduce the output ripple. The AC-DC converter of the present invention is suitable for a low-cost wireless power transmission system, is simple and practical, easy to integrate and has high performance, and is especially suitable for use with biomedical implant devices.
以上是对本发明的较佳实施进行了具体说明,但本发明创造并不限于所述实施例,熟悉本领域的技术人员在不违背本发明精神的前提下还可做作出种种的等同变形或替换,这些等同的变形或替换均包含在本申请权利要求所限定的范围内。The above is a specific description of the preferred implementation of the present invention, but the invention is not limited to the described embodiments, and those skilled in the art can also make various equivalent deformations or replacements without violating the spirit of the present invention. , these equivalent modifications or replacements are all within the scope defined by the claims of the present application.
Claims (4)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410570678.3A CN104333239B (en) | 2014-10-23 | 2014-10-23 | A kind of fully integrated AC DC transducer of high efficiency |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410570678.3A CN104333239B (en) | 2014-10-23 | 2014-10-23 | A kind of fully integrated AC DC transducer of high efficiency |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN104333239A CN104333239A (en) | 2015-02-04 |
| CN104333239B true CN104333239B (en) | 2017-03-01 |
Family
ID=52407911
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201410570678.3A Active CN104333239B (en) | 2014-10-23 | 2014-10-23 | A kind of fully integrated AC DC transducer of high efficiency |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN104333239B (en) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107623493A (en) * | 2017-09-13 | 2018-01-23 | 东南大学 | A high-efficiency high-fidelity envelope modulator |
| CN110995026B (en) * | 2019-12-30 | 2021-10-19 | 南方科技大学 | an active rectifier |
| CN111181442B (en) * | 2020-01-23 | 2022-12-13 | 中山大学 | An Adaptive Piezoelectric Energy Harvesting Interface Circuit |
| CN111211623B (en) * | 2020-01-23 | 2023-08-11 | 中山大学 | Transmitting circuit applied to wireless energy transmission system and control method |
| WO2021208132A1 (en) * | 2020-04-14 | 2021-10-21 | 深圳技术大学 | Shared gate cross-coupling-based cmos rectification circuit |
| CN114236422B (en) * | 2021-12-16 | 2024-06-25 | 成都思瑞浦微电子科技有限公司 | Leakage detection circuit |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1241319A (en) * | 1996-11-29 | 2000-01-12 | 法国电信公司 | Device for rectifying voltage with integrated components |
| US6501320B1 (en) * | 2000-07-25 | 2002-12-31 | Exar Corporation | Self-powered, maximum-conductive, low turn-on voltage CMOS rectifier |
| CN1905345A (en) * | 2006-08-11 | 2007-01-31 | 绵阳凯路微电子有限公司 | High voltage-proof rectifier implemented by standard CMOS logic process |
| CN103532406A (en) * | 2012-07-03 | 2014-01-22 | 成都市宏山科技有限公司 | Rectifier applied to electronic tag |
-
2014
- 2014-10-23 CN CN201410570678.3A patent/CN104333239B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1241319A (en) * | 1996-11-29 | 2000-01-12 | 法国电信公司 | Device for rectifying voltage with integrated components |
| US6501320B1 (en) * | 2000-07-25 | 2002-12-31 | Exar Corporation | Self-powered, maximum-conductive, low turn-on voltage CMOS rectifier |
| CN1905345A (en) * | 2006-08-11 | 2007-01-31 | 绵阳凯路微电子有限公司 | High voltage-proof rectifier implemented by standard CMOS logic process |
| CN103532406A (en) * | 2012-07-03 | 2014-01-22 | 成都市宏山科技有限公司 | Rectifier applied to electronic tag |
Non-Patent Citations (3)
| Title |
|---|
| A CMOS Rectifier With a Cross-Coupled Latched comparator for wireless power transfer in biomedical applications;Hyouk-Kyu Cha,et al.;《IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS》;20120731;第59卷(第7期);409-413 * |
| An Inductively Powered Scalable 32-Channel wireless neural recording system-on-a-chip for neuroscience applications;Seung Bae Lee,et al.;《IEEE International Solid-State Circuits Conference》;20100208;120-121 * |
| Rectigulator: a hybrid of rectifiers and regulators for miniature wirelessly powerd bio-microsystems;T.J.SUN,et al.;《ELECTRONICS LETTERS》;20120913;第48卷(第19期);1-2 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN104333239A (en) | 2015-02-04 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN104333239B (en) | A kind of fully integrated AC DC transducer of high efficiency | |
| CN202838077U (en) | Power supply system integrated in radio frequency chip | |
| US10270345B1 (en) | Method and apparatus for wide bandwidth, efficient power supply | |
| TWI475349B (en) | Voltage regulator, envelope tracking power system, transmission module, and integrated circuit device | |
| CN202486643U (en) | High-bandwidth low-voltage difference linear voltage-stabilizing source, system and chip | |
| US10491161B2 (en) | Apparatus for and method of a supply modulator for a power amplifier | |
| US20120142304A1 (en) | Power Amplifiers for Wireless Systems | |
| US9240690B2 (en) | Power transfer device | |
| CN102880219B (en) | Linear voltage regulator with dynamic compensation characteristic | |
| Guo et al. | A 25mA CMOS LDO with− 85dB PSRR at 2.5 MHz | |
| CN103956920B (en) | Static threshold eliminates and eliminates, with dynamic threshold, the voltage-doubler rectifier combined | |
| WO2016029489A1 (en) | Single-inductor positive and negative voltage output device | |
| CN103092241A (en) | Mixed compensating type high-stability LDO (low-dropout regulator) chip circuit | |
| CN102522951B (en) | Integrated structure for low-noise amplifier and mixer by means of current multiplexing | |
| CN106301242A (en) | Current multiplexing type radio-frequency amplifier circuit | |
| CN111313568A (en) | An energy acquisition circuit for wearable device and its power management circuit | |
| CN104317345A (en) | Low dropout regulator on basis of active feedback network | |
| CN116915193B (en) | Millimeter wave reconfigurable power amplifier with high linearity and high output power | |
| CN104092390B (en) | Ultra-low voltage efficient input self-power-supply rectifier circuit | |
| CN102075088B (en) | Method for cascade connection of switch voltage converter and linear voltage regulator | |
| Chen et al. | High-PSR CMOS LDO with embedded ripple feedforward and energy-efficient bandwidth extension | |
| CN102591393A (en) | A low dropout linear regulator | |
| TWI400592B (en) | Low dropout regulator | |
| CN208819106U (en) | An LDO circuit with ultra-low static power consumption and an LDO circuit with ultra-low static power consumption for driving a large load | |
| CN218958533U (en) | An overvoltage protection circuit and switching power supply |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| TR01 | Transfer of patent right | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20211224 Address after: B201, zero one square, Xi'an Software Park, 72 Keji 2nd Road, high tech Zone, Xi'an City, Shaanxi Province, 710000 Patentee after: XI'AN TUOER MICROELECTRONICS Co.,Ltd. Address before: 510275 No. 135 West Xingang Road, Guangzhou, Guangdong, Haizhuqu District Patentee before: SUN YAT-SEN University |
|
| CP01 | Change in the name or title of a patent holder | ||
| CP01 | Change in the name or title of a patent holder |
Address after: B201, zero one square, Xi'an Software Park, 72 Keji 2nd Road, high tech Zone, Xi'an City, Shaanxi Province, 710000 Patentee after: Tuoer Microelectronics Co.,Ltd. Address before: B201, zero one square, Xi'an Software Park, 72 Keji 2nd Road, high tech Zone, Xi'an City, Shaanxi Province, 710000 Patentee before: Xi'an Tuoer Microelectronics Co.,Ltd. Address after: B201, zero one square, Xi'an Software Park, 72 Keji 2nd Road, high tech Zone, Xi'an City, Shaanxi Province, 710000 Patentee after: Xi'an Tuoer Microelectronics Co.,Ltd. Address before: B201, zero one square, Xi'an Software Park, 72 Keji 2nd Road, high tech Zone, Xi'an City, Shaanxi Province, 710000 Patentee before: XI'AN TUOER MICROELECTRONICS Co.,Ltd. |