CN104300007A - Thin film transistor and manufacturing method thereof, array substrate as well as display device - Google Patents
Thin film transistor and manufacturing method thereof, array substrate as well as display device Download PDFInfo
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- CN104300007A CN104300007A CN201410585136.3A CN201410585136A CN104300007A CN 104300007 A CN104300007 A CN 104300007A CN 201410585136 A CN201410585136 A CN 201410585136A CN 104300007 A CN104300007 A CN 104300007A
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/751—Insulated-gate field-effect transistors [IGFET] having composition variations in the channel regions
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
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- Thin Film Transistor (AREA)
Abstract
本发明提供了一种薄膜晶体管及其制作方法、阵列基板、显示装置，该薄膜晶体管的制作方法包括在基板上形成栅极的图形、栅极绝缘层的图形、有源层的图形和源漏极的图形，其中，在所述基板上形成有源层的图形包括：在所述基板上形成第一有源层的图形和第二有源层的图形，所述第二有源层的图形位于所述第一有源层的图形与所述源漏极的图形之间，且所述第二有源层的载流子迁移率小于所述第一有源层的载流子迁移率。本发明通过将有源层分为第一有源层和第二有源层，并使靠近源漏极的第二有源层的载流子迁移率小于第一有源层，从而能够有效抑制由于制作有源层的材料具有过大的迁移率对TFT关态电流和阈值电压的影响。
The invention provides a thin film transistor and its manufacturing method, an array substrate, and a display device. The manufacturing method of the thin film transistor includes forming a gate pattern, a gate insulating layer pattern, an active layer pattern, and a source-drain pattern on the substrate. pole pattern, wherein forming the pattern of the active layer on the substrate includes: forming the pattern of the first active layer and the pattern of the second active layer on the substrate, and the pattern of the second active layer It is located between the pattern of the first active layer and the pattern of the source and drain electrodes, and the carrier mobility of the second active layer is smaller than that of the first active layer. The present invention can effectively suppress the Because the material for making the active layer has too large mobility, it affects the off-state current and threshold voltage of the TFT.
Description
Technical field
The present invention relates to display field, particularly relate to a kind of thin-film transistor and preparation method thereof, array base palte, display unit.
Background technology
At present, conventional panel display board comprises LCD (Liquid Crystal Display: display panels) and OLED (Organic Light-Emitting Diode: Organic Light Emitting Diode) display floater, no matter be LCD or OLED display panel, all comprise array base palte, array base palte comprises the image element circuit that multiple thin-film transistor (Thin Film Transistor: be called for short TFT) be arranged in array is formed, the corresponding sub-pixel unit of each image element circuit, thin-film transistor is as the control switch of display panel pixel, be directly connected to the developing direction of high performance flat display floater.
At present, thin-film transistor in array base palte comprises grid, source-drain electrode and the active layer be formed between source-drain electrode and grid, for improving the performance of display floater, need the carrier mobility as far as possible improving active layer, nitrogen zinc oxide (ZnON) material has very high mobility and good TFT characteristic, it is potential TFT excellent material of future generation, but, when using nitrogen zinc oxide material to be manufactured with active layer, because this material has excessive mobility, excessive and the threshold voltage (Vth) of TFT off-state current (Ioff) is easily caused to move greatly to negative bias, cause the serious deterioration of TFT characteristic.
Summary of the invention
(1) technical problem that will solve
The technical problem to be solved in the present invention is to provide a kind of thin-film transistor and preparation method thereof, array base palte, display unit, and the material owing to being manufactured with active layer can be suppressed to have the impact of excessive mobility on TFT off-state current and threshold voltage.
(2) technical scheme
For solving the problems of the technologies described above, technical scheme of the present invention provides a kind of manufacture method of thin-film transistor, be included in the figure of figure, the figure of gate insulator, the figure of active layer and source-drain electrode substrate being formed grid, wherein, the figure being formed with active layer on the substrate comprises:
Form the figure of the first active layer and the figure of the second active layer on the substrate, the figure of described second active layer is between the figure and the figure of described source-drain electrode of described first active layer, and the carrier mobility of described second active layer is less than the carrier mobility of described first active layer.
Further, the figure of the figure and the second active layer that form the first active layer on the substrate comprises:
Form metal oxide semiconductor films on the substrate;
Graphical treatment is carried out to described metal oxide semiconductor films;
Shallow-layer metal oxide semiconductor films after described graphical treatment being carried out to metal ion injects, the top section injecting metal ion in described metal oxide semiconductor films forms the second active layer, and the underclad portion not injecting metal ion in described metal oxide semiconductor films forms the first active layer.
Further, the material of described metal oxide semiconductor films comprises nitrogen zinc oxide, and described metal ion is one or more in gallium ion, aluminium ion, tin ion, hafnium ion.
Further, after the figure forming step of described active layer is positioned at the figure forming step of the figure of described grid, gate insulator, after the figure forming step of described source-drain electrode is positioned at the figure forming step of described active layer.
Further, after the figure forming described active layer, also comprise before forming the figure of described source-drain electrode: form etching barrier layer;
Also comprise after the figure forming described source-drain electrode: form protective layer.
For solving the problems of the technologies described above, present invention also offers a kind of thin-film transistor, comprise the figure of the figure of the grid that substrate and described substrate are formed, the figure of gate insulator, the figure of active layer and source-drain electrode, wherein, the figure of described active layer comprises the figure of the first active layer and the figure of the second active layer, the figure of described second active layer is between the figure and the figure of described source-drain electrode of described first active layer, and the carrier mobility of described second active layer is less than the carrier mobility of described first active layer.
Further, described first active layer is the metal oxide semiconductor material not injecting metal ion, and described second active layer is the metal oxide semiconductor material injecting metal ion.
Further, the material of described metal oxide semiconductor films comprises nitrogen zinc oxide, and described metal ion is one or more in gallium ion, aluminium ion, tin ion, hafnium ion.
Further, described grid, gate insulator are between described substrate and described active layer, and described active layer is between described source-drain electrode and described gate insulator.
Further, also comprise etching barrier layer and protective layer, above the described etching barrier layer active layer that between source electrode with drain electrode, gap is corresponding in described source-drain electrode, described protective layer is positioned at above described source-drain electrode.
For solving the problems of the technologies described above, present invention also offers a kind of array base palte, it is characterized in that, comprise above-mentioned arbitrary thin-film transistor.
For solving the problems of the technologies described above, present invention also offers a kind of display unit, comprising above-mentioned array base palte.
(3) beneficial effect
The present invention is by being divided into the first active layer and the second active layer by active layer, and make the carrier mobility of the second active layer near source-drain electrode be less than the first active layer, thus the material owing to being manufactured with active layer can be effectively suppressed to have the impact of excessive mobility on TFT off-state current (Ioff) and threshold voltage (Vth).
Accompanying drawing explanation
Fig. 1 is the flow chart of the manufacture method of a kind of thin-film transistor that embodiment of the present invention provides;
Fig. 2 is the flow chart of the manufacture method of the another kind of thin-film transistor that embodiment of the present invention provides;
Fig. 3-11 is the schematic diagrames of the making array base palte that embodiment of the present invention provides.
Embodiment
Below in conjunction with drawings and Examples, the specific embodiment of the present invention is described in further detail.Following examples for illustration of the present invention, but are not used for limiting the scope of the invention.
Embodiment of the present invention provides a kind of manufacture method of thin-film transistor, the manufacture method of this thin-film transistor is included in the figure of figure, the figure of gate insulator, the figure of active layer and source-drain electrode substrate being formed grid, wherein, the figure being formed with active layer on the substrate comprises:
Form the figure of the first active layer and the figure of the second active layer on the substrate, the figure of described second active layer is between the figure and the figure of described source-drain electrode of described first active layer, and the carrier mobility of described second active layer is less than the carrier mobility of described first active layer.
In embodiment of the present invention, the method that substrate is formed the figure of the first active layer and the second active layer comprises multiple, such as, first can make the first active layer by the first material on substrate, re-use the second material that carrier mobility is less than the first material and make the second active layer, preferably, the mode also injected by the shallow-layer of metal ion makes the first active layer and the second active layer, see Fig. 1, the method comprises:
S11: form metal oxide semiconductor films on the substrate;
S12: graphical treatment is carried out to described metal oxide semiconductor films;
S13: the shallow-layer metal oxide semiconductor films after described graphical treatment being carried out to metal ion injects, the top section injecting metal ion in described metal oxide semiconductor films forms the second active layer, and the underclad portion not injecting metal ion in described metal oxide semiconductor films forms the first active layer.
Preferably, the material of described metal oxide semiconductor films comprises nitrogen zinc oxide, and described metal ion is one or more in gallium ion, aluminium ion, tin ion, hafnium ion.
The manufacture method of the thin-film transistor that embodiment of the present invention provides, by active layer being divided into the first active layer and the second active layer, and make the carrier mobility of the second active layer near source-drain electrode be less than the first active layer, thus the material owing to being manufactured with active layer can be effectively suppressed to have the impact of excessive mobility on TFT off-state current (Ioff) and threshold voltage (Vth).
Be the flow chart of the manufacture method of a kind of thin-film transistor that embodiment of the present invention provides see Fig. 2, Fig. 2, comprise:
S21: form the figure of grid, the figure of gate insulator on substrate, particularly, see Fig. 3, first the deposition of grid material is carried out, form layer of metal film on substrate 1, carry out grid light shield technique subsequently, next carry out grid etch technique, photoresist is removed finally by stripping technology, complete the making of grid 2, then make the figure of gate insulator, particularly, see Fig. 4, pecvd process can be adopted to complete the making of gate insulator 3;
S22: form metal oxide semiconductor films on the substrate, particularly, see Fig. 5, gate insulator 3 can adopt magnetron sputtering apparatus prepare nitrogen zinc oxide (ZnON) film that hall mobility reaches more than 100cm2/Vs;
S23: carry out graphical treatment to described metal oxide semiconductor films, particularly, see Fig. 6, can adopt light shield and etching technics to realize graphical, be formed with the figure of active layer 110;
S24: the shallow-layer metal oxide semiconductor films after described graphical treatment being carried out to metal ion injects, the top section injecting metal ion in described metal oxide semiconductor films forms the second active layer, the underclad portion not injecting metal ion in described metal oxide semiconductor films forms the first active layer, particularly, see Fig. 7, gallium (Ga) ion pair active layer can be adopted to carry out shallow-layer injection, namely Ga ion implantation is carried out to the back of the body raceway groove side of active layer, make active layer 110 carry on the back raceway groove and be rich in a small amount of Ga atom, form the second active layer 112, the carrier concentration of nitrogen zinc-oxide film can be suppressed by Ga atom, thus prevent the partially negative of the rising of TFT off-state current and threshold voltage, and the nitrogen zinc oxide being positioned at lower floor does not inject Ga ion, thus can be used as the characteristic that primary electron transport layer can keep high mobility, form the first active layer 111, reduce the mobility loss because technique adjustment causes as far as possible, by above-mentioned shallow-layer ion implantation, the mobility of the ZnON TFT of preparation can be made to reach 50 ~ 100cm2/Vs,
S25: form etching barrier layer, particularly, see Fig. 8, first the thin-film material of one deck etching barrier layer is deposited, and by light shield (Photo) and etching (Etch) and peel off (Strip) technique carry out patterned process, complete the making of etching barrier layer 4 (ESL layer);
S26: the figure forming source-drain electrode, particularly, see Fig. 9, first depositing the thin-film material for making S/D electrode, carrying out S/D Photo technique subsequently, next carrying out S/D Etch, technique, finally carrying out strip technique, completing the making of source-drain electrode 5;
S27: form protective layer; particularly; see Figure 10, first deposit passivation layer protective film, carries out light shield, etching, stripping technology subsequently; via hole 61 is formed above drain electrode in source-drain electrode 6; complete the making of protective layer 6, then make pixel electrode 7 again, see Figure 11; pixel electrode 7 is contacted with drain electrode by above-mentioned via hole 61, finally completes the making that mobility can reach the TFT of 50 ~ 100cm2/Vs.
The manufacture method of the thin-film transistor that embodiment of the present invention provides, injected by shallow-layer metal oxide semiconductor films being carried out to metal ion, the top section of metal oxide semiconductor films is made to be rich in metal ion, the carrier concentration of effective suppression semiconductive thin film, reduce carrier mobility, form the second active layer, and underclad portion does not inject metal ion, still the carrier concentration that metal oxide semiconductor films self is higher is kept, form the first active layer, thus the material that can solve owing to being manufactured with active layer has the impact of excessive mobility on TFT off-state current (Ioff) and threshold voltage (Vth).
Embodiment of the present invention additionally provides a kind of thin-film transistor, comprise the figure of the figure of the grid that substrate and described substrate are formed, the figure of gate insulator, the figure of active layer and source-drain electrode, wherein, the figure of described active layer comprises the figure of the first active layer and the figure of the second active layer, the figure of described second active layer is between the figure and the figure of described source-drain electrode of described first active layer, and the carrier mobility of described second active layer is less than the carrier mobility of described first active layer.
Preferably, described first active layer is the metal oxide semiconductor material not injecting metal ion, and described second active layer is the metal oxide semiconductor material injecting metal ion.
Wherein, the material of described metal oxide semiconductor films comprises nitrogen zinc oxide, and described metal ion is one or more in gallium ion, aluminium ion, tin ion, hafnium ion.
Preferably, described grid, gate insulator are between described substrate and described active layer, and described active layer is between described source-drain electrode and described gate insulator.
Preferably, also comprise etching barrier layer and protective layer, above the described etching barrier layer active layer that between source electrode with drain electrode, gap is corresponding in described source-drain electrode, described protective layer is positioned at above described source-drain electrode.
The thin-film transistor that embodiment of the present invention provides, by active layer being divided into the first active layer and the second active layer, and make the carrier mobility of the second active layer near source-drain electrode be less than the first active layer, thus the material owing to being manufactured with active layer can be effectively suppressed to have the impact of excessive mobility on TFT off-state current (Ioff) and threshold voltage (Vth).
Present invention also offers a kind of display unit, comprise above-mentioned array base palte.The display unit that embodiment of the present invention provides can be any product or parts with Presentation Function such as note-book computer display screen, liquid crystal display, LCD TV, DPF, mobile phone, panel computer.
Above execution mode is only for illustration of the present invention; and be not limitation of the present invention; the those of ordinary skill of relevant technical field; without departing from the spirit and scope of the present invention; can also make a variety of changes and modification; therefore all equivalent technical schemes also belong to category of the present invention, and scope of patent protection of the present invention should be defined by the claims.
Claims (12)
1. a manufacture method for thin-film transistor, be included in the figure of figure, the figure of gate insulator, the figure of active layer and source-drain electrode substrate being formed grid, it is characterized in that, the figure being formed with active layer on the substrate comprises:
Form the figure of the first active layer and the figure of the second active layer on the substrate, the figure of described second active layer is between the figure and the figure of described source-drain electrode of described first active layer, and the carrier mobility of described second active layer is less than the carrier mobility of described first active layer.
2. the manufacture method of thin-film transistor according to claim 1, is characterized in that, the figure of the figure and the second active layer that form the first active layer on the substrate comprises:
Form metal oxide semiconductor films on the substrate;
Graphical treatment is carried out to described metal oxide semiconductor films;
Shallow-layer metal oxide semiconductor films after described graphical treatment being carried out to metal ion injects, the top section injecting metal ion in described metal oxide semiconductor films forms the second active layer, and the underclad portion not injecting metal ion in described metal oxide semiconductor films forms the first active layer.
3. the manufacture method of thin-film transistor according to claim 2, is characterized in that, the material of described metal oxide semiconductor films comprises nitrogen zinc oxide, and described metal ion is one or more in gallium ion, aluminium ion, tin ion, hafnium ion.
4. the manufacture method of thin-film transistor according to claim 1, it is characterized in that, after the figure forming step of described active layer is positioned at the figure forming step of the figure of described grid, gate insulator, after the figure forming step of described source-drain electrode is positioned at the figure forming step of described active layer.
5. the manufacture method of thin-film transistor according to claim 4, is characterized in that, after the figure forming described active layer, also comprises before forming the figure of described source-drain electrode: form etching barrier layer;
Also comprise after the figure forming described source-drain electrode: form protective layer.
6. a thin-film transistor, comprise the figure of the figure of the grid that substrate and described substrate are formed, the figure of gate insulator, the figure of active layer and source-drain electrode, it is characterized in that, the figure of described active layer comprises the figure of the first active layer and the figure of the second active layer, the figure of described second active layer is between the figure and the figure of described source-drain electrode of described first active layer, and the carrier mobility of described second active layer is less than the carrier mobility of described first active layer.
7. thin-film transistor according to claim 6, is characterized in that, described first active layer is the metal oxide semiconductor material not injecting metal ion, and described second active layer is the metal oxide semiconductor material injecting metal ion.
8. thin-film transistor according to claim 7, is characterized in that, the material of described metal oxide semiconductor films comprises nitrogen zinc oxide, and described metal ion is one or more in gallium ion, aluminium ion, tin ion, hafnium ion.
9. thin-film transistor according to claim 6, is characterized in that, described grid, gate insulator are between described substrate and described active layer, and described active layer is between described source-drain electrode and described gate insulator.
10. thin-film transistor according to claim 9; it is characterized in that; also comprise etching barrier layer and protective layer, above the described etching barrier layer active layer that between source electrode with drain electrode, gap is corresponding in described source-drain electrode, described protective layer is positioned at above described source-drain electrode.
11. 1 kinds of array base paltes, is characterized in that, comprise as arbitrary in claim 6-10 as described in thin-film transistor.
12. 1 kinds of display unit, is characterized in that, comprise array base palte as claimed in claim 11.
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| CN201410585136.3A CN104300007A (en) | 2014-10-27 | 2014-10-27 | Thin film transistor and manufacturing method thereof, array substrate as well as display device |
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| CN107316897B (en) * | 2017-06-28 | 2020-02-14 | 上海天马有机发光显示技术有限公司 | Display substrate, display device and manufacturing method of display substrate |
| CN112864231A (en) * | 2021-01-28 | 2021-05-28 | 合肥维信诺科技有限公司 | Thin film transistor, preparation method thereof, array substrate and display panel |
| CN115295564A (en) * | 2022-09-27 | 2022-11-04 | 广州华星光电半导体显示技术有限公司 | Array substrate and display panel |
| WO2023092562A1 (en) * | 2021-11-29 | 2023-06-01 | 京东方科技集团股份有限公司 | Metal oxide thin film transistor, and array substrate and preparation method therefor |
| WO2023184236A1 (en) * | 2022-03-30 | 2023-10-05 | 京东方科技集团股份有限公司 | Metal oxide thin film transistor, array substrate and display apparatus |
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Application publication date: 20150121 |