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CH533888A - Schaltungsanordnung zum automatischen Verhindern der Sättigung von Transistoren in Speicheranordnungen - Google Patents

Schaltungsanordnung zum automatischen Verhindern der Sättigung von Transistoren in Speicheranordnungen

Info

Publication number
CH533888A
CH533888A CH855672A CH855672A CH533888A CH 533888 A CH533888 A CH 533888A CH 855672 A CH855672 A CH 855672A CH 855672 A CH855672 A CH 855672A CH 533888 A CH533888 A CH 533888A
Authority
CH
Switzerland
Prior art keywords
saturation
transistors
circuit arrangement
memory arrays
automatically preventing
Prior art date
Application number
CH855672A
Other languages
English (en)
Inventor
Keller Guenter
Olderdissen Ulrich
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE19712135625 external-priority patent/DE2135625C/de
Application filed by Ibm filed Critical Ibm
Publication of CH533888A publication Critical patent/CH533888A/de

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/26—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback
    • H03K3/28—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback
    • H03K3/281—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator
    • H03K3/286—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/411—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only
    • G11C11/4116—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only with at least one cell access via separately connected emittors of said transistors or via multiple emittors, e.g. T2L, ECL
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/414—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/414—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
    • G11C11/416—Read-write [R-W] circuits 
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037—Bistable circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/26—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback
    • H03K3/28—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback
    • H03K3/281—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator
    • H03K3/286—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable
    • H03K3/288—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable using additional transistors in the input circuit
    • H03K3/2885—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable using additional transistors in the input circuit the input circuit having a differential configuration

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Static Random-Access Memory (AREA)
CH855672A 1971-07-16 1972-06-08 Schaltungsanordnung zum automatischen Verhindern der Sättigung von Transistoren in Speicheranordnungen CH533888A (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19712135625 DE2135625C (de) 1971-07-16 Schaltungsanordnung zur automa tischen Schreib Unterdrückung

Publications (1)

Publication Number Publication Date
CH533888A true CH533888A (de) 1973-02-15

Family

ID=5813914

Family Applications (1)

Application Number Title Priority Date Filing Date
CH855672A CH533888A (de) 1971-07-16 1972-06-08 Schaltungsanordnung zum automatischen Verhindern der Sättigung von Transistoren in Speicheranordnungen

Country Status (15)

Country Link
US (1) US3801965A (de)
JP (1) JPS5235499B1 (de)
AR (1) AR193884A1 (de)
AT (1) AT319637B (de)
AU (1) AU470472B2 (de)
BR (1) BR7204708D0 (de)
CA (1) CA986231A (de)
CH (1) CH533888A (de)
DE (1) DE2135625B1 (de)
ES (1) ES404058A1 (de)
FR (1) FR2146241B1 (de)
GB (1) GB1371686A (de)
IT (1) IT956633B (de)
NL (1) NL166813C (de)
SE (1) SE384755B (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4090258A (en) * 1976-12-29 1978-05-16 Westinghouse Electric Corp. MNOS non-volatile memory with write cycle suppression
DE2707297B1 (de) * 1977-02-19 1978-05-24 Felten & Guilleaume Carlswerk Verfahren zur Herstellung einer isolierenden Umhuellung aus vernetztem Isolierstoff
US4149270A (en) * 1977-09-26 1979-04-10 Westinghouse Electric Corp. Variable threshold device memory circuit having automatic refresh feature
US4224533A (en) * 1978-08-07 1980-09-23 Signetics Corporation Edge triggered flip flop with multiple clocked functions
FR2443723A1 (fr) * 1978-12-06 1980-07-04 Cii Honeywell Bull Dispositif de reduction du temps d'acces aux informations contenues dans une memoire d'un systeme de traitement de l'information
DE2926514A1 (de) * 1979-06-30 1981-01-15 Ibm Deutschland Elektrische speicheranordnung und verfahren zu ihrem betrieb
US4535428A (en) * 1983-03-10 1985-08-13 International Business Machines Corporation Multi-port register implementations
US4558433A (en) * 1983-05-31 1985-12-10 International Business Machines Corporation Multi-port register implementations
US4577292A (en) * 1983-05-31 1986-03-18 International Business Machines Corporation Support circuitry for multi-port systems
US4616347A (en) * 1983-05-31 1986-10-07 International Business Machines Corporation Multi-port system
US5218569A (en) 1991-02-08 1993-06-08 Banks Gerald J Electrically alterable non-volatile memory with n-bits per memory cell
US6002614A (en) 1991-02-08 1999-12-14 Btg International Inc. Memory apparatus including programmable non-volatile multi-bit memory cell, and apparatus and method for demarcating memory states of the cell
US6353554B1 (en) 1995-02-27 2002-03-05 Btg International Inc. Memory apparatus including programmable non-volatile multi-bit memory cell, and apparatus and method for demarcating memory states of the cell

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2876352A (en) * 1955-12-27 1959-03-03 Bell Telephone Labor Inc Self-correcting pulse circuits
US3008129A (en) * 1956-07-18 1961-11-07 Rca Corp Memory systems
US3311893A (en) * 1963-08-29 1967-03-28 Sperry Rand Corp Memory organization wherein only new data bits which are different from the old are recorded
US3413618A (en) * 1964-10-19 1968-11-26 Automatic Elect Lab Memory apparatus employing a plurality of digit registers
US3423737A (en) * 1965-06-21 1969-01-21 Ibm Nondestructive read transistor memory cell
US3504350A (en) * 1966-01-11 1970-03-31 Sperry Rand Corp Flip-flop memory with minimized interconnection wiring

Also Published As

Publication number Publication date
GB1371686A (en) 1974-10-23
AU470472B2 (en) 1973-12-20
ES404058A1 (es) 1975-06-01
AR193884A1 (es) 1973-05-31
AT319637B (de) 1974-12-27
AU4341572A (en) 1973-12-20
FR2146241A1 (de) 1973-03-02
IT956633B (it) 1973-10-10
US3801965A (en) 1974-04-02
SE384755B (sv) 1976-05-17
BR7204708D0 (pt) 1973-07-10
NL166813B (nl) 1981-04-15
NL166813C (nl) 1981-09-15
DE2135625B1 (de) 1973-01-04
NL7209577A (de) 1973-01-18
JPS5235499B1 (de) 1977-09-09
FR2146241B1 (de) 1976-10-29
CA986231A (en) 1976-03-23

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Legal Events

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