CH531258A - Halbleiteranordnung mit mindestens zwei Transistoren und Verfahren zur Herstellung derselben - Google Patents
Halbleiteranordnung mit mindestens zwei Transistoren und Verfahren zur Herstellung derselbenInfo
- Publication number
- CH531258A CH531258A CH887171A CH887171A CH531258A CH 531258 A CH531258 A CH 531258A CH 887171 A CH887171 A CH 887171A CH 887171 A CH887171 A CH 887171A CH 531258 A CH531258 A CH 531258A
- Authority
- CH
- Switzerland
- Prior art keywords
- transistors
- producing
- same
- semiconductor arrangement
- semiconductor
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
- H10D84/641—Combinations of only vertical BJTs
- H10D84/642—Combinations of non-inverted vertical BJTs of the same conductivity type having different characteristics, e.g. Darlington transistors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
- H03K19/086—Emitter coupled logic
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/26—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback
- H03K3/28—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback
- H03K3/281—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator
- H03K3/286—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable
- H03K3/2893—Bistables with hysteresis, e.g. Schmitt trigger
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
- H10D84/611—Combinations of BJTs and one or more of diodes, resistors or capacitors
- H10D84/613—Combinations of vertical BJTs and one or more of diodes, resistors or capacitors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
- H10D84/611—Combinations of BJTs and one or more of diodes, resistors or capacitors
- H10D84/613—Combinations of vertical BJTs and one or more of diodes, resistors or capacitors
- H10D84/615—Combinations of vertical BJTs and one or more of resistors or capacitors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
- H10D84/67—Complementary BJTs
- H10D84/673—Vertical complementary BJTs
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Bipolar Integrated Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Electronic Switches (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| NL7009089A NL7009089A (xx) | 1970-06-20 | 1970-06-20 | |
| NL7009090A NL7009090A (xx) | 1970-06-20 | 1970-06-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CH531258A true CH531258A (de) | 1972-11-30 |
Family
ID=26644553
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CH887171A CH531258A (de) | 1970-06-20 | 1971-06-17 | Halbleiteranordnung mit mindestens zwei Transistoren und Verfahren zur Herstellung derselben |
Country Status (7)
| Country | Link |
|---|---|
| BE (2) | BE768761A (xx) |
| CA (1) | CA965518A (xx) |
| CH (1) | CH531258A (xx) |
| DE (2) | DE2128934C3 (xx) |
| FR (2) | FR2095386B1 (xx) |
| GB (2) | GB1349101A (xx) |
| NL (2) | NL7009090A (xx) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2559323B1 (fr) * | 1984-02-08 | 1986-06-20 | Labo Electronique Physique | Circuit logique elementaire realise a l'aide de transistors a effet de champ en arseniure de gallium et compatible avec la technologie ecl 100 k |
| IT1218230B (it) * | 1988-04-28 | 1990-04-12 | Sgs Thomson Microelectronics | Procedimento per la formazione di un circuito integrato su un substrato di tipo n,comprendente transistori pnp e npn verticali e isolati fra loro |
| FR3099849B1 (fr) * | 2019-08-09 | 2021-08-27 | St Microelectronics Tours Sas | Dispositif de protection |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR1539043A (fr) * | 1967-06-30 | 1968-09-13 | Radiotechnique Coprim Rtc | Circuit intégré comportant un transistor et son procédé de fabrication |
| FR1539042A (fr) * | 1967-06-30 | 1968-09-13 | Radiotechnique Coprim Rtc | Procédé de fabrication de transistors dans un circuit intégré |
-
1970
- 1970-06-20 NL NL7009090A patent/NL7009090A/xx unknown
- 1970-06-20 NL NL7009089A patent/NL7009089A/xx unknown
-
1971
- 1971-06-11 DE DE2128934A patent/DE2128934C3/de not_active Expired
- 1971-06-11 DE DE19712128920 patent/DE2128920A1/de active Pending
- 1971-06-17 GB GB2844271A patent/GB1349101A/en not_active Expired
- 1971-06-17 GB GB2844171A patent/GB1354527A/en not_active Expired
- 1971-06-17 CA CA115,897A patent/CA965518A/en not_active Expired
- 1971-06-17 CH CH887171A patent/CH531258A/de not_active IP Right Cessation
- 1971-06-18 BE BE768761A patent/BE768761A/xx unknown
- 1971-06-18 FR FR7122281A patent/FR2095386B1/fr not_active Expired
- 1971-06-18 FR FR7122282A patent/FR2099227A5/fr not_active Expired
- 1971-06-18 BE BE768762A patent/BE768762A/xx unknown
Also Published As
| Publication number | Publication date |
|---|---|
| GB1349101A (en) | 1974-03-27 |
| GB1354527A (en) | 1974-06-05 |
| FR2095386B1 (xx) | 1977-04-22 |
| DE2128934A1 (de) | 1971-12-30 |
| CA965518A (en) | 1975-04-01 |
| DE2128920A1 (de) | 1971-12-30 |
| FR2099227A5 (xx) | 1972-03-10 |
| BE768762A (fr) | 1971-12-20 |
| DE2128934C3 (de) | 1980-02-14 |
| BE768761A (fr) | 1971-12-20 |
| DE2128934B2 (de) | 1979-06-13 |
| NL7009090A (xx) | 1971-12-22 |
| FR2095386A1 (xx) | 1972-02-11 |
| NL7009089A (xx) | 1971-12-22 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PL | Patent ceased |