CA2301345A1 - Frame capture - Google Patents

Description

FRAME CAPTURE
Field of the Invention The invention relates generally to image sensors , and more particularly to to frame capture in image sensors.
Background of the Invention Active pixel sensors (APS) consist of a photosensitive device coupled with an active element that uncouples the information storage device from the outside world.
A common APS pixel is a 3T (three transistor) pixel. The 3T pixel is structured in the following manner:
- a reset transistor is coupled to a photodiode - second transistor is configured as a source follower amplifier. Its gate is connected to a common node between the reset transistor and the photodiode.
- third transistor serves as an access transistor to allow a signal level to be transferred to a data line.
A signal level representative of the intensity of light impinging on the pixel can be readout as a proportion of the charge collected or discharged during a period of exposure. This exposure period is also know as the integration time and begins with the reset (i.e. drainage or replenishment) of all charges in the pixel and ends when the amount of charge remaining in the pixel is sampled in some manner.
Sensors can capture images using a number of techniques. Currently, the most common technique is popularly known as rolling shutter capture where one row of pixels is integrated at a time. Each row is reset in sequence and then sampled and read out, again in sequence.
Rolling shutter techniques are often fine for video applications. However, they are not always suitable for capturing still images. If the subject of the photograph is moving during the integration period, rolling shutter techniques result in a blurred image. As the subject moves, it is in a different position when each row is integrated. A solution to this problem is known as the frame capture method.
In frame capture, each row begins integration at the same time and then is readout sequentially. This means that each pixel must sample the amount of charge present at the end of the integration period and hold that charge until that row is readout. Therefore, each pixel must retain a fixed amount of charge for an extended period of time. As array sizes increase into the mega-pixel range, the amount of time required to readout the entire array is also growing. This obviously strains the limit of the charge retention capabilities of the pixels.
Traditional 3T pixels do not allow for the retention of charge. Various solutions have been proposed, including 4T and ST pixel configurations. These solutions store the charge in the pixel while isolating the storage node from the photodiode. Unfortunately, charge leakage is still a problem, especially in the case where light is impinging on the storage node which accelerates the leakage.
Therefore, there is a need to alleviate the charge leakage problem to the point that frame capture will be feasible.
Detailed Description of the Invention A number of embodiments for frame capture in accordance with the present invention will be described.
Analog Memorv Cell in the Pixel - By using a unity gain amplifier in conjunction with the pixel, the analog voltage on the storage node can be refreshed to maintain its original value. Basically, the voltage on the storage node is sampled by a unity gain amplifier and then refreshed by the feedback from the amplifier output.
Another embodiment may use unity gain amplifiers near the top of the array but gradually increase the gain farther down the array to compensate for the lower section's greater susceptibility to charge leakage (the rows in this section of the array need to hold charge for a longer period of time than those rows near the top of the array). However, it may not be feasible to form a refresh amplifier for each pixel with ,some process geometries. The extra circuitry would reduce the fill factor of the pixel and increase the size of the imaging array. An alternative solution is to refresh on a column by column basis. This would only require the addition of a few extra control/access transistors to the storage node and a few extra bus lines. Each pixel in .
a column would be accessed in sequence so that the value retained on its storage node would be sampled by a unity gain amplifier common to the entire column. The output of the amplifier would then be provided to the storage node as feedback before the access of the next pixel. The main challenge will be to perform the refresh of each column fast enough to have the desired effect.
LCD Shutter - Another possible solution is to place a layer of liquid crystal material over the sensor array. This layer of material would act like a shutter in that when a certain voltage level is applied to the layer, it is transparent to light. When this voltage level is removed, the layer is reflective. Therefore, when an image is to be captured, a certain voltage would be applied to the liquid crystal layer so that the pixels will be illuminated during the integration period. Once the integration period is complete, the voltage level would be removed from the liquid crystal layer so that light does not have access to the storage node. This should greatly reduce the amount of charge leakage.
Lookup Table - It should be possible to create a lookup table to allow the reconstruction of the incident light signal based on the light intensity and the position of the row in the array. In those areas of the array access later during readout, the voltage level would be lower for the same incident light due to charge leakage. If we assume that the incident light level is constant for the integration period and the readout time, we can calculate the charge collected during the integration period. This correction should provide a good image for a static scene but have some blurnng of the image when the light intensity is changing quickly.
Strobe Li It - By using a strobe light, one can imitate the results of frame capture techniques while actually using rolling shutter techniques. In a controlled environment, the area to be imaged can be kept very dark until it is time to capture the image. A light is then flashed on the target and an image is captured using the rolling shutter. Most of the target's motion would not be captured due tv the dark environment. This technique would be useful in a manufacturing environment to inspect parts passing by an imager on a conveyor belt.
Black Optical Shield and Substrate Polarization - Optical shielding can be included in the layout of the imaging array. This shielding would not cover the entire array but would be localized over the storage node sites. It would prevent light from striking the storage node while still allowing it to impinge on the photodiode. The combination of light shielding with substrate polarization. Substrate polarization involves placing a bias voltage on the substrate to sweep away any ambient charge capable of influencing the charge retention capabilities of the storage node.
Micro-lens - The use of micro-lenses to focus light onto the photodiodes is not unique. It is a common technique intended to reduce the effect of a low fill factor (i.e.
percentage of the pixel which is photosensitive). Focusing the light on the photosensitive area reduces the dependence of photovoltaic sensitivity on the fill factor. However, this technique can also be used in conjunction with some of the other techniques listed here to improve the charge retention capabilities of the storage node. The amount of charge leakage can be greatly reduced by focusing the light away from the storage node.
Pol~~oly Capacitor - The capacitor commonly used at the storage node is a poly-diffusion capacitor. While the capacitance of such a structure is relatively high, the large size of the diffusion region results in significant charge leakage.
This leakage accelerates when the diffusion region is exposed to light. Obviously, the larger the diffusion region, the more likely it is to be struck by photons of light. A
poly-poly capacitor would eliminate some of this leakage. One plate of the capacitor would need to be connected to a diffusion region but the size of the diffusion region could be dramatically reduced because it is not forming a capacitor plate. If DRAM
cell techniques were employed, a relatively large capacitance structure could be created in a small area.
Miller Effect Capacitor - Adding one transistor to the pixel can compensate for charge leakage if the Miller effect is taken into account. The gate of the extra transistor is connected to the storage node. Its source is connected to ground and its drain is connected to a current source. As charge begins to leak off of the storage node capacitor, the gate voltage of the transistor will drop. The resulting drop in the potential between the gate and source will cause the amount of current flowing through the transistor to decrease. The drain voltage will rise in response to the decrease in current. The drain voltage is coupled to the gate through the inherent gate-drain capacitance of the transistor. This negative feedback loop will compensate for leakage off the storage node as the capacitive coupling between the gate and drain will cause the gate voltage to rise with the drain voltage. This could also be explained by taking the Miller equivalent of the gate-drain capacitance. The equivalent capacitance in parallel with the capacitor at the storage node will greatly enhance the storage capabilities of the pixel.
Multiple Isolation Transistors - A certain amount of charge is lost from the storage node due to sub-threshold leakage across the isolation transistor. Sub-threshold leakage results even if the gate voltage is held at ground when the voltage between the source and drain exceeds a certain level. The concept is similar to that of a closed valve which leaks water if the pressure differential across the valve is great enough. Therefore, if there is a relatively high voltage retained on the storage node and the photodiode discharges its cathode to ground, the potential for sub-threshold leakage exists. However, additional isolation transistors would reduce this effect.
Even the addition of a second isolation transistor may reduce the sub-threshold ii leakage to a negligible level. The voltage between the source and drain of the first transistor may be large enough to cause sub-threshold leakage. In fact, the active area between the two isolation transistors will also drain ambient charges but it is unlikely that the voltage between the source and drain of the second transistor would be large enough to cause sub-threshold leakage.
While the invention has been described according to what is presently considered to be the most practical and preferred embodiments, it must be understood that the invention is not limited to the disclosed embodiments. Those ordinarily skilled in the art will understand that various modifications and equivalent structures and functions may be made without departing from the spirit and scope of the invention as defined in the claims. Therefore, the invention as defined in the claims must be accorded the broadest possible interpretation so as to encompass all such modifications and equivalent structures and fimctions.

Claims

What is claimed is:
Method or apparatus for frame capture as described in the disclosure .