CA1120288A - Electronic control for paper stock freeness tester - Google Patents

Abstract

ABSTRACT OF THE DISCLOSURE
An electronic control for a paper stock freeness tester. Probe-sensing means generate first and second signals when a filtrate in a filtrate chamber reaches first and second levels repectively. Cycle control and lad-der control circuits automatically and cyclically perform tests to determine the freeness of paper stock in response to these signals. An electronic free-ness measurement circuit uses the signals to measure accurately the time re-quired to accumulate a predetermined volume of filtrate in the filtrate cham-ber. The freeness measurement circuit in turn, energizes a recorder to pro-vide a freeness measurement or an input control signal to an analog control network in a closed loop control system.

Description

This invention generally relates to paper stock freeness testers and more specifically to an improved control system for such testers.
Paper stock freeness testers of the type to which the invention can be applied are fully described in United States Patent 3,186,215 of June 1, 1965 and United States Patent 3,538,749 of November ~0, 1971, both of which ; are assigned to the same assignee as the present invention.
As disclosed in those patents, a freeness tester generally comprises a closed-end standpipe divided by a screen into a stock intake chamber and a filtrate chamber, the standpipe forming part of a closed paper stock line.
In these testers, electro-pneumatic controls automatically and cyclically cause paper stock to rise in the intake chamber, form a fibrous mat on the screen and pass the filtrate through the screen into the filtrate chamber during a sampling operation. The filtrate, mat and stock are then forced out of the chamber into the stock line during a blowdown operation in read-iness for the next cyclic test.
The freeness, or drainage rate, is determined by measuring the time interval required to collect a predetermined volume of filtrate in the fil-trate chamber during the samplingoperation. In these prior freeness testers, two probes in the filtrate chamber, a small pressure tark in an instrument cabinet and a pressure measuring device coact to measure freeness. This tank is pressurized to a predetermined level during each blowdown operation.
During the next cycle, the incoming filtrate rises during the sampling oper-ation and eventually contacts a lower probe. The tank then vents to atmo-sphere through a restriction, so the pressure in the tank becomes a function of time. When the filtrate contacts the upper probe, the venting is stopped and the tank is isolated. The residual pressure in the isolated tank cor-responds to the freeness, and it is recorded.
It has been found that the environment in a conventional paper plant can adversely affect the measurements performed by this equipment. For ex-"

i38 ample, the contaminated air in these plants can cause various mechanical elements in the controls, such as valves and restrictions, to operate im-properly. This, in turn, can lead to inaccurate measurements. It also can lead to lack of repeatability; that is~ the ability to provide the same read-irgs under identical conditions at different times. These elec~ro-pneumatic controls also are complex to construct an~ install because they require the fabrication and assembly of tubing, valves and meters. This construction also increases the complexity and costs associated with normal maintanance.
Therefore, it is an object of this invention to provide an electron-ic control for a freeness tester which is more reliable than the prior electro-pneumatic controls.
Another object of this invention is to provide an electronic con-- trol for a freeness tester that provides more accurate readings than the prior electro-pneumatic controls.
Yet another objec~ of this invention is to provide an electronic control for a freeness tester which simplifies the installation of the free-ness tester in a paper stock line.
Still another object~of~this invention is to provide an electronic control for a freeness tester that simplifies the maintenance of the freeness tester.
; In accordance with this invention, probe means disposed in a fil-trate chamber generate first and second binary probe signals when the filtrate ; reaches first and second levels, respectively. Cycle control means regulate the operating cycle of the freeness tester in response to the probe signals while hybrid binary and analog electroric timing means respond to the probe signals by measuring accurately the time required for the filtrate chamber to accumulate a predetermined quantity of filtrate and producir,g a freeness signal that represents freeness of the stock. The freeness signal can be ap-plied to measurement devices or control circuits.

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According to one broad aspect oP the invention there is provided, in an automatic freeness tester of the type having a closed standpipe connected into a closed paper stock line, said standpipe being divided by a screen into a stock intake chamber and a filtrate chamber and admission means for admitting paper stock into said standpipe, the improvement of electronic control means for automatically performing cyclic tests to measure the freeness of the paper stock by passing a predeter-mined quantity of filtrate through a fibrous mat formed on the screen into said filtrate chamber, said measurement means including:
- A. probe means in said filtrate chamber for gener-ating first and second probe signals when the filtrate reaches first and second levels respectively in said filtrate chamber;
s. electronic cycle control means connected to said admission means and said probe means for establishing, in re-sponse to the probe signals, a first state during which filtrate enters said closed standpipe and a second state during which filtrate is e~pelled from said closed standpipe;
C. electronic timing means connected to said probe means and said cycle control means for measuring the time required to accumulate the predetermined volume of quantity in said filtrate chamber thereby to generate an electrical signal that corresponds to the freeness of the paper stock, said electronic timing means including electrical charging means that are charged to a prede-termined level during the second state and that are discharged during the first state; and D. measuring means connected to said timing means to indicate the freeness of the paper stock in response to the electrical signal.
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This invention is pointed out with particularity in the appended claims. The above and further objects and advantages o~ this invention may be better understood by referring to the following description taken in conjunction with the accompanyin~ drawings, in which:
Figure 1 is a pictorial view of a freeness tester that utilizes this invention;
Figure 2 is a block diagram of an automatic control circuit that incorporates this invention and that controls the operation of the freeness tester shown in Figure 1, Figure 3 is a detailed block diagram of the probe sensing and cycle control circuits shown in Figure 2;

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8~3 Figure 4 is a diagram of the ladder control circuit shown in Figure 2; and Figure 5 is a detailed circuit diagram of the freeness measurement circuit shown in Figure 2.
Now referring to Figure 1, the freeness testing apparatus of this invention is located in some portion of the paper stock system normally in rear of refiners and in advance of paper-making machines. Preferably it is located on a main paper stock line, such as stock line 10, that is supplied by the refiners. The freeness testing apparatus inc]udes a freeness tester, or detector 11, and a control and display cabinet 12. The detector 11 com-prises a vertical standpipe 13 of predetermined height and diameter having a vertical chamber within that standpipe 13. A lower end 14 of the standpipe 13 is erlarged to form a recess for accomodating any one o-f a plurality of replaceable rings, each ring supporting a mat-forming screen of any one of various predetermined mesh sizes. When the standpipe 13 is mounted vertically, the screen extends horizontally across the lower base portion of the chamber to separate fibers in the paper stock while permittirg the liquid filtrate from the stock to rise into a filtrate chamber in the standpipe 13.
Circuitry in the control cabinet 12, constructed in accordance with this invention, controls the testing operation. More specifically, if a switch 15 is energized, the control circuitry shown in Figure 2 begins cyclic tests that include alternate sampling and blowdown operations. These tests ; enable the freeness to be ascertained on a repetitive basis.
The filtrate chamber is normally filled with air under a specified pressure of a positive differential pressure to force the paper stock down-wardly until the entire standpipe is empty. A cycle control circuit 16 shown in ~igure 2 then actuates an air exhaust means to withdraw air from the upper portion of the chamber at the specified pressure to produce a negative dif-ferential pressure that permits the paper stock to rise into the standpipe 13.

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~ V~:8~3 The fibers in the stock are then screened out while the liquid ~`iltrate continues to rise into the filtrate chamber in the standpipe 13.
Referring again to Figure 1, in accordance with one aspect of this invention there are three electrical probes of different lengths disposed in-side the filtrate chamber. The longest probe, that depends to the lowest vertical position~ is a common probe 17. An intermediate probe 18 is defined as a lower probe, while the shortest probe 19 is an upper probe. The volume of filtrate that accumulates in the filtrate chamber 13 between the lower probe 18 and upper probe 19 has a predetermined volume and the time required for that volume of filtrate to accumulate indicates the freeness of the paper stock.
Referring again to Figure 2, the probes 17, 18 and 19 connect into a probe sensing circuit 20. Signals from the probe sensing circuit 20 con-trol the response of the cycle control circuit 16 and its associated lad-der control circuit 21 thereby to control the operating cycle for the tester. In addition, signals from the probe sensing circuit 20 and the cycle control circuit 16 are applied to a freeness measurement circuit 22 that accurately measures the time required to accumulate the predetermined volume of filtrate. In one embodiment of this invention, a freeness (FS~
signal that represents the freeness of the stock is coupled to a re-corder 23, also shown in Figlre 1. Such a system will then provide free-ness measurements.
In more sophisticated systems, the control cabinet 12 shown in Fig-ure 1 also will contain a proportional band controller 24 and a sample and hold circuit 25. The proportional band controller 24 utilizes the freeness (FS) signal~ The controller output adjusts the refining action of the refiners.
The sample and hold circuit 25 performs three functions. If more than one re~ïner is being controlled in response to a freeness signal, the sample and hold circuit 25 selects the motor rurning at the highest ~load level.

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It also holds the load signals at a constant level during each blowdown operation during which the standpipe 13 is evacuated. Finally, it maintains the output signal from the proportional band controller 24 at a constant level while the proportional band controller 24 is being updated during each blow-down operation. Thus, it will now be appreciated that the elec~ronic freeness measurement circuit 22 can be applied with relative ease to measurement cir-cuits including devices such as recorders or more complex analog process control systems.
Now referring to ~igure 3, the probe sensing circuit 20 connects to the three sensing probes in the filtrate chamber and converts the signals from these probes into binary signals. ~lore specifically, a NAND circuit 30 pro-duces a positive assertion UP signal when the filtrate contacts both the com-mon probe 17 and the upper probe 19. Likewise, a NAND circuit 31 produces a positive assertion LP signal when the liquid contacts the common probe 17 and the lower probe 18. An inversion circuit 32 produces a corresponding `- ground assertion signal. The common probe 17 also connects to a NAND circuit 33 through a switch 34. Normally the switch 34, which is used to initiate a ` manual blowdown operation, is in the position shown in Figure 3. Such a man-~ ual blowdown operation is described in more detail later. As shown in Figure ; 20 3, the switch 34 conditions the NAND circuit 33 so the CP signal is never as-serted during a normal testing cycle.
The remaining circuitry shown in Figure 3 forms the cycle control circuit 16 that controls the operating cycle and provides various signals to the freeness measurement circuit 22 and sample and hold circuit 25 as shown in Figure 2. ~ore specifically, when a blowdown operation has been completed and the standpipe has been completely evacuated, a sampling operation cycle begins. As previously indicated, the CP signal from the NAND circuit 33 is not asserted. Likewise, a BDT signal from a timer 34 also is not asserted at this time. Thus, an OR circuit 35 is de-energi~ed, so a BLO~WN signal is :: ,. . .

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not asserted. However, a SA~PLE signal from an inversion circuit 36 is as-serted. As shown in Figure 4, the SAMPLE signal conditions an amplifier 37 to turn on an indicating light 38 that is also shown in Figure 1. An AC
supply circuit 39 provides power to the amplifier 37 when the switch 15 is closed.
When the filtrate contacts the lower probe 18, the LP signal con-ditions an amplifier 40 in Figure 4 to turn on a light 41 also shown in Figure l. Thus both the lights 38 and 41 are energized simultaneously and continue to be energized until the liquid contacts the upper probe 19. The LP signal also initiates a timing operation as described later.
~ hen the filtrate contacts the upper probe 19, the NAND circuit 30 generates the UP signal and energizes OR circuits 42 and 43. The signal from the OR circuit 43 and the LP signal from the NAND circuit 31 then energize an AND circuit 44. This signal then energizes the timer 34~ a sec~nd timer 45 and an inversion circuit 46 that produces an SD signal. When either one of the timers 34 and 45 is energized, it immediately produces, or asserts, an output signal. When it is de-energized, the output signal will shift to a non-asserted level after an interval that is determined by components in the timer. Thus~ with the energization of the AND circuit 44, the timer 34 shifts ~`
the BDT signal to an asserted level, and the OR circuit 35 generates the BLOWDOWN signal. Simultaneously, *he SAMPLE signal from the inversion circuit 36 shifts to a non-ass_rted level. The timer 45 simultaneously produces a FLUSH signal.
When the S~MPLE signal terminates, the indicating light 38 in Figures 1 and 4 turns off. The ~LOWDOWN signal now energizes an amplifier 50 thereby to turn on an indicating light51 on the control panel 12 in Figure 1 and energize a solenoid 52 that controls a pressure regulating circuit so that positive pressure is appli~d to the detector to evacuate the filtrate chamber. The F~USH signal energizes an amplifier 53 and a flush solenoid 54 z~

thereby to produce a flushing operation.
During the BLOWDOWN operation, the filtrate level falls. First, the UP signal from the NAND circuit 30 shifts to a non-asserted level. This does not alter any operating conditions because the signal from the AND cir-cuit 44 is latched by feedback through the OR circuit 42.
l~hen the filtrate level falls below the lower probe 18, however, the LP signal shifts to a non-asserted level. m e indicator light 41 in Figures 1 and 4 turns off. The AND circuit 44 is disabled so the timers 34 and 45 begin to time out. However, the solenoid valves 52 and 54 in Figure 4 remain energized so the blowdown operation continues.
When the timer 45 times out, the FLUS~ signal shifts to a non-asserted level thereby de-energizing the flush solenoid 54. Next the timer 34 times out, so the BLOI~DO~N signal terminates. Now the inversion circuit 36 produces the SA~LE signal thereby to begin the next measurement cycle.
As previously indicated, the inversion circuit 46 in Figure 3 pro-duces an SD signal that is coupled to the freeness measurement circuit 22 in Figure 2 along with the LP signal from the NAND circuit 31. In addition, -~
when the filtrate falls below the lower probe 18 during a blowdown operation, a NAND circuit 55 produces a S~ signal that is coupled to the sample and hold circuit 25 thereby to disable its response to any input variations and to enable the proportional band controller 24 in Figure 2 to be updated.
Now referrirg to Figure 5, the freeness measurement circuit 22 comprises an accurate timing circuit for measuring the interval that is re-quired for the filtrate to rise betwèen the levels defined by the lower probe 18 and upper probe 19 (Figure 3). More specifically, during each sampling operation, the assertion of the LP signal causes a transistor switching cir-cuit 60 to turn off a switch comprising a filled effect transistor 61. Simul-taneously, the SD signal from the inversion circuit 46 in Figure 3 turns off another switching transistor 62, so a transistor 63 and a field effect tran-_ g _ , - : . . . . .
~.; :` ' i .~ 8 sistor 64 are both conductive. The field effect transistor 64 enables a measuring capacitor 65 to discharge through a range resistor 66 that de-termines the discharge rate.
When the filtrate reaches the upper probe 19 in Figure 2, the SD
signal shifts to a non-asserted state. This energizes the transistor 62, so the transistor 63 and the field effect transistor 64 both turn off thereby to isolate the capacitor 65. Simultaneously, however, the transistor 62 turns on a pair of field effect transistors 70 and 7t.
In accordance with a specific embodiment of this invention, the drain electrode of the transistor 70 connects to the capacitor 65 while the drain electrode of the field effect transistor 71 connects through a resistor 72 to an operational amplifier 73. The source electrodes of the two field effect transistor 70 and 71 are connected together. When the field effect transistors 70 and 71 conduct, amplifier 73 drives a voltage follower circuit 74 to a level dependent upon the residual charge on the capacitor 65. This is designated as the freeness signal (FS) that represents stock freeness. It is coupled to the recorder 23 and to the proportional band controller 2~ in the circuitry of Figure 2.
During the blowdown operation, the filtrate eventually drops below the level of the lower probe 18 in Figure 3 thereby terminating the LP signal.
~hen this occurs, the transistor 60 turns on and enables an adjustable, fixed-voltage reference circuit 75 to charge the capacitor 65 to a predetermined level by turnir~s on the field effect transistor 61. A variable resistor 76 in a negative feedback control circuit for the source 75 determines the charge that is applied. When the filtrate again rises to the lower probe 18 during the succeedin~s sampling operation, the switching transistor 60 turns off the field effect transistor 61 and immediately allows the capacitor 65 to begin discharging through the range resistor 66.
The field effect transistors 70 and 71 provide advantages when z~

they are connected in the configuration shown in Figure 5. As known, 1eakage currents normally appear in field effect transistors. In this configuration, these internal leakage currents balance. This improves -the accuracy of the subsequent measurement of the charge on the capacitor 65 because the balanced leakage currents have no effect upon the freeness signal. Also, the input impedance to an operational amplifier is measured in the order of megohms.
However, the two field effect transisto~ 70 and 71 in a non-conductive state provides an input impedance to the input amplifier 73 in the order of 10 to the lO1 ohms. There is essentially no leakage from the measurement capacitor 65 into this ampliier circuitry during the charging and discharging opera-tions. Thus, the residual charge that is left on the capacitor 65 when the field effect transistor 64 turns off accurately reflects the time required to accumulate the predetermined volume of filtrate.
When it is desired to evacuate the detector standpipe 13 manually, an operator depresses the switch 34 in Figure 3. So long as the filtrate contacts the common probe 17, the NAND circuit 33 generates the CP signal that, in turn, energizes the OR circuit 35 and produces the BLOWDOWN signal.
The ~R circuit 43 is energized, so the AND circuit 44 energizes the timers 34 and 45. The inversion circuit 46 disables the freeness measurement circuit 22 during this ma~lal operation. When the filtrate falls below the lower probe 17, the timer 45 is de-energized, so it controls the termination of the FLUSH signal. ~hen the operator susequently rele~ses the s~itch 34, normal testing operations can resume after the signal from the timer 34 shifts to a non-asserted level.
From the foregoing description, it will be apparent that many of the reliability and repeatability problems encountered with pri~r electro-pneu-matic controls are overcome by this particular circuit. This controller eliminates many of the pneumatic connections that had to be made with the prior controller and therefore facilitates i~s installation and initial ad-:. ` ~ ` : ,,: -. ' ~Z~288 justment. Moreover~ as shown in Figure 5~ there are a number of metering points P~-1 through MP-4 that can be connected through a selective switching circuit to an electrical voltmeter 80 that can be mounted to the face of a control panel 12 shown in Figure 1. Maintenance is thereby facilitated be-cause it is a simple matter to monitor any of these points on an individual basis.
The foregoing discussion describes a specific embodiment of this invention. It will be apparent, however, that a number of different circuit arrangements can be u~ed in place of the specifically disclosed circuitry - 10 with the attainment of some or all of the foregoing advantages of this in-vention. Therefore, it is the intent of the appended claims to cover all such variations and modifications as come within the true spirit and scope of this invention.

Claims (9)

THE EMBODIMENTS OF THE INVENTION IN WHICH AN EXCLUSIVE
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:

1. In an automatic freeness tester of the type having a closed stand-pipe connected into a closed paper stock line, said standpipe being divided by a screen into a stock intake chamber and a filtrate chamber and admission means for admitting paper stock into said standpipe, the improvement of elec-tronic control means for automatically performing cyclic tests to measure the freeness of the paper stock by passing a predetermined quantity of fil-trate through a fibrous mat formed on the screen into said filtrate chamber, said measurement means including:
A. probe means in said filtrate chamber for generating first and second probe signals when the filtrate reaches first and second levels re-spectively in said filtrate chamber, B. electronic cycle control means connected to said admission means and said probe means for establishing, in response to the probe signals, a first state during which filtrate enters said closed standpipe and a second state during which filtrate is expelled from said closed standpipe, C. electronic timing means connected to said probe means and said cycle control means for measuring the time required to accumulate the pre-determined volume of quantity in said filtrate chamber thereby to generate an electrical signal that correxponds to the freeness of the paper stock, said electronic timing means including electrical charging means that are charged to a predetermined level during the second state and that are discharged during the first state, and D. measuring means connected to said timing means to indicate the free ness of the paper stock in response to the electrical signal.

2. A freeness tester as recited in claim 1 wherein said cycle control means defines a sample operation during the first state and a blowdown opera-tion during the second state and wherein:
C. said charging means in said timing means includes:
i. a charge storage means, ii. charging means connected to said charge storage means for charging said storage means to a predetermined level during each blowdown operation, and iii. discharge means connected to said charge storage means for discharging said storage means during each sample operation, and D. said measuring means is connected to said charge storage means and said cycle control means for measuring the residual charge in said charge storage means upon completion of each sample cycle, the residual charge rep-resenting the freeness of the paper stock.

3. A freeness tester as recited in claim 2 wherein said residual charge measuring means includes switch means that are rendered conductive upon com-pletion of the sample operation and means for generating a freeness signal having a voltage that is dependent upon the charge on said charge storage means.

4. A freeness tester as recited in claim 3 wherein said switch means comprises first and second field effect transistors connected in series with the source electrodes of each said field effect transistor being interconnect-ed, the drain electrode of one field effect transistor being connected to said storage means and the other drain electrode being connected to said freeness signal generating means.

5. A freeness tester as recited in claim 3 additionally comprising recording means connected to said amplifier means for recording the level of the freeness signal.

6. A freeness tester as recited in claim 3 for operation in a control system that includes feedback means for generating a feedback signal, said freeness tester additionally comprising analog process control means connected to said measurement means and to said feedback means for controlling the process.

7. A freeness tester as recited in claim 3 wherein said charge storage means comprises a capacitor and said dis-charge means comprises switching transistor means connected to said cycle control means and resistance means connected to said capacitor.

8. A freeness tester as recited in claim 3 wherein said charging means comprises a reference voltage source and a field effect transistor connected to said probe means, said reference voltage source and said charge storage means, said field effect transistor being responsive to the first signal from said probe means for charging the capacitor until the filtrate reaches said first probe means.

9. A freeness as recited in claim 1 wherein said electronic cycle control means includes first and second timers and logic means connected to said probe means and said timers for enabling said first and second timers while the filtrate contacts only said first probe means.