CA1048106A - Power monitoring and load shedding system - Google Patents
Power monitoring and load shedding systemInfo
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- CA1048106A CA1048106A CA256,959A CA256959A CA1048106A CA 1048106 A CA1048106 A CA 1048106A CA 256959 A CA256959 A CA 256959A CA 1048106 A CA1048106 A CA 1048106A
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Abstract
ABSTRACT
An electrical power controlling/load shedding system includes power consumption metering and meter interfacing circuitry for entering overall power consumption into a central processing unit. The CPU memory includes a data storage table characterizing each system electrical load under each of a hierarchy of operational levels, and circuitry is provided for turning local and remote loads on/off, responsive to CPU-issued commands.
The digital computing apparatus operates on the meter supplied information and projects energy consumption over the monitoring interval. If power must be shed to obviate an excessive projected demand, loads are examined seriatim and selectively shed on a priority basis as required, depending upon the operational parameters and status characterizing each load for the then pre-vailing load level condition.
An electrical power controlling/load shedding system includes power consumption metering and meter interfacing circuitry for entering overall power consumption into a central processing unit. The CPU memory includes a data storage table characterizing each system electrical load under each of a hierarchy of operational levels, and circuitry is provided for turning local and remote loads on/off, responsive to CPU-issued commands.
The digital computing apparatus operates on the meter supplied information and projects energy consumption over the monitoring interval. If power must be shed to obviate an excessive projected demand, loads are examined seriatim and selectively shed on a priority basis as required, depending upon the operational parameters and status characterizing each load for the then pre-vailing load level condition.
Description
~L0fl~ 6 DISCLOSUR~ OF TliE INVENTION
This invention relates to electronic power monitoring/regulation systems and, more specifically, to s~ored program controlled apparatus for selectively shedding power loads to maintain energy consumed during each monitoring interval withinprescribed bounds.
The cost of electrical energy is an i~portant economic expense factor in many industrial installations and applications ~- a matter rein-forced by the marked fuel charge increase of recent years passed along by electrical utilities to their consumers. The cost of A.C. electrical energy paid by industry i5 dependent, as a generality, upon both energy (e.g. measured in kilowatt hours) consumed over a billing period ~e.g., a month), and also the peak power consumption rate ~e.g., the greatest number of kilowatt hours consumed during any 15 minute or half-hour period, or the like). The specific billing practices of utilities differ but all to the same effect of penalizing a power consumer who has a high peak power consump-tion rate Yis-a-vis total power consumed. This charging practice, of course, assures an adequate return for power companies which must install capital generating equipment to satisfy peak rather than average demand.
Thus, an industrial consumer which consumes electrical power at a high ra~e, even for a very short periot of time, will be subject to a severe increase in its total power costs -- in some areas applied as a higher rate applied to energy consumed by the user.
According to this invention there is provided in combination in a power load shedding systs~ for controlling the operative status of plural con~rollable system loacls each selectively connectable to a souTce of energy, comprising stored program controlled digital computer means including a central processing unit and memory means communicating with said central processing means, said memory means including data storage means for each load for storing the characteris~ics and status of the associated load, plur-al controlled switch means for selectively connecting and disconnecting the controllable system loads with the energy source, control circuitry respon-sive to signals issued by said computer means for controlling the s~atus - 1 - ~.~
~`~
, , . ~ . ~ .
.:
of said controlled switch means, and means for signaling to said computer means ~he power being consumed by the syste:m loads, said computer means including means for projecting energy cons~lmption over a measuring interYal, excessive power signaling means for compari.ng said projected energy consu~pt-ion wi~h a permissible bound therefor and for signaling when the projccted consumption exceeds said permissible bound therefor, load shedding means responsive ~o said excessive power signaling means indica~ing an excessive energy consumption projection for examining said data storage means for the system loads in said memury means for selectively operating said controlled switch means via said control circuitry to operatively disconnect selected system loads from ~he energy source, wherein said data storage means for each load includes means for storing plural values for at least one load descriptor each operative for a distinct operational level, and said memory means incl~des means defining ~he ~hen obtaining operational le~el.
It is thus an object of the p~esent invention to proYid0 an improv-ed power control system.
More specifically, it is an objec~ of the present invention to provide apparatus for monitoring power consumed, and for shedding A.C. or D.C. loads to maintain power çonsumed over each monitoring interval within prescribed bounds.
I~ is another objec~ of the present invention to provide a po~er monitoring/regulation system in which the characteris~ics (and use priority) of each system load can be redefined as desired, as pursuant ~o passage of time, und0r external sensor stimulus te.g. tempgrature, process rate or the like), or under local or distant man~al entry, as via a teletypewriter.
It is yet ~mother object of ~he presen~ invention that power con-troller apparatus be expandable, and control loads and load con~rollers physically disposed at local and remote locations.
The above and other objects of the present invention are realized in a specific, illustrativP power controlling/load shedding system which includes power consumption metering and ~eter interfacing circui~ry for entering overall power consumption into a central processing unit. The CPU
~41~6 memory includes a data storage table characterizing each system electrical load under each of a hierarehy of operational levels, and circuitry is pro-vided for the CPV to turn local and remote loads Dn and off in accordance with stored energy consump~ion projecting and load shedding algorithms.
In brief, ~he digi~al computing apparatus operates on the meter supplied information and projects energy consumption o~er ~ach of successive monitoring intervals. If power must be shed to obviate an excessive project-ed demand, loads are examined seriatim and selectively shed on a monotonically increasing priori~y basis as required, depending upon the opera~ionalpara-meters and status of each load for the then p~e~ailing load level condition.
The above and other features and advantages of the present invent-ion will become more clear from the ollowing detailed description of specific, illustrative power monitoring and load controlling apparatus, presented in conjunction with the accomp~nying drawing, in which:
Figures lA and B are respectively the lef* and right portions of a composite power monitoring and load shedding system in accordance with the principals of the present invention; - -Figure 2 is a flow chart illustrating data processing to project line energy consumption over a monitoring int~rval, and for defining load shedding requirements; and Figure 3 is a flow chart characterizing a data processing SHED
algorithm selectively disabling system loads as required.
Referring now to Figures lA and B hereinafter referred to as composite Figure 1, there is shown a power monitoring and load shedding system embodying the principals of the present invention, which includes a power meter 10 for monitoring the power consumed by an array of system loads 661-66n energized by an A.C. power source S9 via a power distribution bus 62. The power meter lO supplies as a first output on a lead 12 info~mation indicative of the rate energy is being consumed by the sys~em loads 66, typically in the fo~l of a sequence of pulses where each pulse repres~nts a predetermined quantum of energy. The powe~ meter 10 will also typically supply at an output lead 14 synchronizing informa~ion identifying the ralat- :
.~ , .
-ively short period over which the energy conswned is ~o be determined.
Thus, for example, Nhere energy consumption is monitored on the basis of ifteen minute intervals, the sync line 14 will be activated once every fifteen minu~es. Alternatively, the monitoring periods may correspond ~o real time in~ervals ~e.g., every quarter hour) are signalled by a real time clock 41 discussed below.
It will be recalled that the charge for industrial power has a fac~or dependant upon the peak power consumed during any mon~tored interval.
Accordingly, as an overall desideratum, the sys~em operates to avoidexcessive peak energy consumption during any monitoring interval signalled by the sync output of the meter 10. This is effected as a generality by modulating the on/off status of lower priority loads to shift a portion of the ~nergy requirements for such loads ~o periods when A.C. loads of a higher order of significance exhibit lower demand requirements.
To this end, demand meter interface circuitry 20 receives the power 12 and synchroni~ing 14 output informa~ion from the power meter 10 and passes this data to a digital computer 30. As shown, the compu~er 30 employs a central processing unit 31 and a memory 32 for receiving and operating upon the power consumption informa~ion via a peripheral interface adapter ~P.I.A.) 33 and common data and addr~ss busses 43 and 44. The particular structur~
shown for the digital computer 30 in Figure 1 (to include a series of priority interrupts 35 passing to a priority intarrupt encoder 34) is merely illustrative and may be i~plemented by a range of processor organizations including standard general purpose computers, mini-compu~ers and micro-processor configurations. For examplel the minicomputer vended by the ass-ignee of the instant application under the trade style MAC 16 may well be utilized.
In accordance with conventional common data and address bus 43 and 44 computer operation, the demand meter interface circuitry 20 ~as well as contact point and control circuitry 48, status circuitry 70, sensor(s) 42 and a remote coupler 73, all discussed below) are treated as peripherals connected to the system busses 43 and 44 for selection and connection-unilateral or bilateral as required, with the ~omputer 30 and CPU 31 in particular.
To this end, the demand meter interface circuitry 20 includes a counter 22 advanced by the energy consumption signalling pulses supplied by the meter 10, and a sta~us rsgister 24 (e.g., a simple flip-flop) which is set when each new sync pulse is received from the meter 10 via the lead 14.
The output from the counter 22 and sta~us register 24 are selectively gated by gate circuitry 26 onto the data bus when the interface circuitry 20 is addressed by the computer 30 via the address bus 44. Again as ~ se con-ventional for common bus computer cooperation for "peripheral" selec~ion, the interface circuitry 20 includes an address decoder 27 connected to the address bus 44 to determine whether the circuitry 20 is being polled by the CPU 21 and, if so, to enable the gate Z6 to multiplex the counter 22 and status register 24 contents onto the data bus 43 for communication to the CPU 31. A delay element 2S operates to clear the status register 24 te.g.
reset a status flip-flop) at the conclusion of each polling cycle. In ~his manner, a computer variable aseribed the mnemonic name "PCTR", identifying the count state of the counter 22, is loaded into an appropriate storage cell (schematically denominated PCTR) via the central processing unit 31.
Contact point and control circuitry 48 is employed ~o actuatet disable t~e controllable system power consuming loads 66. There may, and generally will be p~wer-draining loads conn~c~ed to th~ power source 59 which may not be s~itched on or off by tha CPU 31. The pOWeT consumed by such loads is, of course, reflected in the output of power meter 10 and thus taken into account by thc instant apparatus. However~ beyond thls observat-ion such loads are not further considered.
The contact point and control circuit 48 includes a control regis-ter 49 loaded via the data bus 43 when the circuitry 48 is identified by the contents of the address bus 44. As again is ~ se conventional in the common bus digital co~puter field, each of the circuits communicating with the CPU 31 via the common busses 33 and 34, e.g., the circuitry 20, 42, 48 70 and 73 herein discussed, each includes an address decoder compa~able to the d~coder 27 shown in ~he meter interface circuitry 2~ specifically dis-cussed above (each decoder, of course, being adapted to respond ~o unique digital address word). Each address decoder responds to computer 30 gener-ated address signals on the address bus 44 which identify when that "peripheral" item is selected by the computer 30 fDr communications therewith and appropriately connect the selected peripheral to the da~a bus ras via gating 26 shown for the interface circuitry 20). The apparatus comparable to the address decoder 27 and multiplexing elements 26 discussed in conjunct-ion with ~hs meter interface circuitry 20 will hereinbelow be presumed to be included in all apparatus connected to the common data and address busses 43 and 44 (and to any remote data and address busses 43' and 44') and will not be further considered.
Re~urning now to the specific operation of the contact point and control circuitry 48, the i-th stage of the register 49 selectively energiz-es/de-energizes the cGil 50i of a relay 49i for selectively controllin~ the energized/de-energized state of a corresponding load 66i. The load 66i is selectively connect~d to the source of A.C. power 59 via a power contacts 65i of a relay 60i having a relay activating coil 61i. The relay coil 61 is selectively connected by one transfer switch member 54i of a two pole, three position switch 53i and a normally open contacts 51i of the relay 49i.
To illus~rate load control by way of specific example, and with - the double switch 531 in its uppermost posi~ion in the drawing, whan the i-th stage of the register 49 signals that the load 661 is to be energized, it presents an appropriate binary digit, e.g., a binary "1". This output bit energizes the coil 51~ either directly for a sensitive relay ~r indir-ectly via a buffer amplifier or gate (not shown) ~hus actuating the relay contacts 511. The closed contacts 511 complete an energizing circuit path for the relay 601 located about the load 661 location via normally closed contac~s 631 (discussed below). The energized relay 601 closss normally open contacts 651 thus completing the circuit from the A.C. pQWer source 59 to the load 661.
Correspondingly, if a "power off" bit (e.g., a"0") is present a~
the i-th stage of regis~er 49, the relays 60i and 49i are unenergized, and the load 66i is disconnected fromthe power source 59 Yia opçned contac~s 65i.
The normally closed contacts 63i may be disposed about the load area to disable a relay 60i (and thereby aLlso the load 66i) independent of the ou~put of the prooesser 31 as loaded i.nto the register 49. Thus, for ex-ample, the contacts 63i may co~prise an emergency switch, the ou~pu~ of a loc-al sensor to signal overload or excessive te~pera~ure conditions, or the like.
The second pole 55i of each switch 53i in ~he contact point and control circuitry 48 is coupled as an input by a conductor 56i to a register 71 in status circuitry 70, as is a signal passing through a second signal level ~e.g., "dry") contact 64i of the load controlling relay 60i via a con-ductor 67i. The signal conveyed to ~he register 71 by ~he conductor 56i reports to the CPU 31 whether or no~ the load 66i is capable of being con~rol-led by ~he co~puter 30, i.e., operated or shed as required. To this end, no~.e that if the double pole switch 53i is in other than its uppermost positionJ
the load 66i cannot be controlled by the CPU 31 which no longer has aceess to the relay 60i. This fact is reported to register 71 by the swi~ch ~ransfer member 55i which supplies a ground signal (a binary "Q" for commonplace cur-rent sinking integrated circui~ logic) when switch 53i is in its uppermost position, and an open circui~ signal (a "1") otherwise.
Si~ilarly, the ground/open signal reported ~o the register 71 Yia contact 64i and lead 67i confirm to the CPU 31 ~he actual sta~e oÇ a con-trolled load 66i9 independent of the co~mand issued therefor by the computer 30. To this end, note that the compu~eT 30 ma~ signal that load 66i be energized whenJ in ~'act, the lo~d may be unenergized, as by an opening of ~he contac~s 63i because of some locally pre~ailing condltion at the load 66i, because of a system aul~ in circuitry 48, a severed conductor, or the like.
Accordingly, the above described sys~em apparatus is fully effect-ive ~o load power consumption and synchronizing information from the meter 10 into the CPU 31 and memory 32, to issue commands from the memory - CPU 31, 32 to turn each c~ntrolled load 661-~6n on or off, and to monitor ~he status .- thereof via the stat~s circuitry 70.
~ - 7 -~; .
By way of additional system apparatus, the compu~r 30 includes a priority in~errupt encoder 34 ~o directly input into ~he central processing unit 31 on a priority basis a si~nal from circuitry 36 signalling that po~er has failed; messages supplied by external peripheral units 38, e.g., a teletypewri~er; and time of day information supplied by a real time clock 41. Again, as well known to those skilled in the are, the informa~ional sources 36, 38, 41 ~ay alternatively be connected as additional "peripherals"
to the busses 33 and 34 rather than supply information via the CPU interrupt port (and the "peripheral" items connected as priority interrupts with or without direct memory access). Also, ~here a mini-computer is employed with priority interrupt capability (such as the aforementioned LEC 16 assemblage~, no separate priority interrupt encoder 34 ne0d be employed.
The Figure 1 system further includes sensors 42, e.g., connected as a peripheral, to *he da*a and address busses 43 and 44 to supply thereto signals characterizing those parameters of the controlled industrial plant which are of interest in making power shedding decisions. For example, such parameters may comprise ambient temperature twhich may, for example, establ-ish priorities for heating/cooling A.C. loads), plant process rate, product mix, or the like.
In accordance with one aspect of the present invention, the above considered apparatus may be employed as well to control loads disposed in locations spatially remD~e from ~he CPU 31, e.g. loads 66' and 66". To this end, si~nal coupling apparatus connects the busses 43 and 44 with a remote system controller 82 which, in turn, operates remote data 43' and address 44' busses in a manner comparable to the busses 43 and 44 directly controlled by the computer 30. Connected to the busses 43' and 44' are d~mand meter inter-face circuitry 20' connected to a load 66l monitoring power meter 10' (the A.C. source and relays comparable to relays 60' being deleted for clarity)>
contact point and control circuitry 48' and status circuitry 70' which per-form in a manner directly analagous to the like unprime-numbered elements discussed above. Thus, for example, a r~mote coupler 73 including a UA~T 74 (universal asyncronous receiver and transmitter), versions of which are ' available from several different manufacturers inintegrated circui~ form, may be employed to communicate wi~h a UART 84 in the remote system controller 82~ For communication over an extended distance, modems 79 and 80 are employed, Nith date signalling being effected over a duplex circuit 76, 78.
l~ere long dis~ance communications are no~ required, the output of the UART
74 may be directly connec~ed to the remote system control 82 for controlling power lDads.
Remote system con~roller 82 may simply include an address decoder 87 for identifying that it is the peripheral being addressed by the compute~
30 and for enabling a command decoder 89 to enable a sequencer 90, e.g., a counter-decodPr combination to actuate ~he interface circuitry 20', circuitry 48' and 70' in turn via the remote address bus 44' for communication with the CPU 31 via ~he remote data bus 43', a data register 86, and the UART
84-T0-UART 74 communica~ions link.
Yet, further, loads 66" may be controlled via a remote multiplexer peripheral 102 connected to any of ~he system data, address buss~s 43~ 44, or 43', 44', whichever is more physically convenienttoa load 66". The remote multiplexer 10~ operates as a "powerless" remote in the sense of supplying A.C. power from a power source 106 ~o loads 66" as well as control informat-ion. To this end, multiplexer 102 includes an encoder to encode the bus 43', 44' information in a manner suitable for mul~iplexing ~ith 60 cycle A.C.
power from source 106, as for delivery on a twisted paiT 111. Such power/
signal multiplexing may be effected in varying ways well known to those skilled in t~ art, e.g., by utilizing frequency division multiplexing as where the encoder parforms froquency shift keying, ampli~ude or frequensy modulatiDn, PCM, PAM, or the like.
At the load location, a powerless remote terminal 110 includes a separation filter 112 for d~livering the low frequcncy A.C. power ~o latch and relay circuitry 118, and for ~upplying the control information to a de-coder 115. She decoder 115 enters data in the latch tregister~ portion of circuitry 118 which effec~s a control func~ion to dcliver the A.C. power to those of the array of controlled loads 66" which are to be turned on in _ 9 _ ~, .
.
.
accordance with ~he info~nation last supplied by ~he decoder 115.
Thus, the composi~e Figure 1 apparatus includes all requisite struc~ures for monitoring and controlling loads 66, 66' and 66" in local and remote locations - eYen where A.C. energy may not otherwise be available.
The particular manner in which the Figure 1 apparatus, and the central processing unit 31 and memory 32 in particular, operate ~o control the system loads 66, shedding power consuming devices as required, will no~
be considered. In tha discussion below, illustrative, non-literal FORTRAN-type coding statements will be presented to characterize data processing.
It will, of course, be readily apparent to those skilled in the art ~hat any other program language may be employed to effect the basic computational algorithms described without departing from the spirit and scope of the pre-sent invention.
Referring now to Figure 2, there is shown a flow chart for da~a processing by the central processing unit 31 and memory 32 to project energy consumption over the monitoring interval, e.g., each assum0d 15 minute period.
It will be recalled from ~igure 1 that the synchronizing output signal con-ductor 14 from the power meter 10 will typically supply the requisi~e synçhroni~ing information. Alternatively, where absolute real time periods, e.g., every quarter hour, are utilized to compute peak demand, such monitor-ing periods are derived from the information supplied to the computer by s the real time clock 41 rather than ~he meter 10 For the compu~ation depicted in Figure 2) let computational vari-ables ras well known to those skilled in the art, each corresponding to a ; storage location in memory 32) be definad as follows:
ACT = Total energy consumed from the inception of a monitoring period through the present machine compu-tational operation;
ENLIM = The maximum energy permitted to be consumed over the monitoring interval;
ENSV = Minimum energy shedding requirament if the equipment is opera~ing in an energy saving mode;
. . :
.... . .
,:
~8~P6 MTG = Minu~es ~o go in ~he energy consumption mctering cycle e.g., initialized a~ 15 for a 15 minu~e monitoring period and decrimented by one for each one minute pass-age of ~ime as reporl:ed by ~he real time clock 41;
PCTR = The last count state of counter 22, as above noted, which is periodical supplied to the CPU as the demand meter intarface circuitry 20 is polled by the computer 30, e.g.~ one each m;nute;
PCTRl = Th~ state of counter 22 during the las~ previous counter 22 polling operation (i.e., the previous value of PCTR);
PRES = Energy consumed oVeT the last polling p~riod9 i.e., one .
minu~e for the assumed case;
PRESl PRF.S2 = Energy consumed during the one minut~ and two minute previous periodsJ resp~ctively;
PR0J = Energy consump~ion projected over the full monitoring period interval and PRTE = Present overall rate of power consumptlon.
To illustrate operation of the Figure 2 consumption projscting algorithm, which iteratively repeats during the assumed fifteen minute mon-itoring period, examine now data processing beginning an iteration during the intermediate par~ of the period. As a first matter, the state of the counter 22 is ~ead into the PCTR variable location in memvry 32 (step 150) by any conventional data entry statement. The powe~ consumed during the previous ~:
one minute period ~PT~S3 may then be deter~ined by PRES - (PCTR - PCTRl~* ~ (1) where ~PCTR - PCTRl) is the incremental count accum~la~ed over the last one minute polling period, and ~ is a count-to-energy consumption con~ersion factor (step 152).
The present rate at which energy is being consumed ~PRTE) - i.e., average power over the last one minute, is then PRTE = (PRES*2 ~ PRESl ~ PRES2) t 4 (2 :
, u~
determined as the weighted average of power consumed during the las~ interval (PRES being given double significance) ancl over the pTevious two one minute periods as stored in PRESl and PRES2 (step 153).
The actual power consumed from t:he beginning of the monitoring period through the present time (ACT) is upda~ed, ACT = ACT ~ PRES. (3) The total energy projected to be consu~Pd over the entire monitoring period (15 minutes) PR0J is computed by adding the actual power consumed from the beginning of the period to present ~ACT) to the power predicted to be csn-sumed over the remaining interval (product of the rate at which power is being consumed tPRTE) and the time remaining in the period (MTG), as by PRpJ = ACT + PRTE * ~G, (4)steps 155 and 159).
Thus following the functional romputation 159 the CPU 31 has avail-able to it a projection of the energy which will be consumed over ~he monit-oring interval ~stored in PR0J). Before testing the contents of PR0J against the permissible energy limits ~e.g.~ stored in ENLIM~, the computational variables MTG, PRES2, PRESl, and PCTRl are updated to be in a proper posture forthe next co~putational cycle ~step 160).
The statements ; MTG = ~G - 1 t5) PRESl = PRES (6) , PRES2 ~ PRESl t7) P~TRl - PCTR ~B) may be employed.
; To determine whethe~ some present system A.C. load(s) need be shed, the projected energy consumed during the period tPR0J) is compared with the maximum permissible consump~ion (ENLIM) in any program language testing and conditional branching routine ~ se well kno~n tfunctional block 161). If the contents of PR0J exceeded those of ENLIM, indicatin~ that power must be ;~
shed ta "yes" result from the program test 161), a variable SHEDRQ containing the requirement o power to be shed set to the difference, , - ~ , .. ..
\
~Q~
SHEDRQ = PR0J - ENLIM I SHEDRQ. ~9) If the equipment is operating in an energy saving mode where a minimum amount of energy (stored in ENSV) is to be shed independent of any actual excessive power rate, SHEDRQ is initialized to ENSV, e.g., at the beginning of each monitoring period, beore entry into Figure processing.
Thus in over-view and by way of summary, ~he Figure 2 algorithm constantly projeets the to~al energy which will be consumed over ~he monit-oring period (con~ents of PR~J) by meas~ring the power actually oonsumed ; from the beginning of the monitoring period to present, and projec~ing future consumption based upon a weighted average of the rate o consumption. The projected consumption PR0J is then ~ested against the maximum permissible consumption (contents of ENLIM) and, if power is being consumed at an excess-ive rate, defines in a variable cell SHEDRQ the amount of power ~hich must be eliminated to bring consumption down to a point where ENLIM is not exceed-ed (OT to eliminate the ENSV amount if a power saver mode is employed).
Referring now to Figure 3 there is shown the SH~D algorithm which operatss once SHEDRQ has been defined to actually turn off *he necessary loads 66 to satisfy the power reduction requirement of SHEDRQ.
For purposes of the Figure 3 algorithm, let additional storage variables be defined as follows:
M = an indexing variable identifying consecutive ones of the load 66m;
I = the operational level for each of the _ system load ~more fully discussed below);
J :9 the priority level at which loads 66 are being shed, e.g., with J beginning at zero and with increasing ; numbers represent increasing priorities;
; PRTY ~M,I~= is a two dimensional vector signalling the priority entry in a load M data table for level I;
STATUS (M)= a one dimellsional vector indicating the entry in the load M data table signalling whether the load is on or off~ the binary b:its "1" and "0" being assumed to .
~8~
respeotiv~ly signal on and off ccnditions;
TIM~ - is a variable representing ~ime of day reported by ~he real time clock 41 TRATM(M) = a storage cell in the data table of a load M indicat-ing the time of the last transaction for the load (e.g., when it was last either turned on o~ turnsd o~f);
TIM0N(M) = a variable signalling when the load M is to again he turned on;
pFIM~M,I) = the minimum off time for a particular load M when operated at level I;
~NTM(M,I) = ~he minimum on time for a particular load M when operated at level I;
LOAD (M) = is a load M data entry indicating the power saved when ~he load is o~f ratber than on; and DNG = is a dang~r priority level.
As anticipated by ~he process variable designa~ion ~able above, there is associated with each load 66m a d~ta table whieh in~ludes level- -independent ~ariables ti.e., stoTage locations) which indicate whether the device is off or on ~STATUS (M~, the power eonsumed by the device wh0n on -and po~er sa~ed when of~ ~L0AD~M)), the ti~e the device was last turn~d on or off tTRATM(M)); and ~he ti~e an off device is to be turned on (~NTM(M~
There is also included in the data table for each load a plurality of storage cells ~which may somprise by~es, or por~ions of one or more me~ory 32 locat-ions~ which Yary with ~he level de~initional descripter ~I) Pvr all loads.
Thus, for example, lt ~ay be desired to diferently describe loads, e.g. as to priority (PRTY~M,I)) or minimum off or on time ~PTM(M,I), ~NTM(M,~)) depending upon b~siness hours vis-a-vis non-business week day hours Yis-a-vis weekend or h~liday; to differently characteri~0 loads depending upon some operational or environmental actor such as a te~perature reported by s~nsor ts) 42; or to select load leval via an input ~essaga en~sred via an input pe~ipheral such as the teletypewriter 38. By way of one spacifi6 example, - - , , . : : " i; ~ , :
.: . , , ~ . . ., . . :: .
`~
it will be apparent tha~ an A.C. load such as air conditioning will be given a much higher load shedding priority when a sensor 42 is reporting an elevated temperature rather than a lower reported temperature. Similarly, priorities, minimum off, on times, and other level dependent variables will vary for ligh~s, pumps, and the like depending upon such possible factors as production time versus various classifications of non-production ~imes, cooling requirements, low material hopper fill levels, and the like.
As a conceptual matter, it is important to distinguish the level (I) which defines priority and some operatîonal properties of the system loads 66, from the J-priority variable. As par~ of the Pigure 3 algori~hm, where some loads up to the SHEDRQ requirement must be shed, the system first examines loads of the lowest priority tJ = 0) value at the then obtaining load describing level, or I state ~whatever that level is) and selectively shuts off some or all of the loads of priority zero, desrementing SHEDRQ as each load is shed.
If, after completion of processing for the lowest priority level~
J = 0, J is incremented to the nex~ level (J - 1) and shedding continues until the contents ~f SHEDRQ are satisfied. Throughout this procedure, the definitional level variable "I" will typically no~ change (unless there is a teletype message, sensor input or the like causing such change). Of cours0, if desired, it is p~ssible to make I a function of J.
The SHED algo~ithm considered in overview above will now be dis-cussed in greater detail in conjunc~ion with the flow char~ of Figure 3.
When the SHED routine is entered (as by defining a requirement to shed power - in SHEDRQ), the load indexing variable M is initialiæed ~o 1 such that the prDcessor 31 first considers the load 661, and the priority variable J is set to 0 to attempt to shed the amount of power defined by the con~en~s of Sl-IEDRQ at the lowest load priority (stap 202), as by J = , (10) M = 1. (11) Obviously also, all other processing initialization is effected as well.
The CPU steps 31 and memory 32 next fetch ~he indexed (M) load data9 ~' , ' ' ' ' ' , `\
i.e., the data characteri~ing the load 66m for the level I defined external to the S~ED routine. The data block for tlhe M-the load 66m comprises level-independent variable such as power (L0AD(M)), time of last transaction (TRATM~M)), on-off status (STATUS(M)); and level dependent variables such as priority (PRTY(M,I)) and minimum off and on times (0FTM(M,I)) and (0NTM(M,I~).
If a CPU 31 with plural storage registers is employed, all such load describ-ing variables may be stored in the CPU 31. Alternatively, as is ~ se con-ventional for indirect addressing, an index register or the like may be u~ilized to extract ~he load ~ parameters as required. Other data storage-interval arrangements are also well known ~o those skilled in the art for obtaining the load characteristics when needed.
After the load descriptors are obtained and/or isolated by funct-ioning 205 (Figure 3 processing~ functional blocks 207, 210 and 212 test the load descriptors to determine whether or not the load may be turned off.
In particular, test 207 examines the level dependent load priority (PRTY(M,I~) to deter~ine whether or not the priority is less ~han the contents of J (J
being at the lowest or O priori~y se~ting for the first iteration through the SHED 1OGP). Assuming the tes~ 207 is satisfied (asceptable load priority), test 210 examines the status (STATVS(M)) of the M-th load being tested to de-termine whether the load is on. It is obviously impossible to sa~e energy by ~urning off a load ~hich is already off. For a load which is on (test 210 sa~isifed), a test 212 dete~ines that it has been on long enough to again be turned o~, i.e., that the diffeTence between the present ~ime (TIMe) and the time the device was turned off ~TRATM(M)) exceeds the minimum on time for level I (0NTM(M,I)). If, and only if, each of the three ~ests 207, 210 and 212 are satisfied, ~he computer turns off ~he M-th load 66m(step 214). The load turn off is effected in ~he manner above described by the CPU 31 enter-ing a "O" binary dig:i~ in M-th stage storage of the register 49.
Following load turn off, ~unctional block 215 up-da~es information in the da~a block associated with the M-th load to reflec~ i~s new, "off"
status. In particular, a time on one-dimensional vector cell TIM0N(M~, which establishes ths real time when the load M is to again be turned on is set equal to the sum of the present time ~TIME) and the minimum off period for the load M at the level I (0FTM(I)), i,e.~
TIM0N (M~ = TIME ~ 0~TM(M,I), (12) The s~atus (STATUS(M)) of load M is set ~o O to reflect the fact that the load M is turned off, and the transaction time ~TRATM(M~) variable for the load M is set equal to time (TRATM~M~ = TIME) to indicate when the load M
was turned off.
The SHED algorithm llext computes ~he energy saved during the subject monitoring interval (ESV) by having the M~th load off. The energy saved (ESV) during the interval is the product of the power saved by turning the load off (L0AD(M)) and the lessar of the ti~e remaining in the monitoring interval (MTG) or the time that the load will be off at the I-the level (pFTM
(M,I)). Thus, a test 218 determines whether or not MTG exceeds pF~M(M,I) and, if so, causes execution of ESV = ESV + L0AD(M) * 0FTM(M,I). tl5 if not, ESV = ESV ~ LpAD(M) * MTG (16) is executed. In either case, the total energy saved ESV is updated by the proper amount to reflect the energy savings during the monitoring period by turning the load 66m ff-Test 227 det0rmines whather the total energy saved (contests of ESV) exceeds the power which ~ust be shed ~contents of SHEDRQ). If so, the system has deleted sufficient A.C. load, and exit is made ~rom the SHED routine.
If not ~or if processing from the steps 21~-227 is skipped because one of the tests 207, 210 or 212 failed indicating that the M-th load could not be turned off), the SHED algorithm examines (tsst 230) whether or not the conten~s of M equal ~ ( the last of the system loads 66n). If no~, the vari-able M is incremented ~step 25~) (e.g,, by M = M~ 1) and processiDg b0gins in th~ manner above described by reading in the parameters of the next load to see whether that load can be shed. Thus, data processing for the above con-sidered functional loop begins with tha firs~ load (M=l) and initeratively con-tinues until either enough power has been shed at the initial, lowest priority - 17 _ ' .
:: "
level (J=0) signalled by the test 227 being satisfied - or until the las~
load 66n has been processed (M=N), and there remains an additional shed requirement ~contents of SHEDRQ~0).
Assuming this latter event (test 230 satisfied), the priority level J is incremented ~J = J ~ 1) and the new level J tested (test 239) to see whether a danger le~el (DNG) is attained. If so, an ou~put warning is ~ener-ated by step 240 by a system output alarm device. Assuming the more usual case where a danger level is not reached ~test 239 fails),, the load indexing variable M is again initialized to 1 to begin iteration of the SHED algorithm in the manner above discussed to sequentially considering each load in turn, but at the nex~ higher priority level.
Thus, again in overview and by way of summary, the SHED algorithm operates by serially examining loads 661 ~ 66n turning of those which may be turned off and which are of the lowest priori~y. Assuming that sufficien~
power cannot be shed at the lowest priority level, the priority variable J
is progressively incremented and each of the loads examined seriatim until the requisite power has been deleted.
The composite system of Figures 1 - 3 thus operates in the manner above described to control system loads 66 in a manner assuring that excess-ive power is not consumed during a monitoring period tand thus no utili~y-imposed penalty or premium is incurred) because of an excess peak power demand, shedding loads as required. Where loads are shed, such shedding is effected on a priority basis, and in accordance with load defining parameters and priorities define~d by load operational levels automatically or manually sensed or entered in~o the overall power regulating system.
The above-described arrangement is merely illustrative of the principles of the present invention. Numerous modifications and adaptations thereof will be rea~ily appa~ent to those skilled in the art withou~ depart-ing from the spirit and scope of the presen~ invention. Thus, for example, it will be readily apparent to those skilled in the art that the CPU 31 may utilize (and re~uire~ confirmation via the register 71 tha~ a particular load 66i is turned off before decrementing SHEDRQ; or that a load 66 is in fact on (and can thus be turned off) before executing step 214 (Figure 3~.
Similarly, it is apparent that during any administration period, the contents of location TIME can be compared to the variables TIM0N ~M) to turn loads 66 on a~ the appropriate times. Further, it will be apparent that "power" as used and claimed herein extends to D.C. energy -- a5 well as other consumables ~e.g., gas or other fluids) wi~h appropriate electronic controllers ~e.g., values) replacing the relays 60i, and meters being employed.
This invention relates to electronic power monitoring/regulation systems and, more specifically, to s~ored program controlled apparatus for selectively shedding power loads to maintain energy consumed during each monitoring interval withinprescribed bounds.
The cost of electrical energy is an i~portant economic expense factor in many industrial installations and applications ~- a matter rein-forced by the marked fuel charge increase of recent years passed along by electrical utilities to their consumers. The cost of A.C. electrical energy paid by industry i5 dependent, as a generality, upon both energy (e.g. measured in kilowatt hours) consumed over a billing period ~e.g., a month), and also the peak power consumption rate ~e.g., the greatest number of kilowatt hours consumed during any 15 minute or half-hour period, or the like). The specific billing practices of utilities differ but all to the same effect of penalizing a power consumer who has a high peak power consump-tion rate Yis-a-vis total power consumed. This charging practice, of course, assures an adequate return for power companies which must install capital generating equipment to satisfy peak rather than average demand.
Thus, an industrial consumer which consumes electrical power at a high ra~e, even for a very short periot of time, will be subject to a severe increase in its total power costs -- in some areas applied as a higher rate applied to energy consumed by the user.
According to this invention there is provided in combination in a power load shedding systs~ for controlling the operative status of plural con~rollable system loacls each selectively connectable to a souTce of energy, comprising stored program controlled digital computer means including a central processing unit and memory means communicating with said central processing means, said memory means including data storage means for each load for storing the characteris~ics and status of the associated load, plur-al controlled switch means for selectively connecting and disconnecting the controllable system loads with the energy source, control circuitry respon-sive to signals issued by said computer means for controlling the s~atus - 1 - ~.~
~`~
, , . ~ . ~ .
.:
of said controlled switch means, and means for signaling to said computer means ~he power being consumed by the syste:m loads, said computer means including means for projecting energy cons~lmption over a measuring interYal, excessive power signaling means for compari.ng said projected energy consu~pt-ion wi~h a permissible bound therefor and for signaling when the projccted consumption exceeds said permissible bound therefor, load shedding means responsive ~o said excessive power signaling means indica~ing an excessive energy consumption projection for examining said data storage means for the system loads in said memury means for selectively operating said controlled switch means via said control circuitry to operatively disconnect selected system loads from ~he energy source, wherein said data storage means for each load includes means for storing plural values for at least one load descriptor each operative for a distinct operational level, and said memory means incl~des means defining ~he ~hen obtaining operational le~el.
It is thus an object of the p~esent invention to proYid0 an improv-ed power control system.
More specifically, it is an objec~ of the present invention to provide apparatus for monitoring power consumed, and for shedding A.C. or D.C. loads to maintain power çonsumed over each monitoring interval within prescribed bounds.
I~ is another objec~ of the present invention to provide a po~er monitoring/regulation system in which the characteris~ics (and use priority) of each system load can be redefined as desired, as pursuant ~o passage of time, und0r external sensor stimulus te.g. tempgrature, process rate or the like), or under local or distant man~al entry, as via a teletypewriter.
It is yet ~mother object of ~he presen~ invention that power con-troller apparatus be expandable, and control loads and load con~rollers physically disposed at local and remote locations.
The above and other objects of the present invention are realized in a specific, illustrativP power controlling/load shedding system which includes power consumption metering and ~eter interfacing circui~ry for entering overall power consumption into a central processing unit. The CPU
~41~6 memory includes a data storage table characterizing each system electrical load under each of a hierarehy of operational levels, and circuitry is pro-vided for the CPV to turn local and remote loads Dn and off in accordance with stored energy consump~ion projecting and load shedding algorithms.
In brief, ~he digi~al computing apparatus operates on the meter supplied information and projects energy consumption o~er ~ach of successive monitoring intervals. If power must be shed to obviate an excessive project-ed demand, loads are examined seriatim and selectively shed on a monotonically increasing priori~y basis as required, depending upon the opera~ionalpara-meters and status of each load for the then p~e~ailing load level condition.
The above and other features and advantages of the present invent-ion will become more clear from the ollowing detailed description of specific, illustrative power monitoring and load controlling apparatus, presented in conjunction with the accomp~nying drawing, in which:
Figures lA and B are respectively the lef* and right portions of a composite power monitoring and load shedding system in accordance with the principals of the present invention; - -Figure 2 is a flow chart illustrating data processing to project line energy consumption over a monitoring int~rval, and for defining load shedding requirements; and Figure 3 is a flow chart characterizing a data processing SHED
algorithm selectively disabling system loads as required.
Referring now to Figures lA and B hereinafter referred to as composite Figure 1, there is shown a power monitoring and load shedding system embodying the principals of the present invention, which includes a power meter 10 for monitoring the power consumed by an array of system loads 661-66n energized by an A.C. power source S9 via a power distribution bus 62. The power meter lO supplies as a first output on a lead 12 info~mation indicative of the rate energy is being consumed by the sys~em loads 66, typically in the fo~l of a sequence of pulses where each pulse repres~nts a predetermined quantum of energy. The powe~ meter 10 will also typically supply at an output lead 14 synchronizing informa~ion identifying the ralat- :
.~ , .
-ively short period over which the energy conswned is ~o be determined.
Thus, for example, Nhere energy consumption is monitored on the basis of ifteen minute intervals, the sync line 14 will be activated once every fifteen minu~es. Alternatively, the monitoring periods may correspond ~o real time in~ervals ~e.g., every quarter hour) are signalled by a real time clock 41 discussed below.
It will be recalled that the charge for industrial power has a fac~or dependant upon the peak power consumed during any mon~tored interval.
Accordingly, as an overall desideratum, the sys~em operates to avoidexcessive peak energy consumption during any monitoring interval signalled by the sync output of the meter 10. This is effected as a generality by modulating the on/off status of lower priority loads to shift a portion of the ~nergy requirements for such loads ~o periods when A.C. loads of a higher order of significance exhibit lower demand requirements.
To this end, demand meter interface circuitry 20 receives the power 12 and synchroni~ing 14 output informa~ion from the power meter 10 and passes this data to a digital computer 30. As shown, the compu~er 30 employs a central processing unit 31 and a memory 32 for receiving and operating upon the power consumption informa~ion via a peripheral interface adapter ~P.I.A.) 33 and common data and addr~ss busses 43 and 44. The particular structur~
shown for the digital computer 30 in Figure 1 (to include a series of priority interrupts 35 passing to a priority intarrupt encoder 34) is merely illustrative and may be i~plemented by a range of processor organizations including standard general purpose computers, mini-compu~ers and micro-processor configurations. For examplel the minicomputer vended by the ass-ignee of the instant application under the trade style MAC 16 may well be utilized.
In accordance with conventional common data and address bus 43 and 44 computer operation, the demand meter interface circuitry 20 ~as well as contact point and control circuitry 48, status circuitry 70, sensor(s) 42 and a remote coupler 73, all discussed below) are treated as peripherals connected to the system busses 43 and 44 for selection and connection-unilateral or bilateral as required, with the ~omputer 30 and CPU 31 in particular.
To this end, the demand meter interface circuitry 20 includes a counter 22 advanced by the energy consumption signalling pulses supplied by the meter 10, and a sta~us rsgister 24 (e.g., a simple flip-flop) which is set when each new sync pulse is received from the meter 10 via the lead 14.
The output from the counter 22 and sta~us register 24 are selectively gated by gate circuitry 26 onto the data bus when the interface circuitry 20 is addressed by the computer 30 via the address bus 44. Again as ~ se con-ventional for common bus computer cooperation for "peripheral" selec~ion, the interface circuitry 20 includes an address decoder 27 connected to the address bus 44 to determine whether the circuitry 20 is being polled by the CPU 21 and, if so, to enable the gate Z6 to multiplex the counter 22 and status register 24 contents onto the data bus 43 for communication to the CPU 31. A delay element 2S operates to clear the status register 24 te.g.
reset a status flip-flop) at the conclusion of each polling cycle. In ~his manner, a computer variable aseribed the mnemonic name "PCTR", identifying the count state of the counter 22, is loaded into an appropriate storage cell (schematically denominated PCTR) via the central processing unit 31.
Contact point and control circuitry 48 is employed ~o actuatet disable t~e controllable system power consuming loads 66. There may, and generally will be p~wer-draining loads conn~c~ed to th~ power source 59 which may not be s~itched on or off by tha CPU 31. The pOWeT consumed by such loads is, of course, reflected in the output of power meter 10 and thus taken into account by thc instant apparatus. However~ beyond thls observat-ion such loads are not further considered.
The contact point and control circuit 48 includes a control regis-ter 49 loaded via the data bus 43 when the circuitry 48 is identified by the contents of the address bus 44. As again is ~ se conventional in the common bus digital co~puter field, each of the circuits communicating with the CPU 31 via the common busses 33 and 34, e.g., the circuitry 20, 42, 48 70 and 73 herein discussed, each includes an address decoder compa~able to the d~coder 27 shown in ~he meter interface circuitry 2~ specifically dis-cussed above (each decoder, of course, being adapted to respond ~o unique digital address word). Each address decoder responds to computer 30 gener-ated address signals on the address bus 44 which identify when that "peripheral" item is selected by the computer 30 fDr communications therewith and appropriately connect the selected peripheral to the da~a bus ras via gating 26 shown for the interface circuitry 20). The apparatus comparable to the address decoder 27 and multiplexing elements 26 discussed in conjunct-ion with ~hs meter interface circuitry 20 will hereinbelow be presumed to be included in all apparatus connected to the common data and address busses 43 and 44 (and to any remote data and address busses 43' and 44') and will not be further considered.
Re~urning now to the specific operation of the contact point and control circuitry 48, the i-th stage of the register 49 selectively energiz-es/de-energizes the cGil 50i of a relay 49i for selectively controllin~ the energized/de-energized state of a corresponding load 66i. The load 66i is selectively connect~d to the source of A.C. power 59 via a power contacts 65i of a relay 60i having a relay activating coil 61i. The relay coil 61 is selectively connected by one transfer switch member 54i of a two pole, three position switch 53i and a normally open contacts 51i of the relay 49i.
To illus~rate load control by way of specific example, and with - the double switch 531 in its uppermost posi~ion in the drawing, whan the i-th stage of the register 49 signals that the load 661 is to be energized, it presents an appropriate binary digit, e.g., a binary "1". This output bit energizes the coil 51~ either directly for a sensitive relay ~r indir-ectly via a buffer amplifier or gate (not shown) ~hus actuating the relay contacts 511. The closed contacts 511 complete an energizing circuit path for the relay 601 located about the load 661 location via normally closed contac~s 631 (discussed below). The energized relay 601 closss normally open contacts 651 thus completing the circuit from the A.C. pQWer source 59 to the load 661.
Correspondingly, if a "power off" bit (e.g., a"0") is present a~
the i-th stage of regis~er 49, the relays 60i and 49i are unenergized, and the load 66i is disconnected fromthe power source 59 Yia opçned contac~s 65i.
The normally closed contacts 63i may be disposed about the load area to disable a relay 60i (and thereby aLlso the load 66i) independent of the ou~put of the prooesser 31 as loaded i.nto the register 49. Thus, for ex-ample, the contacts 63i may co~prise an emergency switch, the ou~pu~ of a loc-al sensor to signal overload or excessive te~pera~ure conditions, or the like.
The second pole 55i of each switch 53i in ~he contact point and control circuitry 48 is coupled as an input by a conductor 56i to a register 71 in status circuitry 70, as is a signal passing through a second signal level ~e.g., "dry") contact 64i of the load controlling relay 60i via a con-ductor 67i. The signal conveyed to ~he register 71 by ~he conductor 56i reports to the CPU 31 whether or no~ the load 66i is capable of being con~rol-led by ~he co~puter 30, i.e., operated or shed as required. To this end, no~.e that if the double pole switch 53i is in other than its uppermost positionJ
the load 66i cannot be controlled by the CPU 31 which no longer has aceess to the relay 60i. This fact is reported to register 71 by the swi~ch ~ransfer member 55i which supplies a ground signal (a binary "Q" for commonplace cur-rent sinking integrated circui~ logic) when switch 53i is in its uppermost position, and an open circui~ signal (a "1") otherwise.
Si~ilarly, the ground/open signal reported ~o the register 71 Yia contact 64i and lead 67i confirm to the CPU 31 ~he actual sta~e oÇ a con-trolled load 66i9 independent of the co~mand issued therefor by the computer 30. To this end, note that the compu~eT 30 ma~ signal that load 66i be energized whenJ in ~'act, the lo~d may be unenergized, as by an opening of ~he contac~s 63i because of some locally pre~ailing condltion at the load 66i, because of a system aul~ in circuitry 48, a severed conductor, or the like.
Accordingly, the above described sys~em apparatus is fully effect-ive ~o load power consumption and synchronizing information from the meter 10 into the CPU 31 and memory 32, to issue commands from the memory - CPU 31, 32 to turn each c~ntrolled load 661-~6n on or off, and to monitor ~he status .- thereof via the stat~s circuitry 70.
~ - 7 -~; .
By way of additional system apparatus, the compu~r 30 includes a priority in~errupt encoder 34 ~o directly input into ~he central processing unit 31 on a priority basis a si~nal from circuitry 36 signalling that po~er has failed; messages supplied by external peripheral units 38, e.g., a teletypewri~er; and time of day information supplied by a real time clock 41. Again, as well known to those skilled in the are, the informa~ional sources 36, 38, 41 ~ay alternatively be connected as additional "peripherals"
to the busses 33 and 34 rather than supply information via the CPU interrupt port (and the "peripheral" items connected as priority interrupts with or without direct memory access). Also, ~here a mini-computer is employed with priority interrupt capability (such as the aforementioned LEC 16 assemblage~, no separate priority interrupt encoder 34 ne0d be employed.
The Figure 1 system further includes sensors 42, e.g., connected as a peripheral, to *he da*a and address busses 43 and 44 to supply thereto signals characterizing those parameters of the controlled industrial plant which are of interest in making power shedding decisions. For example, such parameters may comprise ambient temperature twhich may, for example, establ-ish priorities for heating/cooling A.C. loads), plant process rate, product mix, or the like.
In accordance with one aspect of the present invention, the above considered apparatus may be employed as well to control loads disposed in locations spatially remD~e from ~he CPU 31, e.g. loads 66' and 66". To this end, si~nal coupling apparatus connects the busses 43 and 44 with a remote system controller 82 which, in turn, operates remote data 43' and address 44' busses in a manner comparable to the busses 43 and 44 directly controlled by the computer 30. Connected to the busses 43' and 44' are d~mand meter inter-face circuitry 20' connected to a load 66l monitoring power meter 10' (the A.C. source and relays comparable to relays 60' being deleted for clarity)>
contact point and control circuitry 48' and status circuitry 70' which per-form in a manner directly analagous to the like unprime-numbered elements discussed above. Thus, for example, a r~mote coupler 73 including a UA~T 74 (universal asyncronous receiver and transmitter), versions of which are ' available from several different manufacturers inintegrated circui~ form, may be employed to communicate wi~h a UART 84 in the remote system controller 82~ For communication over an extended distance, modems 79 and 80 are employed, Nith date signalling being effected over a duplex circuit 76, 78.
l~ere long dis~ance communications are no~ required, the output of the UART
74 may be directly connec~ed to the remote system control 82 for controlling power lDads.
Remote system con~roller 82 may simply include an address decoder 87 for identifying that it is the peripheral being addressed by the compute~
30 and for enabling a command decoder 89 to enable a sequencer 90, e.g., a counter-decodPr combination to actuate ~he interface circuitry 20', circuitry 48' and 70' in turn via the remote address bus 44' for communication with the CPU 31 via ~he remote data bus 43', a data register 86, and the UART
84-T0-UART 74 communica~ions link.
Yet, further, loads 66" may be controlled via a remote multiplexer peripheral 102 connected to any of ~he system data, address buss~s 43~ 44, or 43', 44', whichever is more physically convenienttoa load 66". The remote multiplexer 10~ operates as a "powerless" remote in the sense of supplying A.C. power from a power source 106 ~o loads 66" as well as control informat-ion. To this end, multiplexer 102 includes an encoder to encode the bus 43', 44' information in a manner suitable for mul~iplexing ~ith 60 cycle A.C.
power from source 106, as for delivery on a twisted paiT 111. Such power/
signal multiplexing may be effected in varying ways well known to those skilled in t~ art, e.g., by utilizing frequency division multiplexing as where the encoder parforms froquency shift keying, ampli~ude or frequensy modulatiDn, PCM, PAM, or the like.
At the load location, a powerless remote terminal 110 includes a separation filter 112 for d~livering the low frequcncy A.C. power ~o latch and relay circuitry 118, and for ~upplying the control information to a de-coder 115. She decoder 115 enters data in the latch tregister~ portion of circuitry 118 which effec~s a control func~ion to dcliver the A.C. power to those of the array of controlled loads 66" which are to be turned on in _ 9 _ ~, .
.
.
accordance with ~he info~nation last supplied by ~he decoder 115.
Thus, the composi~e Figure 1 apparatus includes all requisite struc~ures for monitoring and controlling loads 66, 66' and 66" in local and remote locations - eYen where A.C. energy may not otherwise be available.
The particular manner in which the Figure 1 apparatus, and the central processing unit 31 and memory 32 in particular, operate ~o control the system loads 66, shedding power consuming devices as required, will no~
be considered. In tha discussion below, illustrative, non-literal FORTRAN-type coding statements will be presented to characterize data processing.
It will, of course, be readily apparent to those skilled in the art ~hat any other program language may be employed to effect the basic computational algorithms described without departing from the spirit and scope of the pre-sent invention.
Referring now to Figure 2, there is shown a flow chart for da~a processing by the central processing unit 31 and memory 32 to project energy consumption over the monitoring interval, e.g., each assum0d 15 minute period.
It will be recalled from ~igure 1 that the synchronizing output signal con-ductor 14 from the power meter 10 will typically supply the requisi~e synçhroni~ing information. Alternatively, where absolute real time periods, e.g., every quarter hour, are utilized to compute peak demand, such monitor-ing periods are derived from the information supplied to the computer by s the real time clock 41 rather than ~he meter 10 For the compu~ation depicted in Figure 2) let computational vari-ables ras well known to those skilled in the art, each corresponding to a ; storage location in memory 32) be definad as follows:
ACT = Total energy consumed from the inception of a monitoring period through the present machine compu-tational operation;
ENLIM = The maximum energy permitted to be consumed over the monitoring interval;
ENSV = Minimum energy shedding requirament if the equipment is opera~ing in an energy saving mode;
. . :
.... . .
,:
~8~P6 MTG = Minu~es ~o go in ~he energy consumption mctering cycle e.g., initialized a~ 15 for a 15 minu~e monitoring period and decrimented by one for each one minute pass-age of ~ime as reporl:ed by ~he real time clock 41;
PCTR = The last count state of counter 22, as above noted, which is periodical supplied to the CPU as the demand meter intarface circuitry 20 is polled by the computer 30, e.g.~ one each m;nute;
PCTRl = Th~ state of counter 22 during the las~ previous counter 22 polling operation (i.e., the previous value of PCTR);
PRES = Energy consumed oVeT the last polling p~riod9 i.e., one .
minu~e for the assumed case;
PRESl PRF.S2 = Energy consumed during the one minut~ and two minute previous periodsJ resp~ctively;
PR0J = Energy consump~ion projected over the full monitoring period interval and PRTE = Present overall rate of power consumptlon.
To illustrate operation of the Figure 2 consumption projscting algorithm, which iteratively repeats during the assumed fifteen minute mon-itoring period, examine now data processing beginning an iteration during the intermediate par~ of the period. As a first matter, the state of the counter 22 is ~ead into the PCTR variable location in memvry 32 (step 150) by any conventional data entry statement. The powe~ consumed during the previous ~:
one minute period ~PT~S3 may then be deter~ined by PRES - (PCTR - PCTRl~* ~ (1) where ~PCTR - PCTRl) is the incremental count accum~la~ed over the last one minute polling period, and ~ is a count-to-energy consumption con~ersion factor (step 152).
The present rate at which energy is being consumed ~PRTE) - i.e., average power over the last one minute, is then PRTE = (PRES*2 ~ PRESl ~ PRES2) t 4 (2 :
, u~
determined as the weighted average of power consumed during the las~ interval (PRES being given double significance) ancl over the pTevious two one minute periods as stored in PRESl and PRES2 (step 153).
The actual power consumed from t:he beginning of the monitoring period through the present time (ACT) is upda~ed, ACT = ACT ~ PRES. (3) The total energy projected to be consu~Pd over the entire monitoring period (15 minutes) PR0J is computed by adding the actual power consumed from the beginning of the period to present ~ACT) to the power predicted to be csn-sumed over the remaining interval (product of the rate at which power is being consumed tPRTE) and the time remaining in the period (MTG), as by PRpJ = ACT + PRTE * ~G, (4)steps 155 and 159).
Thus following the functional romputation 159 the CPU 31 has avail-able to it a projection of the energy which will be consumed over ~he monit-oring interval ~stored in PR0J). Before testing the contents of PR0J against the permissible energy limits ~e.g.~ stored in ENLIM~, the computational variables MTG, PRES2, PRESl, and PCTRl are updated to be in a proper posture forthe next co~putational cycle ~step 160).
The statements ; MTG = ~G - 1 t5) PRESl = PRES (6) , PRES2 ~ PRESl t7) P~TRl - PCTR ~B) may be employed.
; To determine whethe~ some present system A.C. load(s) need be shed, the projected energy consumed during the period tPR0J) is compared with the maximum permissible consump~ion (ENLIM) in any program language testing and conditional branching routine ~ se well kno~n tfunctional block 161). If the contents of PR0J exceeded those of ENLIM, indicatin~ that power must be ;~
shed ta "yes" result from the program test 161), a variable SHEDRQ containing the requirement o power to be shed set to the difference, , - ~ , .. ..
\
~Q~
SHEDRQ = PR0J - ENLIM I SHEDRQ. ~9) If the equipment is operating in an energy saving mode where a minimum amount of energy (stored in ENSV) is to be shed independent of any actual excessive power rate, SHEDRQ is initialized to ENSV, e.g., at the beginning of each monitoring period, beore entry into Figure processing.
Thus in over-view and by way of summary, ~he Figure 2 algorithm constantly projeets the to~al energy which will be consumed over ~he monit-oring period (con~ents of PR~J) by meas~ring the power actually oonsumed ; from the beginning of the monitoring period to present, and projec~ing future consumption based upon a weighted average of the rate o consumption. The projected consumption PR0J is then ~ested against the maximum permissible consumption (contents of ENLIM) and, if power is being consumed at an excess-ive rate, defines in a variable cell SHEDRQ the amount of power ~hich must be eliminated to bring consumption down to a point where ENLIM is not exceed-ed (OT to eliminate the ENSV amount if a power saver mode is employed).
Referring now to Figure 3 there is shown the SH~D algorithm which operatss once SHEDRQ has been defined to actually turn off *he necessary loads 66 to satisfy the power reduction requirement of SHEDRQ.
For purposes of the Figure 3 algorithm, let additional storage variables be defined as follows:
M = an indexing variable identifying consecutive ones of the load 66m;
I = the operational level for each of the _ system load ~more fully discussed below);
J :9 the priority level at which loads 66 are being shed, e.g., with J beginning at zero and with increasing ; numbers represent increasing priorities;
; PRTY ~M,I~= is a two dimensional vector signalling the priority entry in a load M data table for level I;
STATUS (M)= a one dimellsional vector indicating the entry in the load M data table signalling whether the load is on or off~ the binary b:its "1" and "0" being assumed to .
~8~
respeotiv~ly signal on and off ccnditions;
TIM~ - is a variable representing ~ime of day reported by ~he real time clock 41 TRATM(M) = a storage cell in the data table of a load M indicat-ing the time of the last transaction for the load (e.g., when it was last either turned on o~ turnsd o~f);
TIM0N(M) = a variable signalling when the load M is to again he turned on;
pFIM~M,I) = the minimum off time for a particular load M when operated at level I;
~NTM(M,I) = ~he minimum on time for a particular load M when operated at level I;
LOAD (M) = is a load M data entry indicating the power saved when ~he load is o~f ratber than on; and DNG = is a dang~r priority level.
As anticipated by ~he process variable designa~ion ~able above, there is associated with each load 66m a d~ta table whieh in~ludes level- -independent ~ariables ti.e., stoTage locations) which indicate whether the device is off or on ~STATUS (M~, the power eonsumed by the device wh0n on -and po~er sa~ed when of~ ~L0AD~M)), the ti~e the device was last turn~d on or off tTRATM(M)); and ~he ti~e an off device is to be turned on (~NTM(M~
There is also included in the data table for each load a plurality of storage cells ~which may somprise by~es, or por~ions of one or more me~ory 32 locat-ions~ which Yary with ~he level de~initional descripter ~I) Pvr all loads.
Thus, for example, lt ~ay be desired to diferently describe loads, e.g. as to priority (PRTY~M,I)) or minimum off or on time ~PTM(M,I), ~NTM(M,~)) depending upon b~siness hours vis-a-vis non-business week day hours Yis-a-vis weekend or h~liday; to differently characteri~0 loads depending upon some operational or environmental actor such as a te~perature reported by s~nsor ts) 42; or to select load leval via an input ~essaga en~sred via an input pe~ipheral such as the teletypewriter 38. By way of one spacifi6 example, - - , , . : : " i; ~ , :
.: . , , ~ . . ., . . :: .
`~
it will be apparent tha~ an A.C. load such as air conditioning will be given a much higher load shedding priority when a sensor 42 is reporting an elevated temperature rather than a lower reported temperature. Similarly, priorities, minimum off, on times, and other level dependent variables will vary for ligh~s, pumps, and the like depending upon such possible factors as production time versus various classifications of non-production ~imes, cooling requirements, low material hopper fill levels, and the like.
As a conceptual matter, it is important to distinguish the level (I) which defines priority and some operatîonal properties of the system loads 66, from the J-priority variable. As par~ of the Pigure 3 algori~hm, where some loads up to the SHEDRQ requirement must be shed, the system first examines loads of the lowest priority tJ = 0) value at the then obtaining load describing level, or I state ~whatever that level is) and selectively shuts off some or all of the loads of priority zero, desrementing SHEDRQ as each load is shed.
If, after completion of processing for the lowest priority level~
J = 0, J is incremented to the nex~ level (J - 1) and shedding continues until the contents ~f SHEDRQ are satisfied. Throughout this procedure, the definitional level variable "I" will typically no~ change (unless there is a teletype message, sensor input or the like causing such change). Of cours0, if desired, it is p~ssible to make I a function of J.
The SHED algo~ithm considered in overview above will now be dis-cussed in greater detail in conjunc~ion with the flow char~ of Figure 3.
When the SHED routine is entered (as by defining a requirement to shed power - in SHEDRQ), the load indexing variable M is initialiæed ~o 1 such that the prDcessor 31 first considers the load 661, and the priority variable J is set to 0 to attempt to shed the amount of power defined by the con~en~s of Sl-IEDRQ at the lowest load priority (stap 202), as by J = , (10) M = 1. (11) Obviously also, all other processing initialization is effected as well.
The CPU steps 31 and memory 32 next fetch ~he indexed (M) load data9 ~' , ' ' ' ' ' , `\
i.e., the data characteri~ing the load 66m for the level I defined external to the S~ED routine. The data block for tlhe M-the load 66m comprises level-independent variable such as power (L0AD(M)), time of last transaction (TRATM~M)), on-off status (STATUS(M)); and level dependent variables such as priority (PRTY(M,I)) and minimum off and on times (0FTM(M,I)) and (0NTM(M,I~).
If a CPU 31 with plural storage registers is employed, all such load describ-ing variables may be stored in the CPU 31. Alternatively, as is ~ se con-ventional for indirect addressing, an index register or the like may be u~ilized to extract ~he load ~ parameters as required. Other data storage-interval arrangements are also well known ~o those skilled in the art for obtaining the load characteristics when needed.
After the load descriptors are obtained and/or isolated by funct-ioning 205 (Figure 3 processing~ functional blocks 207, 210 and 212 test the load descriptors to determine whether or not the load may be turned off.
In particular, test 207 examines the level dependent load priority (PRTY(M,I~) to deter~ine whether or not the priority is less ~han the contents of J (J
being at the lowest or O priori~y se~ting for the first iteration through the SHED 1OGP). Assuming the tes~ 207 is satisfied (asceptable load priority), test 210 examines the status (STATVS(M)) of the M-th load being tested to de-termine whether the load is on. It is obviously impossible to sa~e energy by ~urning off a load ~hich is already off. For a load which is on (test 210 sa~isifed), a test 212 dete~ines that it has been on long enough to again be turned o~, i.e., that the diffeTence between the present ~ime (TIMe) and the time the device was turned off ~TRATM(M)) exceeds the minimum on time for level I (0NTM(M,I)). If, and only if, each of the three ~ests 207, 210 and 212 are satisfied, ~he computer turns off ~he M-th load 66m(step 214). The load turn off is effected in ~he manner above described by the CPU 31 enter-ing a "O" binary dig:i~ in M-th stage storage of the register 49.
Following load turn off, ~unctional block 215 up-da~es information in the da~a block associated with the M-th load to reflec~ i~s new, "off"
status. In particular, a time on one-dimensional vector cell TIM0N(M~, which establishes ths real time when the load M is to again be turned on is set equal to the sum of the present time ~TIME) and the minimum off period for the load M at the level I (0FTM(I)), i,e.~
TIM0N (M~ = TIME ~ 0~TM(M,I), (12) The s~atus (STATUS(M)) of load M is set ~o O to reflect the fact that the load M is turned off, and the transaction time ~TRATM(M~) variable for the load M is set equal to time (TRATM~M~ = TIME) to indicate when the load M
was turned off.
The SHED algorithm llext computes ~he energy saved during the subject monitoring interval (ESV) by having the M~th load off. The energy saved (ESV) during the interval is the product of the power saved by turning the load off (L0AD(M)) and the lessar of the ti~e remaining in the monitoring interval (MTG) or the time that the load will be off at the I-the level (pFTM
(M,I)). Thus, a test 218 determines whether or not MTG exceeds pF~M(M,I) and, if so, causes execution of ESV = ESV + L0AD(M) * 0FTM(M,I). tl5 if not, ESV = ESV ~ LpAD(M) * MTG (16) is executed. In either case, the total energy saved ESV is updated by the proper amount to reflect the energy savings during the monitoring period by turning the load 66m ff-Test 227 det0rmines whather the total energy saved (contests of ESV) exceeds the power which ~ust be shed ~contents of SHEDRQ). If so, the system has deleted sufficient A.C. load, and exit is made ~rom the SHED routine.
If not ~or if processing from the steps 21~-227 is skipped because one of the tests 207, 210 or 212 failed indicating that the M-th load could not be turned off), the SHED algorithm examines (tsst 230) whether or not the conten~s of M equal ~ ( the last of the system loads 66n). If no~, the vari-able M is incremented ~step 25~) (e.g,, by M = M~ 1) and processiDg b0gins in th~ manner above described by reading in the parameters of the next load to see whether that load can be shed. Thus, data processing for the above con-sidered functional loop begins with tha firs~ load (M=l) and initeratively con-tinues until either enough power has been shed at the initial, lowest priority - 17 _ ' .
:: "
level (J=0) signalled by the test 227 being satisfied - or until the las~
load 66n has been processed (M=N), and there remains an additional shed requirement ~contents of SHEDRQ~0).
Assuming this latter event (test 230 satisfied), the priority level J is incremented ~J = J ~ 1) and the new level J tested (test 239) to see whether a danger le~el (DNG) is attained. If so, an ou~put warning is ~ener-ated by step 240 by a system output alarm device. Assuming the more usual case where a danger level is not reached ~test 239 fails),, the load indexing variable M is again initialized to 1 to begin iteration of the SHED algorithm in the manner above discussed to sequentially considering each load in turn, but at the nex~ higher priority level.
Thus, again in overview and by way of summary, the SHED algorithm operates by serially examining loads 661 ~ 66n turning of those which may be turned off and which are of the lowest priori~y. Assuming that sufficien~
power cannot be shed at the lowest priority level, the priority variable J
is progressively incremented and each of the loads examined seriatim until the requisite power has been deleted.
The composite system of Figures 1 - 3 thus operates in the manner above described to control system loads 66 in a manner assuring that excess-ive power is not consumed during a monitoring period tand thus no utili~y-imposed penalty or premium is incurred) because of an excess peak power demand, shedding loads as required. Where loads are shed, such shedding is effected on a priority basis, and in accordance with load defining parameters and priorities define~d by load operational levels automatically or manually sensed or entered in~o the overall power regulating system.
The above-described arrangement is merely illustrative of the principles of the present invention. Numerous modifications and adaptations thereof will be rea~ily appa~ent to those skilled in the art withou~ depart-ing from the spirit and scope of the presen~ invention. Thus, for example, it will be readily apparent to those skilled in the art that the CPU 31 may utilize (and re~uire~ confirmation via the register 71 tha~ a particular load 66i is turned off before decrementing SHEDRQ; or that a load 66 is in fact on (and can thus be turned off) before executing step 214 (Figure 3~.
Similarly, it is apparent that during any administration period, the contents of location TIME can be compared to the variables TIM0N ~M) to turn loads 66 on a~ the appropriate times. Further, it will be apparent that "power" as used and claimed herein extends to D.C. energy -- a5 well as other consumables ~e.g., gas or other fluids) wi~h appropriate electronic controllers ~e.g., values) replacing the relays 60i, and meters being employed.
Claims (16)
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:
1. In combination in a power load shedding system for controlling the operative status of plural controllable system loads each selectively connectable to a source of energy, comprising stored program controlled digital computer means including a central processing unit and memory means communicating with said central processing means, said memory means including data storage means for each load for storing the characteristics and status of the associated load, plural controlled switch means for selectively connecting and disconnecting the controllable system loads with the energy source, control circuitry responsive to signals issued by said computer means for controlling the status of said controlled switch means, and means for signaling to said computer means the power being consumed by the system loads, said computer means including means for projecting energy consumption over a measuring interval, excessive power signaling means for comparing said projected energy consumption with a permissible bound therefor and for signaling when the projected consumption exceeds said permissible bound therefor, load shedding means responsive to said excessive power signaling means indicating an excessive energy consumption projection for examining said data storage means for the system loads in said memory means for selectively operating said controlled switch means via said control circuitry to operatively disconnect selected system loads from the energy source, wherein said control circuitry comprises a register having a plural stages each signaling the desired relative operative con-dition for a different system load, and plural relays each responsive to the output of an associated register stage for controlling the state of an associated one of said plural control switch means, further comprising plural multi-position switches including a first pole serially included between said register and one of said controlled switch means associated therewith, further comprising status circuitry for supplying information to said central processing unit, said status circuitry including an additional register having a first plurality of stages, wherein each of said multi-position switches of said control circuitry includes an additional pole connected to a different stage to said additional register.
2. A combination as in Claim 1 wherein said additional register includes an additional plurality of stages, and wherein each said con-trolled switch means includes a contact connected to a different one of said second stage plurality of said additional register.
3. In combination in a power load shedding system for controlling the operative status of plural controllable system loads each selectively connectable to a source of energy, comprising stored program controlled digital computer means including a central processing unit and memory means communicating with said central processing means, said memory means including data storage means for each load for storing the characteristics and status of the associated load, plural controlled switch means for selectively connecting and disconnecting the controllable system loads with the energy source, control circuitry responsive to signals issued by said computer means for controlling the status of said controlled switch means, and means for signaling to said computer means the power being consumed by the system loads, said computer means including means for projecting energy consumption over a measuring interval, excessive power signalling means for comparing said projected energy consumption with a permissible bound therefor and for signaling when the projected consumption exceeds said permissible bound therefor, load shedding means responsive to said excessive power signaling means indicating an excessive energy consumption projection for examining said data storage means for the system loads in said memory means for selectively operating said controlled switch means via said control circuitry to operatively disconnect selected system loads from the energy source, further comprising a power distribution bus, and wherein said power consumption signaling means comprises power meter means coupled to said bus, further comprising demand meter interface circuitry connecting said power meter means and said central processing unit, said demand meter interface circuitry including counter means for accumulating impulses each representative of a fixed quantity of energy consumption.
4. In combination in a power load shedding system for controlling the operative status of plural controllable system loads each selectively connectable to a source of energy comprising stored program controlled digital computer means including a central processing unit and memory means communicating with said central processing means, said memory means in-cluding data storage means for each load for storing the characteristics and status of the associated load, plural controlled switch means for selectively connecting and disconnecting the controllable system loads with the energy source, control circuitry responsive to signals issued by said computer means for controlling the status of said controlled switch means, and means for signaling to said computer means the power being consumed by the system loads, said computer means including means for projecting energy consumption over a measuring interval, excessive power signaling means for comparing said projected energy consumption with a permissible bound there-for and for signaling when the projected consumption exceeds said per-missible bound therefor, load shedding means responsive to said excessive power signaling means indicating an excessive energy consumption projec-tion for examining said data storage means for the system loads in said memory means for selectively operating said controlled switch means via said control circuitry to operatively disconnect selected system loads from the energy source, further comprising a first plurality of system loads controlled by said controlled switch means, a second plurality of system loads, an additional plurality controlled switch means each con-trolling a different one of said additional loads, a remote system con-troller, additional control circuitry responsive to signals supplied thereto by said remote system controller for controlling the operative state of said additional controlled switch means, and coupling means interconnecting said stored program digital computer means with said remote system controller.
5. A combination as in Claim 4 wherein said coupling means includes universal asyncronous receiver and transmitter means serially connected between said digital computer and said remote system controller.
6. A combination as in Claim 4 wherein said remote system controller includes decoder and sequencer means.
7. A combination as in Claim 5 wherein said remote system con-troller includes decoder and sequencer means.
8. In combination in a power load shedding system for controlling the operative status of plural controllable system loads each selectively connectable to a source of energy, comprising stored program controlled digital computer means including a central processing unit and memory means communicating with said central processing means, said memory means including data storage means for each load for storing the characteristics and status of the associated load, plural controlled switch means for selectively connecting and disconnecting the controllable system loads with the energy source, control circuitry responsive to signals issued by said computer means for controlling the status of said controlled switch means, and means for signaling to said computer means the power being consumed by the system loads, said computer means including means for projecting energy consumption over a measuring interval, excessive power signaling means for comparing said projected energy consumption with a permissible bound therefor and for signaling when the projected consumption exceeds said permissible bound therefor, load shedding means responsive to said excessive power signaling means indicating an excessive energy consumption projection for examining said data storage means for the system loads in said memory means for selectively operating said controlled switch means via said control circuitry to operatively disconnect selected system loads from the energy source, further comprising a first plurality of system loads connected to said controlled switch means and at least one additional system load, encoder means communicating with said central processing unit, a source of power, means for multiplexing power supplied by said power source and control signals generated by said encoder, and powerless remote terminal means comprising means selectively responsive to said multiplexed power and encoder supplied signals supplied by said multiplexing means for energizing said at least one additional load with the power supplied thereto.
9. A combination as in Claim 8 wherein said powerless remote terminal means includes a separation filter, decoder, and latch and relay means.
10. In combination in a power load shedding system for controlling the operative status of plural controllable system loads each selectively connectable to a source of energy, comprising stored program controlled digital computer means including a central processing unit and memory means communicating with said central processing means, said memory means in-cluding data storage means for each load for storing the characteristics and status of the associated load, plural controlled switch means for selectively connecting and disconnecting the controllable system loads with the energy source, control circuitry responsive to signals issued by said computer means for controlling the status of said controlled switch means, and means for signaling to said computer means the power being consumed by the system loads, said computer means including means for projecting energy consumption over a measuring interval, excessive power signaling means for comparing said projected energy consumption with a permissible bound therefor and for signaling when the projected consumption exceeds said permissible bound therefor, load shedding means responsive to said excessive power signaling means indicating an excessive energy consumption projection for examining said data storage means for the system loads in said memory means for selectively operating said controlled switch means via said control circuitry to operatively disconnect selected system loads from the energy source, wherein said energy consumption projecting means includes means for determining the present rate of energy consumption responsive to the signals provided by said consumption signaling means, means for determining the power consumed since the beginning of an operative cycle, means for computing the energy postulated to be consumed over the remainder of a monitoring interval by determining the product of the time remaining to the end of a monitoring period and the present rate of power consumption, and means for summing the energy actually consumed to present with the energy postulated to be consumed within the remainder of the measuring interval, wherein said product determining means includes means for effectively multiplying the power saved by turning a load off with the lesser of the period the load is to be shut off or the remainder of a monitoring interval.
11. A combination as in Claim 10 wherein said means for determining the present rate of consumption includes means for effecting a weighted average of signals indicative of power consumption during a most recent sampling interval and consumptions measured during earlier intervals.
12. In combination in a power load shedding system for controlling the operative status of plural controllable system loads each selectively connectable to a source of energy, comprising stored program controlled digital computer means including a central processing unit and memory means communicating with said central processing means, said memory means including data storage means for each load for storing the characteristics and status of the associated load, plural controlled switch means for selectively connecting and disconnecting the controllable system loads with the energy source, control circuitry responsive to signals issued by said computer means for controlling the status of said controlled switch means, and means for signaling to said computer means the power being consumed by the system loads, said computer means including means for projecting energy consumption over a measuring interval, excessive power signaling means for comparing said projected energy consumption with a permissible bound there-for and for signaling when the projected consumption exceeds said per-missible bound therefor, load shedding means responsive to said excessive power signaling means indicating an excessive energy consumption project-tion for examining said data storage means for the system loads in said memory means for selectively operating said controlled switch means via said control circuitry to operatively disconnect selected system loads from the energy source, wherein said data storage means for each load includes means for storing the relative priority of the associated load, and wherein said load shedding means comprises means for iteratively examining said data storage for the system loads on a monotonically in-creasing priority basis, said central processing unit shedding loads via said control circuitry and said controlled switch means on a monotonically increasing priority basis, wherein said data storage means for said loads includes load characteristics which are differently defined depending upon a system operation level variable, and means for prescribing a value for said system operational level variable.
13. A combination as in Claim 12 wherein said data storage means for the system loads includes level dependent minimum on and off times and priority variables, and level independent status, power and transaction time variables.
14. In combination in a power load shedding system for controlling the operative status of plural controllable system loads each selectively connectable to a source of energy, comprising stored program controlled digital computer means including a central processing unit and memory means communicating with said central processing means, said memory means including data storage means for each load for storing the characteristics and status of the associated load, plural controlled switch means for selectively con-necting and disconnecting the controllable system loads with the energy source, control circuitry responsive to signals issued by said computer means for controlling the status of said controlled switch means, and means for signaling to said computer means the power being consumed by the system loads, said computer means including means for projecting energy consumption over a measuring interval, excessive power signaling means for comparing said projected energy consumption with a permissible bound there-for and for signaling when the projected consumption exceeds said permissible bound therefor, load shedding means responsive to said excessive power signaling means indicating an excessive energy consumption projection for examining said data storage means for the system loads in said memory means for selectively operating said controlled switch means via said control circuitry to operatively disconnect selected system loads from the energy source, wherein said data storage means for each load includes parameters dependent upon an operational level, and wherein said load shedding means includes nested iteratively operative means, wherein the inner of said iteratively operative means selectively sheds loads by examining data storage for each load at given load characterizing priority, and wherein the outer of said nested iterative loops monotonically indexes on increasing priority.
15. In combination in a power load shedding system for controlling the operative status of plural controllable system loads each selectively connectable to a source of energy, comprising stored program controlled digital computer means including a central processing unit and memory means communicating with said central processing means, said memory means including data storage means for each load for storing the characteristics and status of the associated load, plural controlled switch means for selectively connecting and disconnecting the controllable system loads with the energy source, control circuitry responsive to signals issued by said computer means for controlling the status of said controlled switch means, and means for signaling to said computer means the power being con-sumed by the system loads, said computer means including means for pro-jecting energy consumption over a measuring interval, excessive power signaling means for comparing said projected energy consumption with a permissible bound therefor and for signaling when the projected consumption exceeds said permissible bound therefor, load shedding means responsive to said excessive power signaling means indicating an excessive energy con-sumption projection for examining said data storage means for the system loads in said memory means for selectively operating said controlled switch means via said control circuitry to operatively disconnect selected system loads from the energy source, wherein said data storage means for each load includes means for storing plural values for at least one load descriptor each operative for a distinct operational level, and said memory means in-cludes means defining the then obtaining operational level.
16. A combination as in Claim 15 wherein said central processing unit and memory means include indirect addressing means for processing load descriptors dependent upon said level defining means.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CA256,959A CA1048106A (en) | 1976-07-14 | 1976-07-14 | Power monitoring and load shedding system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CA256,959A CA1048106A (en) | 1976-07-14 | 1976-07-14 | Power monitoring and load shedding system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1048106A true CA1048106A (en) | 1979-02-06 |
Family
ID=4106427
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA256,959A Expired CA1048106A (en) | 1976-07-14 | 1976-07-14 | Power monitoring and load shedding system |
Country Status (1)
| Country | Link |
|---|---|
| CA (1) | CA1048106A (en) |
-
1976
- 1976-07-14 CA CA256,959A patent/CA1048106A/en not_active Expired
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