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BRPI0924512A2 - método e aparelho de fornecimento de execução de aplicativos seguros - Google Patents

método e aparelho de fornecimento de execução de aplicativos seguros

Info

Publication number
BRPI0924512A2
BRPI0924512A2 BRPI0924512A BRPI0924512A BRPI0924512A2 BR PI0924512 A2 BRPI0924512 A2 BR PI0924512A2 BR PI0924512 A BRPI0924512 A BR PI0924512A BR PI0924512 A BRPI0924512 A BR PI0924512A BR PI0924512 A2 BRPI0924512 A2 BR PI0924512A2
Authority
BR
Brazil
Prior art keywords
appliance
application execution
delivery method
secure application
execution delivery
Prior art date
Application number
BRPI0924512A
Other languages
English (en)
Inventor
Bernard Lint
Carlos V Rozas
David Durham
Dion Rodgers
Don A Van Dyke
Ernie Brickel
Francis X Mckeen
Gary Graunke
Gilbert Neiger
Howard C Herbert
Jiang Tao Li
John Garney
Joseph Cihula
Michael A Goldsmith
Prashant Dewan
Simon P Johnson
Stalinselvaraj Jeyasingh
Stephen J Tolopka
Stephen R Van Doren
Uday R Savagankar
Vincent R Scarlata
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=44196072&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=BRPI0924512(A2) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Intel Corp filed Critical Intel Corp
Publication of BRPI0924512A2 publication Critical patent/BRPI0924512A2/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1458—Protection against unauthorised use of memory or access to memory by checking the subject access rights
    • G06F12/1491—Protection against unauthorised use of memory or access to memory by checking the subject access rights in a hierarchical protection system, e.g. privilege levels, memory rings
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/72—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in cryptographic circuits
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/74—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information operating in dual or compartmented mode, i.e. at least one secure mode
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2221/00—Indexing scheme relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F2221/21—Indexing scheme relating to G06F21/00 and subgroups addressing additional information or applications relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F2221/2105—Dual mode as a secondary aspect

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Mathematical Physics (AREA)
  • Software Systems (AREA)
  • Storage Device Security (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Retry When Errors Occur (AREA)
BRPI0924512A 2009-12-22 2009-12-22 método e aparelho de fornecimento de execução de aplicativos seguros BRPI0924512A2 (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/US2009/069212 WO2011078855A1 (en) 2009-12-22 2009-12-22 Method and apparatus to provide secure application execution

Publications (1)

Publication Number Publication Date
BRPI0924512A2 true BRPI0924512A2 (pt) 2016-03-01

Family

ID=44196072

Family Applications (1)

Application Number Title Priority Date Filing Date
BRPI0924512A BRPI0924512A2 (pt) 2009-12-22 2009-12-22 método e aparelho de fornecimento de execução de aplicativos seguros

Country Status (7)

Country Link
JP (1) JP5443599B2 (pt)
KR (1) KR101457355B1 (pt)
CN (1) CN102473224B (pt)
BR (1) BRPI0924512A2 (pt)
DE (1) DE112009005466T5 (pt)
GB (2) GB2481563B (pt)
WO (1) WO2011078855A1 (pt)

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US20140189246A1 (en) * 2012-12-31 2014-07-03 Bin Xing Measuring applications loaded in secure enclaves at runtime
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US9430384B2 (en) * 2013-03-31 2016-08-30 Intel Corporation Instructions and logic to provide advanced paging capabilities for secure enclave page caches
US9087202B2 (en) 2013-05-10 2015-07-21 Intel Corporation Entry/exit architecture for protected device modules
US20160085955A1 (en) * 2013-06-10 2016-03-24 Doosra, Inc. Secure Storing and Offline Transferring of Digitally Transferable Assets
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US9698989B2 (en) * 2013-07-23 2017-07-04 Intel Corporation Feature licensing in a secure processing environment
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US9501668B2 (en) 2013-09-25 2016-11-22 Intel Corporation Secure video ouput path
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CN105745661B (zh) * 2013-12-19 2020-05-05 英特尔公司 对权限管理的内容的基于策略的受信任的检测
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US9448950B2 (en) 2013-12-24 2016-09-20 Intel Corporation Using authenticated manifests to enable external certification of multi-processor platforms
US9413765B2 (en) 2014-03-25 2016-08-09 Intel Corporation Multinode hubs for trusted computing
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US9703733B2 (en) * 2014-06-27 2017-07-11 Intel Corporation Instructions and logic to interrupt and resume paging in a secure enclave page cache
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US9710622B2 (en) * 2015-02-23 2017-07-18 Intel Corporation Instructions and logic to fork processes of secure enclaves and establish child enclaves in a secure enclave page cache
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CN109901880B (zh) * 2019-02-28 2020-11-20 瑞芯微电子股份有限公司 一种spinlock硬件电路及电子设备
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Also Published As

Publication number Publication date
KR101457355B1 (ko) 2014-11-04
GB2550698A (en) 2017-11-29
GB201709341D0 (en) 2017-07-26
WO2011078855A1 (en) 2011-06-30
JP5443599B2 (ja) 2014-03-19
DE112009005466T5 (de) 2012-10-31
KR20120099472A (ko) 2012-09-10
WO2011078855A9 (en) 2011-09-09
CN102473224A (zh) 2012-05-23
GB201118724D0 (en) 2011-12-14
GB2550698B (en) 2018-04-11
GB2481563B (en) 2017-07-19
CN102473224B (zh) 2016-10-12
JP2012530961A (ja) 2012-12-06
GB2481563A (en) 2011-12-28

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Legal Events

Date Code Title Description
B15K Others concerning applications: alteration of classification

Ipc: G06F 12/14 (2006.01), G06F 21/72 (2013.01), G06F 2

B06T Formal requirements before examination [chapter 6.20 patent gazette]
B11E Dismissal acc. art. 34 of ipl - requirements for examination incomplete
B11T Dismissal: dismissal of application maintained
B350 Update of information on the portal [chapter 15.35 patent gazette]