BRPI0917747A2 - dispositivo de informática com barreira de sincronização e processo de tratamento da informática - Google Patents
dispositivo de informática com barreira de sincronização e processo de tratamento da informáticaInfo
- Publication number
- BRPI0917747A2 BRPI0917747A2 BRPI0917747A BRPI0917747A BRPI0917747A2 BR PI0917747 A2 BRPI0917747 A2 BR PI0917747A2 BR PI0917747 A BRPI0917747 A BR PI0917747A BR PI0917747 A BRPI0917747 A BR PI0917747A BR PI0917747 A2 BRPI0917747 A2 BR PI0917747A2
- Authority
- BR
- Brazil
- Prior art keywords
- computer
- processing process
- synchronization barrier
- computer device
- computer processing
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores
- G06F9/522—Barrier synchronisation
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Multi Processors (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR0807089A FR2939922B1 (fr) | 2008-12-16 | 2008-12-16 | Gestionnaire physique de barriere de synchronisation entre processus multiples |
| PCT/FR2009/052322 WO2010070222A1 (fr) | 2008-12-16 | 2009-11-27 | Gestionnaire physique de barriere de synchronisation entre processus multiples |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| BRPI0917747A2 true BRPI0917747A2 (pt) | 2016-02-16 |
Family
ID=40785419
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| BRPI0917747A BRPI0917747A2 (pt) | 2008-12-16 | 2009-11-27 | dispositivo de informática com barreira de sincronização e processo de tratamento da informática |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US9218222B2 (pt) |
| EP (1) | EP2366147B1 (pt) |
| JP (1) | JP5626690B2 (pt) |
| BR (1) | BRPI0917747A2 (pt) |
| ES (1) | ES2689125T3 (pt) |
| FR (1) | FR2939922B1 (pt) |
| WO (1) | WO2010070222A1 (pt) |
Families Citing this family (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5568048B2 (ja) * | 2011-04-04 | 2014-08-06 | 株式会社日立製作所 | 並列計算機システム、およびプログラム |
| US9195516B2 (en) | 2011-12-01 | 2015-11-24 | International Business Machines Corporation | Determining collective barrier operation skew in a parallel computer |
| US9092272B2 (en) * | 2011-12-08 | 2015-07-28 | International Business Machines Corporation | Preparing parallel tasks to use a synchronization register |
| US8924763B2 (en) * | 2011-12-15 | 2014-12-30 | International Business Machines Corporation | Synchronizing compute node time bases in a parallel computer |
| JP5994601B2 (ja) * | 2012-11-27 | 2016-09-21 | 富士通株式会社 | 並列計算機、並列計算機の制御プログラム及び並列計算機の制御方法 |
| US20150033234A1 (en) * | 2013-07-23 | 2015-01-29 | Qualcomm Incorporated | Providing queue barriers when unsupported by an i/o protocol or target device |
| US9501300B2 (en) * | 2013-09-16 | 2016-11-22 | General Electric Company | Control system simulation system and method |
| WO2015163780A1 (en) * | 2014-04-23 | 2015-10-29 | Sciensys Sas | Program parallelization on procedure level in multiprocessor systems with logically shared memory |
| US10318355B2 (en) * | 2017-01-24 | 2019-06-11 | Oracle International Corporation | Distributed graph processing system featuring interactive remote control mechanism including task cancellation |
| US11353868B2 (en) | 2017-04-24 | 2022-06-07 | Intel Corporation | Barriers and synchronization for machine learning at autonomous machines |
| US10678925B2 (en) * | 2017-06-26 | 2020-06-09 | Microsoft Technology Licensing, Llc | Data quarantine and recovery |
| JP7159696B2 (ja) * | 2018-08-28 | 2022-10-25 | 富士通株式会社 | 情報処理装置,並列計算機システムおよび制御方法 |
| US10824481B2 (en) * | 2018-11-13 | 2020-11-03 | International Business Machines Corporation | Partial synchronization between compute tasks based on threshold specification in a computing system |
| US11409579B2 (en) * | 2020-02-24 | 2022-08-09 | Intel Corporation | Multiple independent synchonization named barrier within a thread group |
| US11531565B2 (en) * | 2020-05-08 | 2022-12-20 | Intel Corporation | Techniques to generate execution schedules from neural network computation graphs |
| US11461130B2 (en) | 2020-05-26 | 2022-10-04 | Oracle International Corporation | Methodology for fast and seamless task cancelation and error handling in distributed processing of large graph data |
| US11720360B2 (en) | 2020-09-11 | 2023-08-08 | Apple Inc. | DSB operation with excluded region |
| US20230153176A1 (en) * | 2021-11-17 | 2023-05-18 | Intel Corporation | Forward progress guarantee using single-level synchronization at individual thread granularity |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3482897B2 (ja) * | 1999-01-20 | 2004-01-06 | 日本電気株式会社 | クラスタ型並列計算機システムおよびプロセッサ間バリア同期方法 |
| US6766437B1 (en) * | 2000-02-28 | 2004-07-20 | International Business Machines Corporation | Composite uniprocessor |
| US7100021B1 (en) * | 2001-10-16 | 2006-08-29 | Cisco Technology, Inc. | Barrier synchronization mechanism for processors of a systolic array |
| JP4448784B2 (ja) * | 2005-03-15 | 2010-04-14 | 株式会社日立製作所 | 並列計算機の同期方法及びプログラム |
| US8645959B2 (en) * | 2005-03-30 | 2014-02-04 | Intel Corporaiton | Method and apparatus for communication between two or more processing elements |
| US7865911B2 (en) * | 2005-11-08 | 2011-01-04 | Microsoft Corporation | Hybrid programming |
| US7587555B2 (en) * | 2005-11-10 | 2009-09-08 | Hewlett-Packard Development Company, L.P. | Program thread synchronization |
| US7861060B1 (en) * | 2005-12-15 | 2010-12-28 | Nvidia Corporation | Parallel data processing systems and methods using cooperative thread arrays and thread identifier values to determine processing behavior |
| TWI318750B (en) * | 2006-09-22 | 2009-12-21 | Nuvoton Technology Corp | Software development methods, systems, and storage media storing software developed thereby |
| US20080109604A1 (en) * | 2006-11-08 | 2008-05-08 | Sicortex, Inc | Systems and methods for remote direct memory access to processor caches for RDMA reads and writes |
| JP2008234074A (ja) * | 2007-03-16 | 2008-10-02 | Fujitsu Ltd | キャッシュ装置 |
-
2008
- 2008-12-16 FR FR0807089A patent/FR2939922B1/fr not_active Expired - Fee Related
-
2009
- 2009-11-27 BR BRPI0917747A patent/BRPI0917747A2/pt active Search and Examination
- 2009-11-27 ES ES09797109.7T patent/ES2689125T3/es active Active
- 2009-11-27 US US13/139,989 patent/US9218222B2/en active Active
- 2009-11-27 WO PCT/FR2009/052322 patent/WO2010070222A1/fr not_active Ceased
- 2009-11-27 EP EP09797109.7A patent/EP2366147B1/fr active Active
- 2009-11-27 JP JP2011540156A patent/JP5626690B2/ja not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| US9218222B2 (en) | 2015-12-22 |
| JP2012512452A (ja) | 2012-05-31 |
| FR2939922B1 (fr) | 2011-03-04 |
| ES2689125T3 (es) | 2018-11-08 |
| JP5626690B2 (ja) | 2014-11-19 |
| EP2366147A1 (fr) | 2011-09-21 |
| EP2366147B1 (fr) | 2018-05-09 |
| WO2010070222A1 (fr) | 2010-06-24 |
| FR2939922A1 (fr) | 2010-06-18 |
| US20110252264A1 (en) | 2011-10-13 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| B06F | Objections, documents and/or translations needed after an examination request according art. 34 industrial property law | ||
| B06T | Formal requirements before examination | ||
| B09A | Decision: intention to grant | ||
| B11D | Dismissal acc. art. 38, par 2 of ipl - failure to pay fee after grant in time |