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BR9914992A - Processo para reduzir instabilidade no tempo de espera em um sistema que utiliza sincronização por recheio de bit e em um sincronizador, circuito sincronizador, e, rede de telecomunicações - Google Patents

Processo para reduzir instabilidade no tempo de espera em um sistema que utiliza sincronização por recheio de bit e em um sincronizador, circuito sincronizador, e, rede de telecomunicações

Info

Publication number
BR9914992A
BR9914992A BR9914992-3A BR9914992A BR9914992A BR 9914992 A BR9914992 A BR 9914992A BR 9914992 A BR9914992 A BR 9914992A BR 9914992 A BR9914992 A BR 9914992A
Authority
BR
Brazil
Prior art keywords
synchronizer
waiting time
bit
telecommunications network
instability
Prior art date
Application number
BR9914992-3A
Other languages
English (en)
Inventor
Michael J Rude
Original Assignee
Adc Telecommunications Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Adc Telecommunications Inc filed Critical Adc Telecommunications Inc
Publication of BR9914992A publication Critical patent/BR9914992A/pt

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/07—Synchronising arrangements using pulse stuffing for systems with different or fluctuating information rates or bit rates
    • H04J3/073—Bit stuffing, e.g. PDH

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Time-Division Multiplex Systems (AREA)

Abstract

''PROCESSO PARA REDUZIR INSTABILIDADE NO TEMPO DE ESPERA EM UM SISTEMA QUE UTILIZA SINCRONIZAçãO POR RECHEIO DE BIT E EM UM SINCRONIZADOR, CIRCUITO SINCRONIZADOR, E, REDE DE TELECOMUNICAçõES''. Circuitos e processos são descritos, os quais reduzem a instabilidade de tempo de espera em um sincronizador/multiplexador utilizando uma comparação ''sub-bit'' de um relógio associado com uma corrente de dados não sincronizados e um relógio associado com uma corrente de dados sincronizados para gerar um nível de limiar para utilizar na determinação de quando rechear com bits a corrente de dados sincronizados. O termo ''sub-bit'' significa que a diferença de fase quando medida por meio de, por exemplo, da localização de indicadores associados com os dois relógios é precisa até uma função de um bit.
BR9914992-3A 1998-11-02 1999-11-02 Processo para reduzir instabilidade no tempo de espera em um sistema que utiliza sincronização por recheio de bit e em um sincronizador, circuito sincronizador, e, rede de telecomunicações BR9914992A (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/184,627 US6229863B1 (en) 1998-11-02 1998-11-02 Reducing waiting time jitter
PCT/US1999/025801 WO2000027059A1 (en) 1998-11-02 1999-11-02 Reducing waiting time jitter

Publications (1)

Publication Number Publication Date
BR9914992A true BR9914992A (pt) 2001-07-24

Family

ID=22677692

Family Applications (1)

Application Number Title Priority Date Filing Date
BR9914992-3A BR9914992A (pt) 1998-11-02 1999-11-02 Processo para reduzir instabilidade no tempo de espera em um sistema que utiliza sincronização por recheio de bit e em um sincronizador, circuito sincronizador, e, rede de telecomunicações

Country Status (8)

Country Link
US (2) US6229863B1 (pt)
EP (1) EP1125387A1 (pt)
CN (1) CN1338165A (pt)
AU (1) AU1604600A (pt)
BR (1) BR9914992A (pt)
CA (1) CA2349344C (pt)
TW (1) TW454393B (pt)
WO (1) WO2000027059A1 (pt)

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US8681917B2 (en) 2010-03-31 2014-03-25 Andrew Llc Synchronous transfer of streaming data in a distributed antenna system
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Also Published As

Publication number Publication date
EP1125387A1 (en) 2001-08-22
AU1604600A (en) 2000-05-22
US6415006B2 (en) 2002-07-02
US20010022826A1 (en) 2001-09-20
TW454393B (en) 2001-09-11
CN1338165A (zh) 2002-02-27
CA2349344A1 (en) 2000-05-11
CA2349344C (en) 2003-07-08
WO2000027059A1 (en) 2000-05-11
US6229863B1 (en) 2001-05-08

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Legal Events

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B08F Application dismissed because of non-payment of annual fees [chapter 8.6 patent gazette]

Free format text: REFERENTE A 5A, 6A, 7A E 8A ANUIDADES.

B08K Patent lapsed as no evidence of payment of the annual fee has been furnished to inpi [chapter 8.11 patent gazette]

Free format text: REFERENTE AO DESPACHO 8.6 PUBLICADO NA RPI 1913 DE 04/09/2007.