BR9508427A - Protocolo de barramento de interrupção serial - Google Patents

Protocolo de barramento de interrupção serial

Info

Publication number: BR9508427A
Authority: BR; Brazil
Prior art keywords: bus protocol; interrupt bus; serial interrupt; serial; protocol
Prior art date: 1994-12-07

Application number

BR9508427A

Other languages

English (en)

Inventor

James Kardach

Sung Soo Cho

Nicholas B Peterson

Thomas R Lane

Jayesh M Joshi

Neil Songer

Original Assignee

Intel Corp

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1994-12-07

Filing date

1995-12-06

Publication date

1997-11-25

1995-12-06 Application filed by Intel Corp filed Critical Intel Corp

1997-11-25 Publication of BR9508427A publication Critical patent/BR9508427A/pt

Classifications

- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt

Landscapes

Engineering & Computer Science (AREA)
Theoretical Computer Science (AREA)
Physics & Mathematics (AREA)
General Engineering & Computer Science (AREA)
General Physics & Mathematics (AREA)
Bus Control (AREA)

BR9508427A 1994-12-07 1995-12-06 Protocolo de barramento de interrupção serial BR9508427A (pt)

Applications Claiming Priority (2)

Application Number	Priority Date	Filing Date	Title
US08/351,637 US5671421A (en)	1994-12-07	1994-12-07	Serial interrupt bus protocol
PCT/US1995/015824 WO1996018150A1 (en)	1994-12-07	1995-12-06	Serial interrupt bus protocol

Publications (1)

Publication Number	Publication Date
BR9508427A true BR9508427A (pt)	1997-11-25

Family

ID=23381702

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
BR9508427A BR9508427A (pt)	1994-12-07	1995-12-06	Protocolo de barramento de interrupção serial

Country Status (10)

Country	Link
US (2)	US5671421A (pt)
EP (1)	EP0796464B1 (pt)
JP (1)	JP3860209B2 (pt)
KR (1)	KR100269582B1 (pt)
CN (1)	CN1111789C (pt)
AU (1)	AU4416496A (pt)
BR (1)	BR9508427A (pt)
DE (1)	DE69530788T2 (pt)
TW (1)	TW305964B (pt)
WO (1)	WO1996018150A1 (pt)

Families Citing this family (27)

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Publication number	Priority date	Publication date	Assignee	Title
JPH0997177A (ja) *	1995-09-29	1997-04-08	Toshiba Corp	コンピュータシステムの割り込み制御方式
US5951669A (en) *	1996-12-27	1999-09-14	Apple Computer, Inc.	Method and apparatus for serialized interrupt transmission
FR2775091B1 (fr) *	1998-02-16	2000-04-28	Matra Communication	Procede de transfert de donnees en serie, et interface de bus serie synchrone mettant en oeuvre un tel procede
US6088752A (en) *	1998-08-06	2000-07-11	Mobility Electronics, Inc.	Method and apparatus for exchanging information between buses in a portable computer and docking station through a bridge employing a serial link
US6070214A (en) *	1998-08-06	2000-05-30	Mobility Electronics, Inc.	Serially linked bus bridge for expanding access over a first bus to a second bus
US7734852B1 (en)	1998-08-06	2010-06-08	Ahern Frank W	Modular computer system
US6374320B1 (en) *	1998-08-10	2002-04-16	Micron Technology, Inc	Method for operating core logic unit with internal register for peripheral status
US6321288B1 (en) *	1999-01-26	2001-11-20	National Semiconductor Corporation	Serial IRQ slave controller with auto-synchronization
US6725282B1 (en) *	1999-09-07	2004-04-20	Bath Iron Works	Method and apparatus for a wearable computer
EP1188120B1 (en) *	2000-02-14	2006-06-07	Tao Logic Systems LLC	Computer docking system and method
US6594719B1 (en)	2000-04-19	2003-07-15	Mobility Electronics Inc.	Extended cardbus/pc card controller with split-bridge ™technology
JP3908445B2 (ja) *	2000-08-01	2007-04-25	富士通株式会社	電子機器
US6665745B1 (en) *	2000-08-04	2003-12-16	Lsi Logic Corporation	Method and system for peripheral ordering
US6956614B1 (en)	2000-11-22	2005-10-18	Bath Iron Works	Apparatus and method for using a wearable computer in collaborative applications
US6962277B2 (en) *	2000-12-18	2005-11-08	Bath Iron Works Corporation	Apparatus and method for using a wearable computer in testing and diagnostic applications
JP4393014B2 (ja) *	2001-05-30	2010-01-06	パナソニック株式会社	伝送装置及び伝送方法
US7805114B1 (en)	2002-07-17	2010-09-28	Bath Iron Works Corporation	In situ re-configurable wireless communications system (IRCWCS)
JP2008532167A (ja) *	2005-02-28	2008-08-14	コーニンクレッカフィリップスエレクトロニクスエヌヴィ	割込み制御器を有するデータ処理システム及び割込み制御方法
US7395362B2 (en) *	2006-02-03	2008-07-01	Standard Microsystems Corporation	Method for a slave device to convey an interrupt and interrupt source information to a master device
US8185680B2 (en) *	2006-02-06	2012-05-22	Standard Microsystems Corporation	Method for changing ownership of a bus between master/slave devices
CN101432762B (zh) *	2006-04-26	2012-05-09	松下电器产业株式会社	信号传送方法、发送接收装置和通信系统
US7415557B2 (en) *	2006-06-06	2008-08-19	Honeywell International Inc.	Methods and system for providing low latency and scalable interrupt collection
US8108833B2 (en) *	2007-04-20	2012-01-31	National Instruments Corporation	Automatically generating a graphical data flow program from a statechart
CN102129413B (zh) *	2010-01-20	2013-07-10	研祥智能科技股份有限公司	一种串行中断处理的方法、装置及计算机系统
US9910801B2 (en) *	2014-08-01	2018-03-06	Universiti Teknologi Malaysia	Processor model using a single large linear registers, with new interfacing signals supporting FIFO-base I/O ports, and interrupt-driven burst transfers eliminating DMA, bridges, and external I/O bus
CN112711559B (zh) *	2021-01-15	2023-06-13	飞腾信息技术有限公司	串行中断方法、设备、串行中断处理方法以及处理器
CN116069694B (zh) *	2023-03-07	2023-07-14	苏州浪潮智能科技有限公司	中断处理方法、装置、服务器、电子设备及存储介质

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
BE887134A (fr) *	1979-12-14	1981-05-14	Gte Automatic Electric Lab Inc	Circuit expanseur d'interruption
WO1981002832A1 (en) *	1980-03-31	1981-10-15	Datamedix Inc	Medical monitor
JPS61107456A (ja) *	1984-10-30	1986-05-26	Toshiba Corp	割込制御方式
US5142628A (en) *	1986-12-26	1992-08-25	Hitachi, Ltd.	Microcomputer system for communication
US4805096A (en) *	1987-03-06	1989-02-14	Eta Systems, Inc.	Interrupt system
JPH01162967A (ja) *	1987-12-18	1989-06-27	Fujitsu Ltd	割込み処理方法及び装置
US5274795A (en) *	1989-08-18	1993-12-28	Schlumberger Technology Corporation	Peripheral I/O bus and programmable bus interface for computer data acquisition
JPH03142504A (ja) *	1989-10-30	1991-06-18	Toshiba Corp	プログラマブルコントローラ
JPH0743653B2 (ja) *	1990-07-25	1995-05-15	株式会社東芝	割込みコントローラ
US5418968A (en) *	1990-10-31	1995-05-23	Gobeli; Gregg P.	System and method for controlling interrupt processing
US5410710A (en) *	1990-12-21	1995-04-25	Intel Corporation	Multiprocessor programmable interrupt controller system adapted to functional redundancy checking processor systems
US5414860A (en) *	1991-01-29	1995-05-09	International Business Machines Incorporated	Power management initialization for a computer operable under a plurality of operating systems
JPH0520094A (ja) *	1991-07-17	1993-01-29	Toshiba Corp	情報処理装置
JP3171925B2 (ja) *	1992-04-30	2001-06-04	株式会社日立製作所	データ処理装置
US5396633A (en) *	1992-10-02	1995-03-07	Compaq Computer Corporation	Positive pulse format noise-filter and negative pulse format extension circuit for conditioning interrupt request signals
US5404460A (en) *	1994-01-28	1995-04-04	Vlsi Technology, Inc.	Method for configuring multiple identical serial I/O devices to unique addresses through a serial bus
US5475854A (en) *	1994-01-28	1995-12-12	Vlsi Technology, Inc.	Serial bus I/O system and method for serializing interrupt requests and DMA requests in a computer system
US5634069A (en) *	1994-01-28	1997-05-27	Vlsi Technology, Inc.	Encoding assertion and de-assertion of interrupt requests and DMA requests in a serial bus I/O system
US5613126A (en) *	1994-05-31	1997-03-18	Advanced Micro Devices, Inc.	Timer tick auto-chaining technique within a symmetrical multiprocessing system
US5790871A (en) *	1996-05-17	1998-08-04	Advanced Micro Devices	System and method for testing and debugging a multiprocessing interrupt controller

1994
- 1994-12-07 US US08/351,637 patent/US5671421A/en not_active Expired - Lifetime
1995
- 1995-12-06 AU AU44164/96A patent/AU4416496A/en not_active Abandoned
- 1995-12-06 KR KR1019970700074A patent/KR100269582B1/ko not_active Expired - Fee Related
- 1995-12-06 DE DE69530788T patent/DE69530788T2/de not_active Expired - Lifetime
- 1995-12-06 JP JP51773396A patent/JP3860209B2/ja not_active Expired - Fee Related
- 1995-12-06 BR BR9508427A patent/BR9508427A/pt not_active IP Right Cessation
- 1995-12-06 CN CN95194686A patent/CN1111789C/zh not_active Expired - Fee Related
- 1995-12-06 WO PCT/US1995/015824 patent/WO1996018150A1/en not_active Ceased
- 1995-12-06 EP EP95943003A patent/EP0796464B1/en not_active Expired - Lifetime
- 1995-12-27 TW TW084113950A patent/TW305964B/zh active
1997
- 1997-05-01 US US08/845,634 patent/US6055372A/en not_active Expired - Lifetime

Also Published As

Publication number	Publication date
CN1157046A (zh)	1997-08-13
US5671421A (en)	1997-09-23
WO1996018150A1 (en)	1996-06-13
JP3860209B2 (ja)	2006-12-20
CN1111789C (zh)	2003-06-18
US6055372A (en)	2000-04-25
KR100269582B1 (ko)	2000-10-16
TW305964B (pt)	1997-05-21
DE69530788D1 (de)	2003-06-18
AU4416496A (en)	1996-06-26
EP0796464B1 (en)	2003-05-14
EP0796464A4 (en)	1999-07-28
EP0796464A1 (en)	1997-09-24
DE69530788T2 (de)	2004-03-18
JPH10510381A (ja)	1998-10-06

Publication	Publication Date	Title
BR9508427A (pt)	1997-11-25	Protocolo de barramento de interrupção serial
DE69836426D1 (de)	2006-12-28	Universelles serielles bus-steuergerät
BR9710278A (pt)	1999-08-10	Processo afluente multifásico de duplo ciclo
DE69631327D1 (de)	2004-02-19	Synchrones dma-übertragungsprotokoll
DE69422750D1 (de)	2000-03-02	Serielles Bussystem
DE69515147D1 (de)	2000-03-30	Mehrfachprotokoll-Datenbussystem
DE69527365D1 (de)	2002-08-14	Hierarchische serielle busvorrichtung
DE69614658D1 (de)	2001-09-27	Protokoll für Unterbrechungssignale
DE69718710D1 (de)	2003-03-06	Busbrückenanordnung
IL116988A (en)	1999-12-31	Bus protocol
CA80865S (en)	1997-05-23	Bus
GB2292856B (en)	1999-04-28	Bus driver
DE59510974D1 (de)	2004-12-30	Bus-Treiberschaltung
FR2773238B1 (fr)	2003-01-10	Circuit de bus
BR9505054A (pt)	1997-10-14	Onibus articulado
HK1003278A (en)	1998-10-23	Serial interrupt bus protocol
KR960001360U (ko)	1996-01-19	버스의 운전석 분리대
KR970031950U (ko)	1997-07-24	버스의 이동손잡이
KR970026689U (ko)	1997-07-24	버스 손잡이
KR960008281U (ko)	1996-03-15	버스 승차대
KR970045856U (ko)	1997-07-31	버스의 행선지표시판
KR960024773U (ko)	1996-07-22	인터럽트 우선순위 처리장치
GB2341767B (en)	2003-10-22	Bus arbitration
KR960038397U (ko)	1996-12-18	버스제어장치
KR970045644U (ko)	1997-07-31	버스 중재회로

Legal Events

Date	Code	Title	Description
2003-12-23	FB36	Technical and formal requirements: requirement - article 36 of industrial property law
2004-05-18	B09A	Decision: intention to grant [chapter 9.1 patent gazette]
2004-06-22	B09X	Republication of the decision to grant [chapter 9.1.3 patent gazette]
2004-08-31	B16A	Patent or certificate of addition of invention granted [chapter 16.1 patent gazette]
2014-04-15	B24H	Lapse because of non-payment of annual fees (definitively: art 78 iv lpi)
2020-12-01	B24F	Patent annual fee: publication cancelled	Free format text: ANULADA A PUBLICACAO CODIGO 24.8 NA RPI NO 2258 DE 15/04/2014 POR TER SIDO INDEVIDA.
2020-12-22	B21F	Lapse acc. art. 78, item iv - on non-payment of the annual fees in time	Free format text: REFERENTE AS 16A, 17A, 18A, 19A E 20A ANUIDADES.
2021-04-13	B24J	Lapse because of non-payment of annual fees (definitively: art 78 iv lpi, resolution 113/2013 art. 12)	Free format text: EM VIRTUDE DA EXTINCAO PUBLICADA NA RPI 2607 DE 22-12-2020 E CONSIDERANDO AUSENCIA DE MANIFESTACAO DENTRO DOS PRAZOS LEGAIS, INFORMO QUE CABE SER MANTIDA A EXTINCAO DA PATENTE E SEUS CERTIFICADOS, CONFORME O DISPOSTO NO ARTIGO 12, DA RESOLUCAO 113/2013.