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BR9203871A - Sistema de barramento de elevado desempenho que utiliza transceptor e circuito acionador aperfeicoados - Google Patents

Sistema de barramento de elevado desempenho que utiliza transceptor e circuito acionador aperfeicoados

Info

Publication number
BR9203871A
BR9203871A BR929203871A BR9203871A BR9203871A BR 9203871 A BR9203871 A BR 9203871A BR 929203871 A BR929203871 A BR 929203871A BR 9203871 A BR9203871 A BR 9203871A BR 9203871 A BR9203871 A BR 9203871A
Authority
BR
Brazil
Prior art keywords
bus
perfected
transceiver
drive circuit
high performance
Prior art date
Application number
BR929203871A
Other languages
English (en)
Inventor
Robert J Christopher
Donald J Dacosta
Joseph C Diepenbrock
Phillip R Epley
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of BR9203871A publication Critical patent/BR9203871A/pt

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/017545—Coupling arrangements; Impedance matching circuits
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G06F13/4072—Drivers or receivers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/08—Modifications for reducing interference; Modifications for reducing effects due to line faults ; Receiver end arrangements for detecting or overcoming line faults

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Computing Systems (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Dc Digital Transmission (AREA)
  • Small-Scale Networks (AREA)
BR929203871A 1991-10-28 1992-10-05 Sistema de barramento de elevado desempenho que utiliza transceptor e circuito acionador aperfeicoados BR9203871A (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/783,801 US5220211A (en) 1991-10-28 1991-10-28 High speed bus transceiver with fault tolerant design for hot pluggable applications

Publications (1)

Publication Number Publication Date
BR9203871A true BR9203871A (pt) 1993-05-04

Family

ID=25130430

Family Applications (1)

Application Number Title Priority Date Filing Date
BR929203871A BR9203871A (pt) 1991-10-28 1992-10-05 Sistema de barramento de elevado desempenho que utiliza transceptor e circuito acionador aperfeicoados

Country Status (7)

Country Link
US (1) US5220211A (pt)
EP (1) EP0540449B1 (pt)
JP (1) JP2862112B2 (pt)
BR (1) BR9203871A (pt)
CA (1) CA2073105C (pt)
DE (1) DE69232705T2 (pt)
ES (1) ES2179819T3 (pt)

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JPH0677763A (ja) * 1992-06-17 1994-03-18 Texas Instr Inc <Ti> 伝送線路を終端する方法と装置
US5559967A (en) * 1993-03-18 1996-09-24 Apple Computer, Inc. Method and apparatus for a dynamic, multi-speed bus architecture in which an exchange of speed messages occurs independent of the data signal transfers
US5315175A (en) * 1993-03-18 1994-05-24 Northern Telecom Limited Quasi-differential bus
US5325355A (en) * 1993-03-19 1994-06-28 Apple Computer, Inc. Method and apparatus for implementing a common mode level shift in a bus transceiver incorporating a high speed binary data transfer mode with a ternary control transfer mode
US5374861A (en) * 1993-09-10 1994-12-20 Unisys Corporation Differential termination network for differential transmitters and receivers
DE4342036C2 (de) * 1993-12-09 2002-10-24 Conti Temic Microelectronic Datenbussystem
JP2882266B2 (ja) * 1993-12-28 1999-04-12 株式会社日立製作所 信号伝送装置及び回路ブロック
US5572141A (en) * 1994-03-09 1996-11-05 At&T Global Information Solutions Company Memory metal hot plug connector and method
US5430396A (en) * 1994-07-27 1995-07-04 At&T Corp. Backplane bus for differential signals
US5555510A (en) * 1994-08-02 1996-09-10 Intel Corporation Automatic computer card insertion and removal algorithm
US5940443A (en) * 1994-11-04 1999-08-17 Harris Corporation Parallel telephone bus segmentation system
FR2726708B1 (fr) * 1994-11-09 1997-01-31 Peugeot Dispositif d'adaptation d'une interface de ligne d'une station raccordee a un reseau de transmission d'informations multiplexees
US5574865A (en) * 1994-12-01 1996-11-12 Unisys Corporation System for data transfer protection during module connection/disconnection onto live bus
US5546017A (en) * 1995-03-23 1996-08-13 Micro Linear Corporation Hot insertable active SCSI terminator
US5546023A (en) * 1995-06-26 1996-08-13 Intel Corporation Daisy chained clock distribution scheme
US5585744A (en) * 1995-10-13 1996-12-17 Cirrus Logic, Inc. Circuits systems and methods for reducing power loss during transfer of data across a conductive line
US6115769A (en) * 1996-06-28 2000-09-05 Lsi Logic Corporation Method and apparatus for providing precise circuit delays
US6137688A (en) * 1996-12-31 2000-10-24 Intel Corporation Apparatus for retrofit mounting a VLSI chip to a computer chassis for current supply
US6018465A (en) * 1996-12-31 2000-01-25 Intel Corporation Apparatus for mounting a chip package to a chassis of a computer
US6070211A (en) * 1997-06-11 2000-05-30 International Business Machines Corporation Driver/receiver circuitry for enhanced PCI bus with differential signaling
JP3579856B2 (ja) * 1997-07-08 2004-10-20 株式会社日立製作所 半導体集積回路システム
WO1999027461A1 (de) * 1997-11-19 1999-06-03 Menico Ag Serieller daten- und steuer-bus mit versorgungsspannung
US6034553A (en) * 1998-01-09 2000-03-07 Pericom Semiconductor Corp. Bus switch having both p- and n-channel transistors for constant impedance using isolation circuit for live-insertion when powered down
US6032209A (en) * 1998-07-24 2000-02-29 Storage Technology Corporation Hot-swappable high speed point-to-point interface
DE19840086A1 (de) * 1998-09-03 2000-03-09 Philips Corp Intellectual Pty Schaltungsanordnung zur BIAS Einstellung von Buspegeln
JP3592943B2 (ja) * 1999-01-07 2004-11-24 松下電器産業株式会社 半導体集積回路及び半導体集積回路システム
US6282596B1 (en) 1999-03-25 2001-08-28 International Business Machines Corporation Method and system for hot-plugging a processor into a data processing system
US6557066B1 (en) 1999-05-25 2003-04-29 Lsi Logic Corporation Method and apparatus for data dependent, dual level output driver
US6294937B1 (en) 1999-05-25 2001-09-25 Lsi Logic Corporation Method and apparatus for self correcting parallel I/O circuitry
DE19959982C2 (de) * 1999-12-13 2001-10-04 Siemens Ag Verfahren und Anordnung zur Überwachung der Datenübertragung mittels differentiellen Übertragungsverfahren mit Gleichspannungsanteil
US6697896B1 (en) * 1999-12-31 2004-02-24 Intel Corporation Method and apparatus for implementing high speed signals using differential reference signals
US6630845B2 (en) * 2001-04-13 2003-10-07 Maxim Integrated Products, Inc. Semiconductor integrated circuit and communication device for logic input-state control during and following power-up
US6583656B1 (en) * 2002-08-21 2003-06-24 Pericom Semiconductor Corp. Differential clock driver with transmission-gate feedback to reduce voltage-crossing sensitivity to input skew
FR2852467B1 (fr) * 2003-03-13 2005-07-15 Excem Procede et dispositif pour la transmission sans diaphonie
US20050268019A1 (en) * 2004-06-01 2005-12-01 Che-Hui Chang Chien [interface and system for transmitting real-time data ]
US7205789B1 (en) * 2004-08-26 2007-04-17 Chris Karabatsos Termination arrangement for high speed data rate multi-drop data bit connections
TWI306692B (en) * 2005-12-09 2009-02-21 Ind Tech Res Inst Bidirectional current-mode transceiver
US7768297B2 (en) * 2007-01-31 2010-08-03 Rambus, Inc. Multi-drop bus system
US7750666B2 (en) * 2008-09-15 2010-07-06 Integrated Device Technology, Inc. Reduced power differential type termination circuit
CN111225489B (zh) * 2018-11-26 2021-06-11 杭州海康威视数字技术股份有限公司 一种电源传输电路和电子设备
CN116243634B (zh) * 2023-01-31 2024-07-05 齐鲁工业大学(山东省科学院) 一种适用于强干扰环境下的现场总线驱动电路

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JPS555615U (pt) * 1978-06-26 1980-01-14
JPS56158554A (en) * 1980-05-12 1981-12-07 Fujitsu Ltd Balancing transmission matching and terminating method
US4481625A (en) * 1981-10-21 1984-11-06 Elxsi High speed data bus system
US4736124A (en) * 1981-10-21 1988-04-05 Mcfarland Jr Harold L High speed data bus structure
US4595923A (en) * 1981-10-21 1986-06-17 Elxsi Improved terminator for high speed data bus
IT1157089B (it) * 1982-11-24 1987-02-11 Cselt Centro Studi Lab Telecom Circuito a bassa dissipazione per il pilotaggio di linee di trasmissione di segnali numerici ad alta velocita
JPS62128A (ja) * 1985-06-26 1987-01-06 Toshiba Corp ２値信号出力回路
JPS6211322A (ja) * 1985-07-09 1987-01-20 Matsushita Electric Ind Co Ltd Ｃｍｏｓラツチ回路
US4825402A (en) * 1986-04-04 1989-04-25 Ncr Corporation Multiconfigurable interface driver/receiver circuit for a computer printer peripheral adaptor
JPH0779231B2 (ja) * 1986-06-20 1995-08-23 富士通株式会社 インタフェイス回路
US4885484A (en) * 1988-07-05 1989-12-05 Motorola, Inc. Voltage clamped differential to single ended converter circuit
JPH0222567A (ja) * 1988-07-11 1990-01-25 Sharp Corp デューティ検出回路
US4890010A (en) * 1988-12-22 1989-12-26 Ncr Corporation Matched current source serial bus driver
US5043938A (en) * 1988-12-29 1991-08-27 Intel Corporation Node controller for a local area network
JPH02278594A (ja) * 1989-04-20 1990-11-14 Fujitsu Ltd 半導体集積回路
JP3217079B2 (ja) * 1991-02-14 2001-10-09 株式会社日立製作所 半導体集積回路

Also Published As

Publication number Publication date
CA2073105C (en) 1997-01-21
CA2073105A1 (en) 1993-04-29
DE69232705D1 (de) 2002-09-05
DE69232705T2 (de) 2003-02-06
ES2179819T3 (es) 2003-02-01
EP0540449A1 (en) 1993-05-05
JPH05235964A (ja) 1993-09-10
JP2862112B2 (ja) 1999-02-24
EP0540449B1 (en) 2002-07-31
US5220211A (en) 1993-06-15

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Legal Events

Date Code Title Description
EE Request for examination
FF Decision: intention to grant
FA11 Dismissal: dismissal - article 38, par. 2 of industrial property law