BR9200241A - Dispositivo acelerador diadico de operacoes para instrucoes de computador e metodo de operacao - Google Patents

Dispositivo acelerador diadico de operacoes para instrucoes de computador e metodo de operacao

Info

Publication number: BR9200241A
Authority: BR; Brazil
Prior art keywords: operating; computer instructions; accelerating device; daily; operating method
Prior art date: 1991-01-30

Application number

BR929200241A

Other languages

English (en)

Inventor

Stuart Sshermank Kreitzer

Original Assignee

Ibm

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1991-01-30

Filing date

1992-01-24

Publication date

1992-10-06

1992-01-24 Application filed by Ibm filed Critical Ibm

1992-10-06 Publication of BR9200241A publication Critical patent/BR9200241A/pt

Classifications

- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30029—Logical and Boolean instructions, e.g. XOR, NOT
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
- G06F9/30043—LOAD or STORE instructions; Clear instruction
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30181—Instruction operation extension or modification

Landscapes

Engineering & Computer Science (AREA)
Software Systems (AREA)
Theoretical Computer Science (AREA)
Physics & Mathematics (AREA)
General Engineering & Computer Science (AREA)
General Physics & Mathematics (AREA)
Executing Machine-Instructions (AREA)
Advance Control (AREA)
Memory System (AREA)

BR929200241A 1991-01-30 1992-01-24 Dispositivo acelerador diadico de operacoes para instrucoes de computador e metodo de operacao BR9200241A (pt)

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
US07/647,966 US5253349A (en)	1991-01-30	1991-01-30	Decreasing processing time for type 1 dyadic instructions

Publications (1)

Publication Number	Publication Date
BR9200241A true BR9200241A (pt)	1992-10-06

Family

ID=24598934

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
BR929200241A BR9200241A (pt)	1991-01-30	1992-01-24	Dispositivo acelerador diadico de operacoes para instrucoes de computador e metodo de operacao

Country Status (4)

Country	Link
US (1)	US5253349A (pt)
EP (1)	EP0497485A3 (pt)
JP (1)	JPH05143323A (pt)
BR (1)	BR9200241A (pt)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US5467473A (en) *	1993-01-08	1995-11-14	International Business Machines Corporation	Out of order instruction load and store comparison
US5761473A (en) *	1993-01-08	1998-06-02	International Business Machines Corporation	Method and system for increased instruction synchronization efficiency in a superscalar processsor system utilizing partial data dependency interlocking
US7089404B1 (en) *	1999-06-14	2006-08-08	Transmeta Corporation	Method and apparatus for enhancing scheduling in an advanced microprocessor
US7634635B1 (en)	1999-06-14	2009-12-15	Brian Holscher	Systems and methods for reordering processor instructions
US6748589B1 (en)	1999-10-20	2004-06-08	Transmeta Corporation	Method for increasing the speed of speculative execution
US6408376B1 (en) *	1999-10-25	2002-06-18	Intel Corporation	Method and apparatus for instruction set architecture to perform primary and shadow digital signal processing sub-instructions simultaneously
US6862677B1 (en) *	2000-02-16	2005-03-01	Koninklijke Philips Electronics N.V.	System and method for eliminating write back to register using dead field indicator
JP3450814B2 (ja) *	2000-09-26	2003-09-29	松下電器産業株式会社	情報処理装置
EP1387255B1 (en) *	2002-07-31	2020-04-08	Texas Instruments Incorporated	Test and skip processor instruction having at least one register operand
US7533309B2 (en) *	2004-02-26	2009-05-12	Nilanjan Mukherjee	Testing memories using algorithm selection
EP1825479A4 (en) *	2004-11-18	2008-04-16	Mentor Graphics Corp	METHOD AND DEVICE FOR AN INTEGRATED PROGRAMMABLE MEMORY SELF TEST (MBIST)
TWI607375B (zh) *	2012-11-05	2017-12-01	義隆電子股份有限公司	提升處理器之數值比較效能方法及應用在電子裝置進行數值比較的處理器

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US3699323A (en) *	1970-12-23	1972-10-17	Ibm	Error detecting and correcting system and method
US3659089A (en) *	1970-12-23	1972-04-25	Ibm	Error detecting and correcting system and method
US3816728A (en) *	1972-12-14	1974-06-11	Ibm	Modulo 9 residue generating and checking circuit
US4228498A (en) *	1977-10-12	1980-10-14	Dialog Systems, Inc.	Multibus processor for increasing execution speed using a pipeline effect
JPS5530782A (en) *	1978-08-28	1980-03-04	Hitachi Ltd	Execution control system of instruction
US4229801A (en) *	1978-12-11	1980-10-21	Data General Corporation	Floating point processor having concurrent exponent/mantissa operation
US4258419A (en) *	1978-12-29	1981-03-24	Bell Telephone Laboratories, Incorporated	Data processing apparatus providing variable operand width operation
US4346437A (en) *	1979-08-31	1982-08-24	Bell Telephone Laboratories, Incorporated	Microcomputer using a double opcode instruction
US4314350A (en) *	1979-12-31	1982-02-02	Bell Telephone Laboratories, Incorporated	Self-checking arithmetic unit
JPH0769818B2 (ja) *	1984-10-31	1995-07-31	株式会社日立製作所	デ−タ処理装置
JPS61296448A (ja) *	1985-06-25	1986-12-27	Nec Corp	電子計算機のデ−タ書込み制御方式
US4789956A (en) *	1985-10-16	1988-12-06	Harris Corp.	Maximum negative number detector
US4870607A (en) *	1986-07-03	1989-09-26	Nec Corporation	Error detection carried out by the use of unused modulo-m code
JPS63240625A (ja) *	1987-03-27	1988-10-06	Nec Corp	障害検出方式
JPH0833842B2 (ja) *	1987-05-01	1996-03-29	株式会社日立製作所	論理演算装置
JP2695178B2 (ja) *	1988-03-11	1997-12-24	富士通株式会社	演算回路
US4926374A (en) *	1988-11-23	1990-05-15	International Business Machines Corporation	Residue checking apparatus for detecting errors in add, subtract, multiply, divide and square root operations
US4890253A (en) *	1988-12-28	1989-12-26	International Business Machines Corporation	Predetermination of result conditions of decimal operations
US4926476A (en) *	1989-02-03	1990-05-15	Motorola, Inc.	Method and apparatus for secure execution of untrusted software
US5016208A (en) *	1989-07-11	1991-05-14	Tandem Computers Incorporated	Deferred comparison multiplier checker

1991
- 1991-01-30 US US07/647,966 patent/US5253349A/en not_active Expired - Lifetime
- 1991-10-08 JP JP3260262A patent/JPH05143323A/ja active Pending
1992
- 1992-01-21 EP EP19920300485 patent/EP0497485A3/en not_active Withdrawn
- 1992-01-24 BR BR929200241A patent/BR9200241A/pt unknown

Also Published As

Publication number	Publication date
EP0497485A2 (en)	1992-08-05
EP0497485A3 (en)	1993-11-24
US5253349A (en)	1993-10-12
JPH05143323A (ja)	1993-06-11

Publication	Publication Date	Title
BR9605223A (pt)	1998-07-21	Aparelho para processar uma primeira linguagem de descriçao de página e uma segunda linguagem de descriçao de página
DE69426714D1 (de)	2001-03-29	Dokumentverarbeitungsverfahren und Gerät
DE69232992D1 (de)	2003-05-08	Bildverarbeitungsverfahren und -Gerät
FI914440A7 (fi)	1991-09-20	Menetelmä ja laite jätteen käsittelemiseksi
DE69330574D1 (de)	2001-09-13	Bildverarbeitungsgerät und -methode
DE69429464D1 (de)	2002-01-31	Bildverarbeitungsverfahren- und gerät
DE69429962D1 (de)	2002-04-04	Bildverarbeitungsvorrichtung und -verfahren
DE69430464D1 (de)	2002-05-29	Bildverarbeitungsgerät und -verfahren
DE69427497D1 (de)	2001-07-26	Bildverarbeitungsvorrichtung und -verfahren
DE69033471D1 (de)	2000-04-06	Natürliche Sprache verarbeitendes Gerät
DE69429854D1 (de)	2002-03-21	Bildverarbeitungsverfahren und -gerät
DE69324290D1 (de)	1999-05-12	Bildverarbeitungsverfahren und -gerät
DE69430053D1 (de)	2002-04-11	Ganzzahldivisionsvorrichtung und -verfahren
DE69030279D1 (de)	1997-04-30	Bildverarbeitungsverfahren und -gerät
DE69329983D1 (de)	2001-04-12	Bildverarbeitungsverfahren und -vorrichtung
DE69324874D1 (de)	1999-06-17	Bildverarbeitungsverfahren und -gerät
DE69323222D1 (de)	1999-03-11	Bildbearbeitungsverfahren und -vorrichtung
KR920700163A (ko)	1992-02-19	찌꺼기 안정화 방법 및 장치
DE69333421D1 (de)	2004-04-01	Bildverarbeitungsverfahren und -vorrichtung
MX9206472A (es)	1993-05-01	Dispositivo y metodo para revisar trayectoria de recorrido
DE69324301D1 (de)	1999-05-12	Bildverarbeitungsvorrichtung und -verfahren
DE69329449D1 (de)	2000-10-26	Bildverarbeitungsvorrichtung und -verfahren
DE69415712D1 (de)	1999-02-18	Bildverarbeitungsverfahren und -vorrichtung
DE69426792D1 (de)	2001-04-12	Bildverarbeitungsverfahren und -gerät
BR9200241A (pt)	1992-10-06	Dispositivo acelerador diadico de operacoes para instrucoes de computador e metodo de operacao

Legal Events

Date	Code	Title	Description
1998-12-29	KF	Request for proof of payment of annual fee
2000-05-16	FD5	Application fees: dismissal - article 86 of industrial property law