BR8703295A - Matriz logica com geracao de saida de elemento programavel - Google Patents

Matriz logica com geracao de saida de elemento programavel

Info

Publication number: BR8703295A
Authority: BR; Brazil
Prior art keywords: element output; output generation; programmable element; logic matrix; logic
Prior art date: 1986-08-13

Application number

BR8703295A

Other languages

English (en)

Inventor

Roberto Paul Masleid

Martin Stanley Schmookler

Original Assignee

Ibm

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1986-08-13

Filing date

1987-06-29

Publication date

1988-04-05

1987-06-29 Application filed by Ibm filed Critical Ibm

1988-04-05 Publication of BR8703295A publication Critical patent/BR8703295A/pt

Classifications

- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/01—Modifications for accelerating switching
- H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
- H03K19/01707—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits
- H03K19/01721—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits by means of a pull-up or down element
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
- H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
- H03K19/17708—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays

Landscapes

Physics & Mathematics (AREA)
Mathematical Physics (AREA)
Engineering & Computer Science (AREA)
Computer Hardware Design (AREA)
Computing Systems (AREA)
General Engineering & Computer Science (AREA)
Logic Circuits (AREA)

BR8703295A 1986-08-13 1987-06-29 Matriz logica com geracao de saida de elemento programavel BR8703295A (pt)

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
US06/896,050 US4771284A (en)	1986-08-13	1986-08-13	Logic array with programmable element output generation

Publications (1)

Publication Number	Publication Date
BR8703295A true BR8703295A (pt)	1988-04-05

Family

ID=25405540

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
BR8703295A BR8703295A (pt)	1986-08-13	1987-06-29	Matriz logica com geracao de saida de elemento programavel

Country Status (6)

Country	Link
US (1)	US4771284A (pt)
EP (1)	EP0256336B1 (pt)
JP (1)	JPH0683064B2 (pt)
AR (1)	AR241380A1 (pt)
BR (1)	BR8703295A (pt)
DE (1)	DE3773582D1 (pt)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US4899308A (en) *	1986-12-11	1990-02-06	Fairchild Semiconductor Corporation	High density ROM in a CMOS gate array
US5264741A (en) *	1992-06-19	1993-11-23	Aptix Corporation	Low current, fast, CMOS static pullup circuit for static random-access memories
US5319261A (en) *	1992-07-30	1994-06-07	Aptix Corporation	Reprogrammable interconnect architecture using fewer storage cells than switches
US5719505A (en) *	1995-04-11	1998-02-17	International Business Machines Corporation	Reduced power PLA
US5712790A (en) *	1995-04-11	1998-01-27	International Business Machines Corporation	Method of power reduction in pla's
EP0738044A1 (en) *	1995-04-11	1996-10-16	International Business Machines Corporation	Reduced power PLA
JP3904537B2 (ja) *	2003-07-01	2007-04-11	沖電気工業株式会社	半導体記憶装置

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US3573509A (en) *	1968-09-09	1971-04-06	Texas Instruments Inc	Device for reducing bipolar effects in mos integrated circuits
JPS6057732B2 (ja) *	1976-12-17	1985-12-17	富士通株式会社	プログラム可能なｃｍｏｓ論理アレイ
JPS6057733B2 (ja) *	1976-12-23	1985-12-17	富士通株式会社	プログラム可能なｃｍｏｓ論理アレイ
JPS608558B2 (ja) *	1977-03-23	1985-03-04	日本電気株式会社	読出し専用記憶装置
US4255670A (en) *	1979-01-24	1981-03-10	Fairchild Camera And Instrument Corp.	Transistor logic tristate output with feedback
US4276617A (en) *	1979-06-28	1981-06-30	Raytheon Company	Transistor switching circuitry
US4313106A (en) *	1980-06-30	1982-01-26	Rca Corporation	Electrically programmable logic array
JPS5752234A (en) *	1980-09-12	1982-03-27	Pioneer Electronic Corp	Logical operation circuit
GB2089160B (en) *	1980-12-05	1985-04-17	Rca Corp	Programmable logic gates and networks
US4420695A (en) *	1981-05-26	1983-12-13	National Semiconductor Corporation	Synchronous priority circuit
JPS5897922A (ja) *	1981-12-07	1983-06-10	Toshiba Corp	論理積和回路
US4430585A (en) *	1981-12-30	1984-02-07	Bell Telephone Laboratories, Incorporated	Tristate transistor logic circuit with reduced power dissipation
DE3215671C2 (de) *	1982-04-27	1984-05-03	Siemens AG, 1000 Berlin und 8000 München	Programmierbare Logikanordnung
US4577190A (en) *	1983-04-11	1986-03-18	At&T Bell Laboratories	Programmed logic array with auxiliary pull-up means to increase precharging speed
CA1204171A (en) *	1983-07-15	1986-05-06	Stephen K. Sunter	Programmable logic array
JPS6160014A (ja) *	1984-08-31	1986-03-27	Fujitsu Ltd	プログラマブル・ロジツク・アレイ
EP0178437A1 (de) *	1984-09-19	1986-04-23	Siemens Aktiengesellschaft	Programmierbare Schaltung in dynamischer C-MOS-Technik

1986
- 1986-08-13 US US06/896,050 patent/US4771284A/en not_active Expired - Fee Related
1987
- 1987-05-08 JP JP62110914A patent/JPH0683064B2/ja not_active Expired - Lifetime
- 1987-06-29 BR BR8703295A patent/BR8703295A/pt not_active IP Right Cessation
- 1987-07-21 DE DE8787110545T patent/DE3773582D1/de not_active Expired - Lifetime
- 1987-07-21 EP EP87110545A patent/EP0256336B1/en not_active Expired
- 1987-08-04 AR AR87308339A patent/AR241380A1/es active

Also Published As

Publication number	Publication date
JPS6348013A (ja)	1988-02-29
US4771284A (en)	1988-09-13
EP0256336A3 (en)	1989-11-02
DE3773582D1 (de)	1991-11-14
EP0256336A2 (en)	1988-02-24
JPH0683064B2 (ja)	1994-10-19
AR241380A1 (es)	1992-06-30
EP0256336B1 (en)	1991-10-09

Publication	Publication Date	Title
DE3788974D1 (de)	1994-03-17	Programmierbare Array-Logik-Zelle.
DE68917235D1 (de)	1994-09-08	Programmierbare logische Schaltung.
DE3650598D1 (de)	1997-03-13	Programmierbare logische Schaltung
DE3782106D1 (de)	1992-11-12	Programmierbares cmos-logik-array.
NL191043C (nl)	1994-12-16	Programmeerbare logische array.
NO894790L (no)	1990-06-05	Beta-aminoboronsyrederivater.
IT1231505B (it)	1991-12-07	Elemento riscaldante.
ES515618A0 (es)	1983-12-16	Perfeccionamientos en una matriz de conmutacion por division de tiempo.
DE68928959D1 (de)	1999-04-29	Logik-Schaltungsanordnungen
DE3750926D1 (de)	1995-02-09	Synchrone Array-Logikschaltung.
NO168268C (no)	1992-01-29	Delt labyrinttetning.
BR8902215A (pt)	1990-01-02	Elemento e composicao de transferencia termica de corante
DE68913807D1 (de)	1994-04-21	Taktgeber.
DE3577009D1 (de)	1990-05-10	Photochrome verbindungen.
DE68922240D1 (de)	1995-05-24	Komplementärausgangsschaltung für eine logische Schaltung.
FI894225A7 (fi)	1990-03-13	Etoposidiliuokset
DE3680811D1 (de)	1991-09-19	Sourcefolger enthaltende cml-logikzellen.
BR8703295A (pt)	1988-04-05	Matriz logica com geracao de saida de elemento programavel
DE3587944D1 (de)	1994-12-15	Konfigurierbare logische Matrix.
DE68919873D1 (de)	1995-01-26	Ausgabeanordnung.
DE68924125D1 (de)	1995-10-12	Logikanalysator mit Doppel-Triggerung.
ES1012344Y (es)	1991-11-01	Elemento dosificador.
DK132289A (da)	1989-09-24	Kapslet urkasse
DE3577758D1 (de)	1990-06-21	Programmierbare uhr.
SE8503629D0 (sv)	1985-07-29	Programmerbar, mekanisk logikmodul

Legal Events

Date	Code	Title	Description
1995-01-31	FG	Letter patent granted
2008-07-29	B21A	Expiry acc. art. 78, item i of ipl- expiry of the term of protection	Free format text: PATENTE EXTINTA EM 29/06/2002