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BR8603240A - Meio de comunicacao para transferencia de dados,processo para transferencia de dados,processo de solicitacao de manutencao por um dispositivo e processo para ativar um de uma pluralidade de dispositivos acoplados a um meio de comunicacao - Google Patents

Meio de comunicacao para transferencia de dados,processo para transferencia de dados,processo de solicitacao de manutencao por um dispositivo e processo para ativar um de uma pluralidade de dispositivos acoplados a um meio de comunicacao

Info

Publication number
BR8603240A
BR8603240A BR8603240A BR8603240A BR8603240A BR 8603240 A BR8603240 A BR 8603240A BR 8603240 A BR8603240 A BR 8603240A BR 8603240 A BR8603240 A BR 8603240A BR 8603240 A BR8603240 A BR 8603240A
Authority
BR
Brazil
Prior art keywords
data transfer
activating
media
communication
devices coupled
Prior art date
Application number
BR8603240A
Other languages
English (en)
Inventor
Peter B Ashkin
Michael Clark
Original Assignee
Apple Computer
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Apple Computer filed Critical Apple Computer
Publication of BR8603240A publication Critical patent/BR8603240A/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0646—Configuration or reconfiguration
    • G06F12/0653—Configuration or reconfiguration with centralised address assignment
    • G06F12/0661—Configuration or reconfiguration with centralised address assignment and decentralised selection
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/368—Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control
    • G06F13/376—Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control using a contention resolving method, e.g. collision detection, collision avoidance
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L12/403—Bus networks with centralised control, e.g. polling

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computer And Data Communications (AREA)
  • Small-Scale Networks (AREA)
  • Information Transfer Systems (AREA)
  • Bus Control (AREA)
BR8603240A 1985-08-14 1986-07-10 Meio de comunicacao para transferencia de dados,processo para transferencia de dados,processo de solicitacao de manutencao por um dispositivo e processo para ativar um de uma pluralidade de dispositivos acoplados a um meio de comunicacao BR8603240A (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/765,396 US4910655A (en) 1985-08-14 1985-08-14 Apparatus for transferring signals and data under the control of a host computer

Publications (1)

Publication Number Publication Date
BR8603240A true BR8603240A (pt) 1987-03-17

Family

ID=25073454

Family Applications (1)

Application Number Title Priority Date Filing Date
BR8603240A BR8603240A (pt) 1985-08-14 1986-07-10 Meio de comunicacao para transferencia de dados,processo para transferencia de dados,processo de solicitacao de manutencao por um dispositivo e processo para ativar um de uma pluralidade de dispositivos acoplados a um meio de comunicacao

Country Status (10)

Country Link
US (1) US4910655A (pt)
JP (4) JPH0792784B2 (pt)
CN (1) CN1010261B (pt)
BR (1) BR8603240A (pt)
CA (2) CA1272807C (pt)
FR (1) FR2586331B1 (pt)
GB (1) GB2179225B (pt)
HK (4) HK95490A (pt)
IN (1) IN167031B (pt)
SG (1) SG47890G (pt)

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US5768542A (en) * 1994-06-08 1998-06-16 Intel Corporation Method and apparatus for automatically configuring circuit cards in a computer system
US5566304A (en) * 1995-05-08 1996-10-15 Apple Computer, Inc. Method of dynamic selection between immediate and delayed read access acknowledgement
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US5799203A (en) * 1996-05-17 1998-08-25 Advanced Micro Devices, Inc. System for receiving peripheral device capability information and selectively disabling corresponding processing unit function when the device failing to support such function
US6279114B1 (en) * 1998-11-04 2001-08-21 Sandisk Corporation Voltage negotiation in a single host multiple cards system
US6901457B1 (en) 1998-11-04 2005-05-31 Sandisk Corporation Multiple mode communications system
US6820148B1 (en) * 2000-08-17 2004-11-16 Sandisk Corporation Multiple removable non-volatile memory cards serially communicating with a host
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US6892267B2 (en) * 2002-04-15 2005-05-10 Relax Technology, Inc. Method for message transmission exploiting unused device addresses
CN1818796B (zh) * 2006-03-16 2010-11-10 上海微电子装备有限公司 光强数据总线系统及其总线控制器
JP2008041995A (ja) 2006-08-08 2008-02-21 Yazaki Corp プリント配線基板及びプリント配線基板の製造方法
EP1887452A1 (en) * 2006-08-09 2008-02-13 STMicroelectronics (Research & Development) Limited Human-Computer Interface
US11501809B1 (en) * 2021-06-15 2022-11-15 Arm Limited Contention-adapted read-write pulse generation circuitry

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Also Published As

Publication number Publication date
IN167031B (pt) 1990-08-18
JP2571741B2 (ja) 1997-01-16
CA1272807A (en) 1990-08-14
HK100890A (en) 1990-12-07
JPH0792784B2 (ja) 1995-10-09
HK95290A (en) 1990-11-23
JPH0652084A (ja) 1994-02-25
FR2586331A1 (fr) 1987-02-20
GB2179225A (en) 1987-02-25
CA1294710C (en) 1992-01-21
JPH0675894A (ja) 1994-03-18
CN86102839A (zh) 1987-02-11
HK95390A (en) 1990-11-23
FR2586331B1 (fr) 1994-01-14
JP2549599B2 (ja) 1996-10-30
HK95490A (en) 1990-11-23
JPH0650492B2 (ja) 1994-06-29
CA1272807C (en) 1990-08-14
SG47890G (en) 1990-10-26
GB8607632D0 (en) 1986-04-30
CN1010261B (zh) 1990-10-31
GB2179225B (en) 1990-02-21
US4910655A (en) 1990-03-20
JPH0644177A (ja) 1994-02-18
JPS6240569A (ja) 1987-02-21

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Legal Events

Date Code Title Description
FA2 Application deemed withdrawn (art. 19(5))
B15K Others concerning applications: alteration of classification

Ipc: G06F 13/362 (2006.01), G06F 12/06 (2006.0