BE1026021B1 - Power switch control - Google Patents

Abstract

A current switch controller (100) comprising a first current switching regulator (103-1), wherein the first current switching regulator (103-1) is configured based on a current reference value (105-1) and a first current reading (109-1) of a current flow through the first controllable one Switch (101-1) to generate a first PWM switching signal, wherein the first controllable switch (101-1) is designed to pass from a first switching state to a second switching state according to the first PWM switching signal, a second current switching regulator (103-2 ), wherein the second current switching regulator (103-2) is configured to supply a second PWM switching signal based on a current reference value (105-2) and a second current measurement value (109-2) of current flow through the second controllable switch (101-2) generate, wherein the second controllable switch (101-2) is adapted to transition from a third switching state to a fourth switching state according to the second PWM switching signal, and a reference value controller (111), which is configured, based on the first PWM switching signal and the second PWM switching signal, the current reference value (105-1, 105-2) separately for the first current switching regulator (103-1) and the second current switching regulator (103 -2) to change.

Description

The present disclosure relates to a current switch control for switching time control of controllable current switches.

Current switch controls are used in particular to control current signals of a plurality of interleaved converters in order to generate a sum signal, in particular a direct voltage signal, from individual current signals by alternately switching the interleaved converters. In order to prevent in particular high-frequency AC voltage components in the sum signal, it may be necessary to switch a current flow from the respective nested converter to an electrical consumer as a function of an output current strength of the respective nested converter. Usually, at least two interleaved converters are switched out of phase by half a switching period in order to generate a sum signal from two equipolar half-waves.

Since the respective switching time can be determined depending on the respective output current, a precise current measurement may be necessary, see "Digital current balancing for an interleaved boost PFC"; Texas Instruments. However, precise current measurement can be disadvantageously associated with increased manufacturing costs of the power switch control. A switching point in time determined from a faulty current measurement can deviate from the ideal switching point in time, so that the sum signal can have AC components in a disadvantageous manner. In particular, an AC power can be transmitted which exceeds a predetermined frequency-dependent power limit.

It is the object of the present disclosure to provide a current switch control which, with a cost and / or component-reduced current measuring device, realizes a precise switching of current signals to a sum signal with reduced AC voltage components.

This object is solved by the features of the independent claim. Advantageous embodiments are the subject of the dependent claims, the description and the accompanying figures.

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The present disclosure is based on the finding that the above object can be achieved by a current switch control which, in addition to a current switching regulator, has a reference value regulator for each controllable current switch. The reference value controller is designed to compensate for defective current measurement of current measuring devices, which measure the current flow through the respective controllable switch, by changing a current reference value. The respective current switching regulator is provided with the adapted current reference value and the respectively measured current measured value as input parameters, the respective current switching regulator generating a switching signal for the respective controllable switch. The reference value controller uses a difference in the switching signals of the respective current switching controllers to regulate the current reference value.

According to a first aspect, the disclosure relates to a current switch control for switching time regulation of controllable switches. The current switch control comprises a first controllable switch, which has a first switching state and a second switching state, and a first current switching regulator for switching control of the first controllable switch. The first current switching regulator is designed to generate a first pulse-width-modulated switching signal for controlling the first controllable switch on the basis of a current reference value and a first current measured value of a current flow through the first controllable switch that is detected by a further current measuring device. Furthermore, the first controllable switch is designed to transition from the first switching state into the second switching state in accordance with the second pulse-width-modulated switching signal.

The current switch control further comprises a second controllable switch, which has a third switching state and a fourth switching state, and a second current switching regulator for switching control of the second controllable switch. The second current switching regulator is designed to generate a second pulse-width-modulated switching signal for controlling the second controllable switch on the basis of a current reference value and a second current measured value of a current flow detected by a current measuring device. The second controllable switch is also designed to transition from the third switching state to the fourth switching state in accordance with the second pulse-width-modulated switching signal.

Furthermore, the current switch control comprises a reference value controller, which is designed on the basis of the first pulse-width-modulated switching signal and the

2018/5091 ₃ BE2018 / 5091 second pulse-width modulated switching signal to change the current reference value separately for the first current switching regulator and the second current switching regulator.

The power switch control can be used in particular for nested power factor correction circuits (PFC) to control an output signal. For these circuits it may be necessary not to exceed limit values for the AC components of the output signal. The limit values can be defined, for example, in a device specification, operation of the circuit being tied to compliance with the device specification. In particular, it may be necessary not to exceed the limit curve EMC class A according to DNV-GL Class Guideline due to the signal level of the output signal.

An assumed AC component of the output signal can be reduced if the controllable switches experience the same switching time. An accuracy of the switching time can be proportional to a measurement error of the current measuring devices, so that with an increasing deviation of the respective current measured value from the actual current strength of the current flowing through the respective switch, a deviation from an ideal switching time can increase. Accordingly, the switching times of the controllable switches can deviate from an ideal phase-shifted switching on, so that the current that flows through the first controllable switch is superimposed on the further current that flows through the second controllable switch. As a result, signal components can be generated which have a higher frequency than the output signal.

A measurement inaccuracy of the current measuring device, which is formed by a current measuring resistor, can be greater compared to other current measuring devices, with a deviation of the current measuring value provided by the current measuring device being compensated for by means of the reference value controller, so that the switching times of the controllable switches can be synchronous. The reference value controller can in particular be an additional control stage, which controls the input signals of the current switching regulator and forms a two-stage control unit with the respective current switching regulator.

With the reference value regulator connected upstream of the current switching regulators, it is advantageously possible to dispense with a precise current measurement and an erroneous current measured value by regulating the current reference value

2018/5091 ₄ BE2018 / 5091. As a result, systematic errors and / or constant magnitude errors of the current measured value can be compensated in particular.

Advantageously, a combination of reference value controller and current measuring devices with higher tolerance ranges can be produced more cheaply than a current measuring device with comparatively smaller tolerance ranges, so that the current switch control can be produced more cheaply. In particular, component costs for the current switch control can be reduced if the reference value regulator can be executed as part of a software program on a digital signal processor, the software program also comprising the first current switching regulator and the second current switching regulator.

The controllable switches can be designed to switch between the respective switching states in accordance with the pulse-width-modulated switching signal. In the first switching state, the first controllable switch can be designed to conduct an electrical current through the first controllable switch, and in the second switching state the first controllable switch can be designed to prevent current conduction through the first controllable switch. Accordingly, the second controllable switch can be designed to conduct an electrical current through the second controllable switch in the third switching state and to prevent current conduction through the second controllable switch in the fourth switching state.

In one embodiment, the first current switching regulator has a first proportional integrating-derivative (PID) regulator and is designed to process the first current measured value on the basis of the current reference value, in particular to subtract the first current measured value from the current reference value and this difference value as a first input signal to the first PID Controller. This achieves the advantage that the first current switching regulator can use the first PID regulator to counteract a difference between the current measured value and the reference value in order to reduce the difference. The smaller the difference, the smaller the deviation of the switching time of the first controllable switch from a target switching time, which can be coupled to the reference value.

In one embodiment, the first PID controller is designed to provide a first switching time control signal based on the first input signal. The PID controller can in particular form a continuously modulated control loop, which detects a deviation of the respective current measured value from the reference value and

2018/5091 ₅ BE2018 / 5091 to generate a correction value in the form of a switching time control signal. The controller can accumulate the deviation over a period of time, detect an increase in the course of the deviation over time, and / or have a proportional control signal component. In particular, the PID controller for the proportional, integrative and / or derivative control component can have a setting parameter with which the respective proportion of the control component in the switching time control signal can be set.

In one embodiment, the first current switching regulator has a first signal generator, which is designed to convert the first switching time control signal into the first pulse-width-modulated switching signal for controlling the first controllable current switch. The signal generator can in particular be designed to convert the switching time control signal, which can be a discrete digital signal, into a binary pulse-width-modulated signal, with which a length of switch-on phases of the first controllable current switch can be changed in relation to switch-off phases of the first controllable current switch. Furthermore, the signal generator can be designed to change a switching frequency of the first current switch.

In one embodiment, the second current switching regulator has a second proportional integral derivative (PID) regulator and is designed to process the second current measured value on the basis of the current reference value, in particular to subtract the second current measured value from the current reference value and as a second input signal to the second PID regulator provide.

In one embodiment, the second PID controller is designed to provide a second switching time control signal based on the second input signal.

In one embodiment, the second current switching regulator has a second signal generator, which is designed to convert the second switching time control signal into the first pulse-width-modulated switching signal for controlling the second controllable current switch.

In one embodiment, the reference value controller is designed to generate a reference value control signal and to process it with the current reference value, in particular to add the reference value control signal to the current reference value and / or to subtract it from the current reference value.

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In particular, the first current switching regulator can be provided with a sum signal consisting of the reference value control signal and the current reference value as an input signal, and the second current switching regulator can be provided with a difference signal consisting of the current reference value minus the reference value control signal. As a result, the reference value control signal can be used to reduce a temporal overlap of the switch-on time of the first controllable switch with the switch-on time of the second controllable switch. The current switching regulators can be provided with an adapted current reference value as an input signal by means of the reference value regulator, wherein the respective adapted current reference value can deviate from the respective other adapted current reference value by twice the amount of the reference value control signal. Accordingly, the switching times of the controllable switches can be adjusted simultaneously in the opposite direction. For example, a switching time of the first controllable switch can be delayed and a switching time of the second controllable switch can be brought forward.

In one embodiment, the reference value controller is designed to generate a difference value between the first pulse-width-modulated switching signal and the second pulse-width-modulated switching signal.

In one embodiment, the reference value controller has a further proportional integrating-derivative (PID) controller and is designed to provide the further PID controller with the difference value as an input signal, and the PID controller is designed to generate the reference value control signal.

The reference value controller can be designed to control the current switching controller in such a way that a difference between the first switching time control signal and the second switching time control signal is reduced, in particular minimized.

In one embodiment, the current switch control comprises a first current measuring device, which is designed to detect the first current measured value of a current flowing through the first controllable switch, and a second current measuring device, which is designed to detect the second current measured value of a current flowing through the second controllable switch , wherein the first current measuring device and / or the second current measuring device each comprise a current measuring resistor.

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The current measuring devices can each be connected downstream of an inductance of a nested converter in order to detect a current strength of a current flow through the respective inductance. The current measuring devices can be current transformers, for example, which are arranged in a switching path of the respective controllable current switch. The current regulators can independently regulate a current flow from the respective upstream nested converter to an electrical consumer.

In one embodiment, the first current switching regulator, the second current switching regulator and / or the reference value regulator are part of a digital signal processor (DSP) and / or the first current switching regulator, the second current switching regulator and / or the reference value regulator are at least partially implemented as a software program which is developed by the digital signal processor is executable.

As a result, the advantage can be realized that the manufacturing costs of the current switch control with the reference value controller do not exceed the manufacturing costs of a power switch control without a reference value controller or the additional amount is less than a manufacturing cost difference when using a precise current measuring device compared to less precise current measuring devices. The manufacturing costs for a current switch control can be lower, the more current measurements can be carried out using a less precise current measuring device, in particular with a current measuring resistor, and can be compensated for using the reference value regulator. The digital signal processor can furthermore have an internal periphery which is designed to amplify a current measurement signal, in particular the current measurement values.

In one embodiment, the first controllable switch and the second controllable switch are arranged electrically in parallel with one another, a control system comprising the first current switching regulator, the second current switching regulator and the reference value regulator being designed to apply the first pulse-width-modulated switching signal to the first controllable switch and the to act upon the second controllable switch with the second pulse-width-modulated switching signal.

In one embodiment, the control system is formed by controlling the respective switching time of the controllable switches, a current and / or a current frequency of a total current, which is the sum signal of the first

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BE2018 / 5091 controllable switch flowing current and the current flowing through the second controllable switch is regulated.

In one embodiment, the reference value controller is designed to compensate for a deviation of the first current measurement value from the current actually flowing through the first controllable switch and / or a deviation of the second current measurement value from the current actually flowing through the second controllable switch by means of a regulation of the current reference value in order to compensate dampen high-frequency current vibrations with a frequency in the range from 20 kHz to 30 MHz.

In one embodiment, the first pulse-width-modulated switching signal is phase-shifted by half a switching period in relation to the second pulse-width-modulated switching signal in order to compensate the current through the first controllable switch and the current through the second controllable switch against one another to form a direct current signal. Half the switching period can in particular deviate from a half period of the input signal, for example a mains sinusoidal voltage. Accordingly, a switching frequency of the controllable switches can in particular be greater than a frequency of the input signal in order to achieve efficient regulation of the output signal.

Further exemplary embodiments are explained with reference to the attached figures. Show it:

1 shows a current switch control in one embodiment;

2 shows an output signal level of a nested power factor correction circuit in one embodiment;

Fig. 3 shows a nested power factor correction circuit in one

embodiment; and

4A, 4B signal waveform representation of an output signal of a nested

Power factor correction circuit in one embodiment.

1 shows a schematic illustration of a current switch control 100 for switching time control of controllable switches 101-1, 101-2. The power switch control

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100 comprises a first controllable switch 101-1, which has a first switching state and a second switching state, and a first current switching regulator 103-1 for switching control of the first controllable switch 101-1. The first current switching regulator 1031 is designed, on the basis of a current reference value 105-1 and a first current measurement value 109-1 of a current flow detected by a first current measuring device 107-1, of a current flow through the first controllable switch 101-1, a first pulse-width-modulated switching signal PWM1 for controlling the first controllable switch 101-1. Furthermore, the first controllable switch 101-1 is designed to transition from the first switching state to the second switching state in accordance with the first pulse-width-modulated switching signal PWM1.

The current switch control 100 further comprises a second controllable switch 101-2, which has a third switching state and a fourth switching state, and a second current switching regulator 103-2 for switching control of the second controllable switch 101-2. The second current switching regulator 103-2 is designed, on the basis of a current reference value 105-2 and a second current measured value 109-2 of a current flow detected by a further current measuring device 107-2, of a current flow through the second controllable switch 101-2, a second pulse-width-modulated switching signal PWM2 for controlling the second to generate controllable switch 101-2, the second controllable switch 101-2 being designed to transition from the third switching state to the fourth switching state in accordance with the second pulse-width-modulated switching signal PWM2.

The current switch control further comprises a reference value controller 111, which is designed, based on the first pulse-width-modulated switching signal PWM1 and the second pulse-width-modulated switching signal PWM2, the current reference value 105-1, 105-2 each separately for the first current switching controller 103-1 and the second current switching controller 103-2 to change.

The first current switching regulator 103-1 has a first proportional-integrative-derivative PID regulator 115-1 and is designed to subtract the first current measurement value 109-1 from the current reference value 105-1 and to transmit this difference value as a first input signal to the first PID regulator 115- 1 to provide. The first

Current switching controller 103-1 also has a first signal generator 117-1, which is designed to convert the first switching time control signal duty_out1 into the first pulse-width-modulated switching signal PWM1 for controlling the first controllable current switch 101-1.

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The second current switching regulator 103-2 has a second proportional-integral-derivative PID regulator 115-2 and is designed to process the second current measurement value 109-2 on the basis of the current reference value 105-2, in particular the second current measurement value 109-2 from the current reference value Subtract 105-2 and provide it as a second input signal to the second PID controller 115-2. The second current switching regulator 103-2 also has a second signal generator 117-2, which is designed to convert the second switching time control signal duty_out2 into the second pulse-width-modulated switching signal PWM2 for controlling the second controllable current switch 101-2.

The reference value controller 111 has a further proportional-integrating-derivative PID controller 113 and is designed to provide the further PID controller 113 with the difference value as an input signal, and the PID controller 113 is designed to generate the reference value control signal.

The current switch control 100 further comprises the first current measuring device 107-1, which is designed to detect the first current measured value 109-1 of a current flowing through the first controllable switch 101-1, and the second current measuring device 107-2, which is designed, the second Current measurement value 109-2 of a current flowing through the second controllable switch 101-2. The first current measuring device 107-1 and the second current measuring device 107-2 each comprise a current measuring resistor 119-1, 119-2.

The first controllable switch 101-1 and the second controllable switch 101-2 are arranged electrically in parallel to one another, and a control system 121, which comprises the first current switching regulator 103-1, the second current switching regulator 103-2 and the reference value regulator 111, is the first to apply controllable switch 101-1 with the first pulse width modulated switching signal PWM1 and to apply the second controllable switch 101-2 with the second pulse width modulated switching signal PWM2.

The first controllable switch 101-1 is connected downstream of a first nested converter 123-1 and the second controllable switch 101-2 is connected downstream of a second nested converter 123-2. A voltage source 125 is connected upstream of the nested converters 123-1, 123-2. The voltage source 125 is in particular an alternating current source with a rectifier circuit. On

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The output signal of an interleaved power factor correction circuit 129 can be tapped at a signal output 127.

The reference value controller 111 is designed to have a deviation of the first current measurement 109-1 from the current actually flowing through the first controllable switch 101-1 and / or a deviation of the second current measurement 109-2 from the current actually flowing through the second controllable switch 101-2 To compensate for current by regulating the current reference value 105-1, 105-2 in order to dampen high-frequency current oscillations with a frequency in the range from 20 kHz to 30 MHz.

FIG. 2 shows a comparison diagram 200 of an output signal 201 of an interleaved power factor correction circuit and a further output signal 203 of a further interleaved power factor correction circuit according to the one in FIG.

shown embodiment. The controllable switches of the further nested power factor correction circuit are regulated by means of a current switch control according to the embodiment shown in FIG. 1, which in particular comprises a reference value regulator for regulating a current reference value. Furthermore, a power limit characteristic curve 205 is shown, which defines frequency-dependent maximum power limit values for the output signals 201, 203.

In particular in the frequency ranges from 60 kHz to 70 kHz and 120 kHz to 130 kHz, the output signal 201 exceeds the power limit values defined by means of the power limit characteristic 205. On the other hand, the output signal 203 has no exceedances of the power limit values in the frequency range under consideration.

FIG. 3 shows a schematic illustration of the interleaved power factor correction circuit 129 according to the embodiment shown in FIG. 1.

The voltage source 125 comprises an AC voltage generator 309 and a rectifier circuit, which is formed by a bridge rectifier. The bridge rectifier consists of an arrangement of four diodes 303-1 to 303-4, which are designed to convert an AC voltage signal from the AC voltage generator 309 into a DC voltage signal and to provide the nested converters 123-1, 123-2.

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The nested converters 123-1, 123-2 are connected downstream of the bridge rectifier and connected in parallel to one another. Furthermore, the nested converters 123-1, 123-2 each have an inductance 301-1, 301-2, which is followed by a diode 303-5, 303-6. Furthermore, the first controllable switch 101-1 is connected upstream of the inductance 301-1 and the second controllable switch 101-2 is connected upstream of the inductance 301-2. The first current measurement value 109-1 can be tapped between the first controllable switch 101-1 and the first current measurement resistor 119-1 and the second current measurement value 109-1 can be tapped between the second controllable switch 101-2 and the second current measurement resistor 119-1.

The nested converter 123-1, 123-2 is followed by a capacitor 305 and a resistor 307, which are each connected in parallel to the voltage source 125, the capacitor 305 being connected in parallel to the resistor 307. An output signal of the interleaved power factor correction circuit 129 is provided at the signal output 127.

The first controllable switch 101-1 is provided with the first pulse-width modulated switching signal PWM1 from the power switch control according to the embodiment shown in FIG. 1 and the second controllable switch 101-2 with the second pulse-width modulated switching signal PWM2 from the power switch control according to the embodiment shown in FIG. 1 provided.

FIG. 4A shows a temporal waveform representation 400 of the output signal 201 according to the embodiment shown in FIG. 2, both the sum signal 401 and the individual component signals 403-1, 403-2 of the respective nested converters being shown. The component signals 403-1, 403-2 are superimposed such that the sum signal 401 forms a sum of two phase-shifted sawtooth signals, which in particular have different maximum amplitudes, so that interference powers result above a nominal frequency of the sum signal 401 or output signal. The temporal course of the component signals 4031, 403-2 is determined in each case by the controllable switches in accordance with the embodiment shown in FIG. 1. The output signal 201 can be generated in particular in the case of an asynchronous connection of the controllable switches to one another.

FIG. 4B shows a temporal signal waveform representation 400 of the further output signal according to the embodiment shown in FIG. 2, both the sum signal 405 and the individual component signals 407-1, 407-2 of the respective interleaved

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Converter are shown. The component signals 403-1, 403-2 are superimposed such that the sum signal 405 forms a sum of two phase-shifted sawtooth signals, which in particular have the same maximum amplitudes, so that interference powers above a nominal frequency of the sum signal 405 or the further output signal are prevented. The time course of the

Component signals 407-1, 407-2 are each determined by the controllable switches according to the embodiment shown in FIG. 1. The sum signal 405 can be generated in particular when the controllable switches are switched synchronously with one another.

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LIST OF REFERENCE NUMBERS

100 power switch control

101-1 Controllable switch

101-2 Controllable switch

103-1 First current switching regulator

103-2 Second current switching regulator

105-1 current reference value

105-2 current reference value

107-1 First ammeter

107-2 Second ammeter

109-1 First current reading

109-2 Second current reading

111 reference value controller

113 PID controller

115-1 PID controller

115-2 PID controller

117-1 First signal generator

117-2 Second signal generator

119-1 current measuring resistor

119-2 current measuring resistor

121 rule network

123-1 First nested converter

123-2 Second nested converter

125 voltage source

127 signal output

129 Nested Power Factor Correction Circuit

200 comparison illustration

201 output signal

203 output signal

205 Performance limit characteristic

301-1 inductance

301-2 inductance

303-1 diode

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303-2 diode

303-3 diode

303-4 diode

303-5 diode

303-6 diode

305 capacitor

307 resistance

309 AC voltage generator

400 waveform display over time

401 sum signal

403-1 component signal

403-2 component signal

405 sum signal

407-1 component signal

407-2 component signal

Claims (16)

1. Power switch control (100) for switching time control of controllable switches (101-1, 101-2), with: a first controllable switch (101-1) which has a first switching state and a second switching state; a first current switching regulator (103-1) for switching control of the first controllable switch, the first current switching regulator (103-1) being designed on the basis of a current reference value (105-1) and a first current measured value detected by a first current measuring device (107-1) (109-1) a current flow through the first controllable switch (101-1) to generate a first pulse-width-modulated switching signal for controlling the first controllable switch (101-1); wherein the first controllable switch (101-1) is designed to transition from the first switching state to the second switching state in accordance with the first pulse-width-modulated switching signal; a second controllable switch (101-2) which has a first switching state and a second switching state; a second current switching regulator (103-2) for switching control of the second controllable switch (101-2), the second current switching regulator (103-2) being designed on the basis of a current reference value (105-2) and one of a further current measuring device (107- 2) detected second current measurement value (109-2) of a current flow through the second controllable switch (101-2) to generate a second pulse-width-modulated switching signal for controlling the second controllable switch (101-2), the second controllable switch (101-2) is designed to transition from the third switching state to the fourth switching state in accordance with the second pulse-width-modulated switching signal; and a reference value controller (111), which, based on the first pulse-width-modulated switching signal and the second pulse-width-modulated switching signal, the current reference value (105-1, 105-2) each separately for the first current switching controller (103-1) and the second current switching controller (103 -2) to change. 2018/5091 ₁₇ BE2018 / 5091 2. Current switch control (100) according to one of the preceding claims, wherein the first current switching regulator (103-1) has a first proportional-integrating-derivative (PID) regulator (115-1) and is designed to measure the first current measurement value (109-1) to process on the basis of the current reference value (105-1), in particular to subtract the first current measurement value (109-1) from the current reference value (105-1) and to provide this difference value as a first input signal to the first PID controller (115-1). 3. The power switch control (100) according to claim 2, wherein the first PID controller (115-1) is designed to provide a first switching time control signal based on the first input signal. 4. Current switch control (100) according to claim 3, wherein the first current switching regulator (103-1) has a first signal generator (117-1) which is designed to convert the first switching time control signal into the first pulse-width-modulated switching signal for controlling the first controllable current switch (101- 1) to walk. 5. Current switch control (100) according to one of the preceding claims, wherein the second current switching regulator (103-2) has a second proportional-integral-derivative (PID) regulator (115-2) and is designed to measure the second current value (109-2) to process on the basis of the current reference value (105-2), in particular to subtract the second current measurement value (109-2) from the current reference value (105-2) and to provide it as a second input signal to the second PID controller (115-2). 6. The power switch control (100) according to claim 5, wherein the second PID controller (115-2) is designed to provide a second switching time control signal based on the second input signal. 7. The power switch control (100) according to claim 6, wherein the second power switching regulator (103-2) has a second signal generator (117-2) which is designed to convert the second switching time control signal into the first pulse-width-modulated switching signal for controlling the second controllable current switch (101- 2) to walk. 8. Current switch control (100) according to one of the preceding claims, wherein the reference value controller (111) is designed to generate a reference value control signal and to process this with the current reference value (105-1, 105-2), in particular that 2018/5091 BE2018 / 5091 Add reference value control signal to the current reference value (105-1) and / or subtract from the current reference value (105-2). 9. Power switch control (100) according to one of the preceding claims, wherein the reference value controller (111) is designed to generate a difference value between the first pulse-width-modulated switching signal and the second pulse-width-modulated switching signal. 10. The power switch control (100) according to claim 9, wherein the reference value controller (111) has a further proportional-integrating-derivative (PID) controller (113) and is designed to provide the further PID controller (113) with the difference value as an input signal. and wherein the PID controller (113) is designed to generate the reference value control signal. 11. Current switch control (100) according to one of the preceding claims, with the first current measuring device (107-1), which is designed to detect the first current measured value (109-1) of a current flowing through the first controllable switch (101-1), and with the second current measuring device (107-2), which is designed to detect the second current measured value (109-2) of a current flowing through the second controllable switch (101-2), the first current measuring device (107-1) and / or the second current measuring device (107-2) each comprise a current measuring resistor (119-1, 119-2). 12. Current switch control (100) according to one of the preceding claims, wherein the first current switching regulator (103-1), the second current switching regulator (103-2) and / or the reference value regulator (111) are part of a digital signal processor (DSP) and / or wherein the first current switching regulator (103-1), the second current switching regulator (103-2) and / or the reference value regulator (111) are at least partially implemented as a software program which can be executed by the digital signal processor. 13. Current switch control (100) according to one of the preceding claims, wherein the first controllable switch (101-1) and the second controllable switch (101-2) are arranged electrically in parallel to one another, and wherein a control system (121) comprising the first current switching regulator (103-1), the second current switching regulator (103-2) and the reference value regulator (111) is designed to apply the first pulse-width-modulated switching signal to the first controllable switch (101-1) and the second controllable switch (101-2) to be loaded with the second pulse-width-modulated switching signal. 2018/5091 ₁₉ BE2018 / 5091 14. Power switch control (100) according to claim 13, wherein the control system (121) is formed by controlling the respective switching times of the controllable switches (101-1, 101-2) a current and / or a current frequency Total current, which is formed as a sum signal of the current flowing through the first controllable switch (101-1) and the current flowing through the second controllable switch (1012). 15. Current switch control (100) according to one of the preceding claims, wherein the reference value controller (111) is designed, a deviation of the first current measured value (109-1) from the current actually flowing through the first controllable switch (101-1) and / or Compensate for the deviation of the second current measurement value (109-2) from the current actually flowing through the second controllable switch (101-2) by means of a regulation of the current reference value (105-1, 105-2) in order to produce high-frequency current oscillations with a frequency in the range attenuate from 20 kHz to 30 MHz. 16. Current switch control (100) according to one of the preceding claims, wherein the first pulse-width-modulated switching signal is phase-shifted by half a switching period in relation to the second pulse-width-modulated switching signal, in order to sum the current through the first controllable switch (101-1) and the current through the second controllable switch (101-2) against each other to compensate for a DC signal.