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AU507254B2 - Double phase locked loop receiver - Google Patents

Double phase locked loop receiver

Info

Publication number
AU507254B2
AU507254B2 AU19763/76A AU1976376A AU507254B2 AU 507254 B2 AU507254 B2 AU 507254B2 AU 19763/76 A AU19763/76 A AU 19763/76A AU 1976376 A AU1976376 A AU 1976376A AU 507254 B2 AU507254 B2 AU 507254B2
Authority
AU
Australia
Prior art keywords
locked loop
phase locked
double phase
loop receiver
receiver
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
AU19763/76A
Other versions
AU1976376A (en
Inventor
F. and Vander Wurf P DeJager
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Publication of AU1976376A publication Critical patent/AU1976376A/en
Application granted granted Critical
Publication of AU507254B2 publication Critical patent/AU507254B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/10—Frequency-modulated carrier systems, i.e. using frequency-shift keying
    • H04L27/14—Demodulator circuits; Receiver circuits
    • H04L27/144—Demodulator circuits; Receiver circuits with demodulation using spectral properties of the received signal, e.g. by using frequency selective- or frequency sensitive elements
    • H04L27/152—Demodulator circuits; Receiver circuits with demodulation using spectral properties of the received signal, e.g. by using frequency selective- or frequency sensitive elements using controlled oscillators, e.g. PLL arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/10—Frequency-modulated carrier systems, i.e. using frequency-shift keying
    • H04L27/14—Demodulator circuits; Receiver circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/027—Speed or phase control by the received code signals, the signals containing no special synchronisation information extracting the synchronising or clock signal from the received signal spectrum, e.g. by using a resonant or bandpass circuit

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
AU19763/76A 1975-11-21 1976-11-18 Double phase locked loop receiver Expired AU507254B2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
NLNL7513610 1975-11-21
NL7513610A NL7513610A (en) 1975-11-21 1975-11-21 RECEIVER FOR SYNCHRONOUS SIGNALS WITH DOUBLE PHASE-LOCKED LOOP.

Publications (2)

Publication Number Publication Date
AU1976376A AU1976376A (en) 1978-05-25
AU507254B2 true AU507254B2 (en) 1980-02-07

Family

ID=19824895

Family Applications (1)

Application Number Title Priority Date Filing Date
AU19763/76A Expired AU507254B2 (en) 1975-11-21 1976-11-18 Double phase locked loop receiver

Country Status (8)

Country Link
JP (1) JPS5264260A (en)
AU (1) AU507254B2 (en)
CA (1) CA1066782A (en)
DE (1) DE2651043C3 (en)
FR (1) FR2332660A1 (en)
GB (1) GB1507638A (en)
NL (1) NL7513610A (en)
SE (1) SE410693B (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4166979A (en) 1976-05-10 1979-09-04 Schlumberger Technology Corporation System and method for extracting timing information from a modulated carrier
DE2823343B1 (en) * 1978-05-29 1979-08-16 Siemens Ag Method and arrangement for clock signal recovery in digital signal transmission
FR2441298A1 (en) * 1978-11-07 1980-06-06 Cit Alcatel RHYTHM RECOVERY DEVICE
JPS55165648A (en) * 1979-06-12 1980-12-24 Nec Corp Method of sorting and inspecting semiconductor device
ZA805414B (en) * 1979-09-14 1981-08-26 Plessey Overseas Arrangements for data timing recovery from distorted signals for use in adaptive modems with multi-level coding
JP2804755B2 (en) * 1986-09-01 1998-09-30 株式会社日立製作所 FSK signal demodulation circuit
CN107037487B (en) * 2016-02-04 2023-06-20 中国石油化工集团有限公司 An Interwell Electromagnetic Synchronous Measurement System

Also Published As

Publication number Publication date
AU1976376A (en) 1978-05-25
DE2651043A1 (en) 1977-05-26
SE7612875L (en) 1977-05-22
NL7513610A (en) 1977-05-24
GB1507638A (en) 1978-04-19
SE410693B (en) 1979-10-22
FR2332660A1 (en) 1977-06-17
DE2651043B2 (en) 1980-09-11
DE2651043C3 (en) 1981-07-30
JPS5264260A (en) 1977-05-27
CA1066782A (en) 1979-11-20

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