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AU2553592A - Computer graphics system - Google Patents

Computer graphics system

Info

Publication number
AU2553592A
AU2553592A AU25535/92A AU2553592A AU2553592A AU 2553592 A AU2553592 A AU 2553592A AU 25535/92 A AU25535/92 A AU 25535/92A AU 2553592 A AU2553592 A AU 2553592A AU 2553592 A AU2553592 A AU 2553592A
Authority
AU
Australia
Prior art keywords
computer graphics
graphics system
computer
graphics
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU25535/92A
Inventor
Joseph Bouchard
Colyn Case
Robert Crouse
Blaise Fanning
Kevin Fielding
Chris Franklin
Rodney Gamache
John Irwin
John Kirk
Srinivasan Krishnaswami
George Lord
Agnes M Masucci
Kim Meinerth
Ali Moezzi
Christopher J Payson
George Scott
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Digital Equipment Corp
Original Assignee
Digital Equipment Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US07/748,360 external-priority patent/US5321806A/en
Priority claimed from US07/748,357 external-priority patent/US5313577A/en
Application filed by Digital Equipment Corp filed Critical Digital Equipment Corp
Publication of AU2553592A publication Critical patent/AU2553592A/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/393—Arrangements for updating the contents of the bit-mapped memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3877—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor
    • G06F9/3879—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor for non-native instruction execution, e.g. executing a command; for Java instruction set
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/02—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the way in which colour is displayed
    • G09G5/06—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the way in which colour is displayed using colour palettes, e.g. look-up tables
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/08—Cursor circuits
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/363—Graphics controllers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0815—Cache consistency protocols
    • G06F12/0831—Cache consistency protocols using a bus scheme, e.g. with bus monitoring or watching means
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/04—Partial updating of the display screen
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/12—Frame memory handling
    • G09G2360/121—Frame memory handling using a cache memory
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/12—Frame memory handling
    • G09G2360/123—Frame memory handling using interleaving
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/12—Frame memory handling
    • G09G2360/126—The frame memory having additional data ports, not inclusive of standard details of the output serial port of a VRAM

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Graphics (AREA)
  • Image Generation (AREA)
AU25535/92A 1991-08-21 1992-08-21 Computer graphics system Abandoned AU2553592A (en)

Applications Claiming Priority (18)

Application Number Priority Date Filing Date Title
US748361 1985-06-24
US748357 1985-06-24
US748359 1985-06-24
US74835591A 1991-08-21 1991-08-21
US74836291A 1991-08-21 1991-08-21
US74836191A 1991-08-21 1991-08-21
US74835691A 1991-08-21 1991-08-21
US74835891A 1991-08-21 1991-08-21
US74835991A 1991-08-21 1991-08-21
US74836391A 1991-08-21 1991-08-21
US748356 1991-08-21
US748358 1991-08-21
US748363 1991-08-21
US07/748,360 US5321806A (en) 1991-08-21 1991-08-21 Method and apparatus for transmitting graphics command in a computer graphics system
US07/748,357 US5313577A (en) 1991-08-21 1991-08-21 Translation of virtual addresses in a computer graphics system
US748355 1991-08-21
US748360 1991-08-21
US748362 1996-11-13

Publications (1)

Publication Number Publication Date
AU2553592A true AU2553592A (en) 1993-03-16

Family

ID=27578910

Family Applications (1)

Application Number Title Priority Date Filing Date
AU25535/92A Abandoned AU2553592A (en) 1991-08-21 1992-08-21 Computer graphics system

Country Status (2)

Country Link
AU (1) AU2553592A (en)
WO (1) WO1993004462A1 (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5715437A (en) 1994-11-10 1998-02-03 Brooktree Corporation System for, and method of, processing in hardware commands received from software without polling of the hardware by the software
JPH09508724A (en) * 1995-06-07 1997-09-02 インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン Computer system with optimized display controller
US6266753B1 (en) 1997-07-10 2001-07-24 Cirrus Logic, Inc. Memory manager for multi-media apparatus and method therefor
US5914730A (en) * 1997-09-09 1999-06-22 Compaq Computer Corp. System and method for invalidating and updating individual GART table entries for accelerated graphics port transaction requests
US6313845B1 (en) * 1998-06-30 2001-11-06 3Dlabs Inc. Ltd. Method and apparatus for transporting information to a graphic accelerator card
US9047686B2 (en) * 2011-02-10 2015-06-02 Qualcomm Incorporated Data storage address assignment for graphics processing

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62192867A (en) * 1986-02-20 1987-08-24 Mitsubishi Electric Corp Workstation that handles image data
US5119477A (en) * 1989-10-23 1992-06-02 International Business Machines Corporation Memory manager for hierarchical graphic structures

Also Published As

Publication number Publication date
WO1993004462A1 (en) 1993-03-04

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