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AU2278688A - Distributed cache architecture - Google Patents

Distributed cache architecture

Info

Publication number
AU2278688A
AU2278688A AU22786/88A AU2278688A AU2278688A AU 2278688 A AU2278688 A AU 2278688A AU 22786/88 A AU22786/88 A AU 22786/88A AU 2278688 A AU2278688 A AU 2278688A AU 2278688 A AU2278688 A AU 2278688A
Authority
AU
Australia
Prior art keywords
distributed cache
cache architecture
architecture
distributed
cache
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU22786/88A
Inventor
Steven E. Golson
Scott I. Griffith
Joseph Murphy
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sun Microsystems Inc
Original Assignee
Sun Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sun Microsystems Inc filed Critical Sun Microsystems Inc
Publication of AU2278688A publication Critical patent/AU2278688A/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0864—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches using pseudo-associative means, e.g. set-associative or hashing

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
AU22786/88A 1988-02-16 1988-09-23 Distributed cache architecture Abandoned AU2278688A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US15738988A 1988-02-16 1988-02-16
US157389 1988-02-16

Publications (1)

Publication Number Publication Date
AU2278688A true AU2278688A (en) 1989-08-17

Family

ID=22563521

Family Applications (1)

Application Number Title Priority Date Filing Date
AU22786/88A Abandoned AU2278688A (en) 1988-02-16 1988-09-23 Distributed cache architecture

Country Status (5)

Country Link
JP (1) JPH01229345A (en)
AU (1) AU2278688A (en)
DE (1) DE3903066A1 (en)
FR (1) FR2627298A1 (en)
GB (1) GB2215099A (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2938511B2 (en) * 1990-03-30 1999-08-23 三菱電機株式会社 Semiconductor storage device
US5404484A (en) * 1992-09-16 1995-04-04 Hewlett-Packard Company Cache system for reducing memory latency times
JP4656565B2 (en) * 1999-01-21 2011-03-23 株式会社ソニー・コンピュータエンタテインメント High speed processor system, method and recording medium using the same
US6578110B1 (en) 1999-01-21 2003-06-10 Sony Computer Entertainment, Inc. High-speed processor system and cache memories with processing capabilities
DE10151733A1 (en) * 2001-10-19 2003-04-30 Infineon Technologies Ag Processor Memory System

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4056845A (en) * 1975-04-25 1977-11-01 Data General Corporation Memory access technique
EP0019358B1 (en) * 1979-05-09 1984-07-11 International Computers Limited Hierarchical data storage system
CA1168377A (en) * 1980-04-25 1984-05-29 Michael L. Ziegler Data processing system having a memory system which utilizes a cache memory and unique pipelining techniques for providing access thereto
US4646237A (en) * 1983-12-05 1987-02-24 Ncr Corporation Data handling system for handling data transfers between a cache memory and a main memory
US4725945A (en) * 1984-09-18 1988-02-16 International Business Machines Corp. Distributed cache in dynamic rams

Also Published As

Publication number Publication date
GB2215099A (en) 1989-09-13
DE3903066A1 (en) 1989-08-24
JPH01229345A (en) 1989-09-13
GB8822580D0 (en) 1988-11-02
FR2627298A1 (en) 1989-08-18

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