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AU2003239183A1 - Partially patterned lead frames and methods of making and using the same in semiconductor packaging - Google Patents

Partially patterned lead frames and methods of making and using the same in semiconductor packaging

Info

Publication number
AU2003239183A1
AU2003239183A1 AU2003239183A AU2003239183A AU2003239183A1 AU 2003239183 A1 AU2003239183 A1 AU 2003239183A1 AU 2003239183 A AU2003239183 A AU 2003239183A AU 2003239183 A AU2003239183 A AU 2003239183A AU 2003239183 A1 AU2003239183 A1 AU 2003239183A1
Authority
AU
Australia
Prior art keywords
making
methods
same
lead frames
semiconductor packaging
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2003239183A
Inventor
Shafidul Islam
Romarico S. San Antonio
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Interconnect Technologies Ltd
Original Assignee
Advanced Interconnect Technology Ltd
Advanced Interconnect Technologies Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US10/134,882 external-priority patent/US6812552B2/en
Priority claimed from US10/342,732 external-priority patent/US6777265B2/en
Application filed by Advanced Interconnect Technology Ltd, Advanced Interconnect Technologies Ltd filed Critical Advanced Interconnect Technology Ltd
Publication of AU2003239183A1 publication Critical patent/AU2003239183A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H10W70/40—
    • H10W70/042—
    • H10W70/048—
    • H10W70/424—
    • H10W72/00—
    • H10W74/014—
    • H10W74/129—
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45147—Copper (Cu) as principal constituent
    • H10W72/01225—
    • H10W72/0198—
    • H10W72/073—
    • H10W72/075—
    • H10W72/07533—
    • H10W72/252—
    • H10W72/534—
    • H10W72/5449—
    • H10W72/5524—
    • H10W72/884—
    • H10W74/00—
    • H10W74/127—
    • H10W90/726—
    • H10W90/736—
    • H10W90/756—
AU2003239183A 2002-04-29 2003-04-28 Partially patterned lead frames and methods of making and using the same in semiconductor packaging Abandoned AU2003239183A1 (en)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US10/134,882 2002-04-29
US10/134,882 US6812552B2 (en) 2002-04-29 2002-04-29 Partially patterned lead frames and methods of making and using the same in semiconductor packaging
US10/342,732 2003-01-15
US10/342,732 US6777265B2 (en) 2002-04-29 2003-01-15 Partially patterned lead frames and methods of making and using the same in semiconductor packaging
PCT/US2003/013046 WO2003103038A1 (en) 2002-04-29 2003-04-28 Partially patterned lead frames and methods of making and using the same in semiconductor packaging

Publications (1)

Publication Number Publication Date
AU2003239183A1 true AU2003239183A1 (en) 2003-12-19

Family

ID=29714650

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2003239183A Abandoned AU2003239183A1 (en) 2002-04-29 2003-04-28 Partially patterned lead frames and methods of making and using the same in semiconductor packaging

Country Status (7)

Country Link
EP (1) EP1500130A1 (en)
JP (1) JP2005531137A (en)
KR (1) KR100789348B1 (en)
CN (1) CN100380614C (en)
AU (1) AU2003239183A1 (en)
TW (1) TWI239054B (en)
WO (1) WO2003103038A1 (en)

Families Citing this family (34)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6777265B2 (en) * 2002-04-29 2004-08-17 Advanced Interconnect Technologies Limited Partially patterned lead frames and methods of making and using the same in semiconductor packaging
US6812552B2 (en) 2002-04-29 2004-11-02 Advanced Interconnect Technologies Limited Partially patterned lead frames and methods of making and using the same in semiconductor packaging
US7799611B2 (en) 2002-04-29 2010-09-21 Unisem (Mauritius) Holdings Limited Partially patterned lead frames and methods of making and using the same in semiconductor packaging
US8236612B2 (en) 2002-04-29 2012-08-07 Unisem (Mauritius) Holdings Limited Partially patterned lead frames and methods of making and using the same in semiconductor packaging
US20040058478A1 (en) 2002-09-25 2004-03-25 Shafidul Islam Taped lead frames and methods of making and using the same in semiconductor packaging
JP4522167B2 (en) * 2004-06-30 2010-08-11 三洋電機株式会社 Semiconductor device and manufacturing method thereof
CN100578766C (en) * 2006-08-29 2010-01-06 日月光半导体制造股份有限公司 Manufacturing method of chip package structure
WO2008057770A2 (en) 2006-10-27 2008-05-15 Unisem (Mauritius) Holdings Limited Partially patterned lead frames and methods of making and using the same in semiconductor packaging
US8097945B2 (en) * 2007-11-21 2012-01-17 Lynda Harnden, legal representative Bi-directional, reverse blocking battery switch
JP5224845B2 (en) * 2008-02-18 2013-07-03 新光電気工業株式会社 Semiconductor device manufacturing method and semiconductor device
US9899349B2 (en) 2009-01-29 2018-02-20 Semiconductor Components Industries, Llc Semiconductor packages and related methods
US8071427B2 (en) * 2009-01-29 2011-12-06 Semiconductor Components Industries, Llc Method for manufacturing a semiconductor component and structure therefor
US10199311B2 (en) 2009-01-29 2019-02-05 Semiconductor Components Industries, Llc Leadless semiconductor packages, leadframes therefor, and methods of making
US10163766B2 (en) 2016-11-21 2018-12-25 Semiconductor Components Industries, Llc Methods of forming leadless semiconductor packages with plated leadframes and wettable flanks
JP5215980B2 (en) * 2009-10-30 2013-06-19 株式会社三井ハイテック Manufacturing method of semiconductor device
CN104658923B (en) * 2010-09-01 2018-08-14 群成科技股份有限公司 Quad flat non-leaded package method and structure manufactured by same
DE102011004544B4 (en) * 2011-02-22 2013-06-13 Semikron Elektronik Gmbh & Co. Kg circuitry
KR101234141B1 (en) * 2011-03-23 2013-02-22 엘지이노텍 주식회사 Structure for multi-row lead frame and semiconductor package thereof and manufacture method thereof
US9287191B2 (en) 2011-10-12 2016-03-15 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device package and method
US8866274B2 (en) * 2012-03-27 2014-10-21 Infineon Technologies Ag Semiconductor packages and methods of formation thereof
JP5990438B2 (en) * 2012-09-13 2016-09-14 ルネサスエレクトロニクス株式会社 Manufacturing method of semiconductor device
KR101411894B1 (en) 2012-10-23 2014-06-25 주식회사 엠디티 Method of Manufacturing Electric Device-Package Unit and Package Set Assembly
CN103745957A (en) * 2013-11-06 2014-04-23 华天科技（西安）有限公司 AAQFN packaging part capable of enhancing heat radiation and technology for manufacture same AAQFN packaging part
US9287238B2 (en) * 2013-12-02 2016-03-15 Infineon Technologies Ag Leadless semiconductor package with optical inspection feature
US9449876B2 (en) * 2014-01-17 2016-09-20 Infineon Technologies Ag Singulation of semiconductor dies with contact metallization by electrical discharge machining
US9401287B2 (en) * 2014-02-07 2016-07-26 Altera Corporation Methods for packaging integrated circuits
US9252063B2 (en) * 2014-07-07 2016-02-02 Infineon Technologies Ag Extended contact area for leadframe strip testing
US9219025B1 (en) * 2014-08-15 2015-12-22 Infineon Technologies Ag Molded flip-clip semiconductor package
CN105118787A (en) * 2015-04-22 2015-12-02 丽智电子(昆山)有限公司 Product processing technology employing laser copper baking
CN109586680B (en) * 2017-09-29 2021-09-03 安华高科技股份有限公司 Anchored polymer encapsulation for acoustic resonator structures
CN109900634B (en) * 2019-02-26 2021-07-30 四川立泰电子有限公司 Reliability monitoring method for lead bonding process
JP7800022B2 (en) * 2021-08-27 2026-01-16 富士電機株式会社 Semiconductor Devices
CN114782430B (en) * 2022-06-20 2022-08-23 新恒汇电子股份有限公司 Counting system based on etched metal lead frame and counting method thereof
CN115132692B (en) * 2022-08-31 2023-01-17 宁波德洲精密电子有限公司 A kind of lead frame and its production device

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5656550A (en) * 1994-08-24 1997-08-12 Fujitsu Limited Method of producing a semicondutor device having a lead portion with outer connecting terminal
US5847458A (en) * 1996-05-21 1998-12-08 Shinko Electric Industries Co., Ltd. Semiconductor package and device having heads coupled with insulating material
JPH11195742A (en) * 1998-01-05 1999-07-21 Matsushita Electron Corp Semiconductor device, method of manufacturing the same, and lead frame used therefor
JP3436159B2 (en) * 1998-11-11 2003-08-11 松下電器産業株式会社 Method for manufacturing resin-encapsulated semiconductor device
US6238952B1 (en) * 2000-02-29 2001-05-29 Advanced Semiconductor Engineering, Inc. Low-pin-count chip package and manufacturing method thereof

Also Published As

Publication number Publication date
KR100789348B1 (en) 2007-12-28
CN1650410A (en) 2005-08-03
JP2005531137A (en) 2005-10-13
KR20050007350A (en) 2005-01-17
TW200405480A (en) 2004-04-01
CN100380614C (en) 2008-04-09
EP1500130A1 (en) 2005-01-26
TWI239054B (en) 2005-09-01
WO2003103038A1 (en) 2003-12-11

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase