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AU2002364182A1 - Methods and apparatus for encoding ldpc codes - Google Patents

Methods and apparatus for encoding ldpc codes

Info

Publication number
AU2002364182A1
AU2002364182A1 AU2002364182A AU2002364182A AU2002364182A1 AU 2002364182 A1 AU2002364182 A1 AU 2002364182A1 AU 2002364182 A AU2002364182 A AU 2002364182A AU 2002364182 A AU2002364182 A AU 2002364182A AU 2002364182 A1 AU2002364182 A1 AU 2002364182A1
Authority
AU
Australia
Prior art keywords
methods
ldpc codes
encoding ldpc
encoding
codes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2002364182A
Inventor
Hui Jin
Vladimir Novichkov
Tom Richardson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qualcomm Flarion Technologies Inc
Original Assignee
Flarion Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Flarion Technologies Inc filed Critical Flarion Technologies Inc
Publication of AU2002364182A1 publication Critical patent/AU2002364182A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6561—Parallelized implementations
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
    • H03M13/1182—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the structure of the parity-check matrix is obtained by reordering of a random parity-check matrix
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105—Decoding
    • H03M13/1131—Scheduling of bit node or check node processing
    • H03M13/1137—Partly parallel processing, i.e. sub-blocks or sub-groups of nodes being processed in parallel

Landscapes

  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Correction Of Errors (AREA)
AU2002364182A 2002-08-20 2002-12-18 Methods and apparatus for encoding ldpc codes Abandoned AU2002364182A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US40481002P 2002-08-20 2002-08-20
US60/404,810 2002-08-20
PCT/US2002/040573 WO2004019268A1 (en) 2002-08-20 2002-12-18 Methods and apparatus for encoding ldpc codes

Publications (1)

Publication Number Publication Date
AU2002364182A1 true AU2002364182A1 (en) 2004-03-11

Family

ID=31946766

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2002364182A Abandoned AU2002364182A1 (en) 2002-08-20 2002-12-18 Methods and apparatus for encoding ldpc codes

Country Status (3)

Country Link
AU (1) AU2002364182A1 (en)
CA (1) CA2536259C (en)
WO (1) WO2004019268A1 (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ES2282671T3 (en) 2002-07-03 2007-10-16 The Directv Group, Inc. CODIFICATION OF LOW DENSITY PARITY CHECK CODES (LDPC) USING A STRUCTURED PARITY CHECK MATRIX.
US7577207B2 (en) 2002-07-03 2009-08-18 Dtvg Licensing, Inc. Bit labeling for amplitude phase shift constellation used with low density parity check (LDPC) codes
US7020829B2 (en) 2002-07-03 2006-03-28 Hughes Electronics Corporation Method and system for decoding low density parity check (LDPC) codes
US20040019845A1 (en) 2002-07-26 2004-01-29 Hughes Electronics Method and system for generating low density parity check codes
US7864869B2 (en) 2002-07-26 2011-01-04 Dtvg Licensing, Inc. Satellite communication system utilizing low density parity check codes
CA2559818C (en) 2004-04-28 2011-11-29 Samsung Electronics Co., Ltd. Apparatus and method for coding/decoding block low density parity check code with variable block length
KR20050118056A (en) * 2004-05-12 2005-12-15 삼성전자주식회사 Method and apparatus for channel encoding and decoding in mobile communication systems using multi-rate block ldpc codes
US7581157B2 (en) 2004-06-24 2009-08-25 Lg Electronics Inc. Method and apparatus of encoding and decoding data using low density parity check code in a wireless communication system
US7346832B2 (en) 2004-07-21 2008-03-18 Qualcomm Incorporated LDPC encoding methods and apparatus
US7143333B2 (en) * 2004-08-09 2006-11-28 Motorola, Inc. Method and apparatus for encoding and decoding data
US7188297B2 (en) * 2004-08-12 2007-03-06 Motorola, Inc. Method and apparatus for encoding and decoding data
CA2577291C (en) * 2004-08-13 2015-05-19 The Directv Group, Inc. Code design and implementation improvements for low density parity check codes for multiple-input multiple-output channels
CN101341659B (en) 2004-08-13 2012-12-12 Dtvg许可公司 Code design and implementation improvements for low density parity check codes for multiple-input multiple-output channels
EP1800405B1 (en) * 2004-09-17 2014-03-12 LG Electronics Inc. Encoding and decoding of ldpc codes using structured parity check matrices
EP1800406A2 (en) 2004-09-17 2007-06-27 LG Electronics Inc. Method of encoding and decoding using ldpc code and apparatus thereof
KR101065693B1 (en) * 2004-09-17 2011-09-19 엘지전자 주식회사 An encoding, decoding method using an LDPC code, and an LDPC code generation method for encoding or decoding
CN100583651C (en) 2004-12-22 2010-01-20 Lg电子株式会社 Apparatus and method for decoding using channel codes
US8010870B2 (en) 2005-04-25 2011-08-30 Sony Corporation Coding apparatus and coding method
US20070198905A1 (en) * 2006-02-03 2007-08-23 Nokia Corporation Transmitter for a communications network
CN101796488A (en) 2007-07-02 2010-08-04 技术源于创意有限公司 Generation of parity-check matrices
US8612823B2 (en) 2008-10-17 2013-12-17 Intel Corporation Encoding of LDPC codes using sub-matrices of a low density parity check matrix
US8375278B2 (en) 2009-07-21 2013-02-12 Ramot At Tel Aviv University Ltd. Compact decoding of punctured block codes
US9397699B2 (en) 2009-07-21 2016-07-19 Ramot At Tel Aviv University Ltd. Compact decoding of punctured codes
US8516352B2 (en) 2009-07-21 2013-08-20 Ramot At Tel Aviv University Ltd. Compact decoding of punctured block codes
US8516351B2 (en) 2009-07-21 2013-08-20 Ramot At Tel Aviv University Ltd. Compact decoding of punctured block codes
US8683296B2 (en) 2011-12-30 2014-03-25 Streamscale, Inc. Accelerated erasure coding system and method
US8914706B2 (en) 2011-12-30 2014-12-16 Streamscale, Inc. Using parity data for concurrent data authentication, correction, compression, and encryption
US9203434B1 (en) 2012-03-09 2015-12-01 Western Digital Technologies, Inc. Systems and methods for improved encoding of data in data storage devices
CN104488196B (en) * 2012-11-05 2017-08-01 三菱电机株式会社 Error correction/encoding method and encoder for correcting

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6438180B1 (en) * 1997-05-09 2002-08-20 Carnegie Mellon University Soft and hard sequence detection in ISI memory channels
US6163870A (en) * 1997-11-06 2000-12-19 Compaq Computer Corporation Message encoding with irregular graphing
US6195777B1 (en) * 1997-11-06 2001-02-27 Compaq Computer Corporation Loss resilient code with double heavy tailed series of redundant layers
US6081918A (en) * 1997-11-06 2000-06-27 Spielman; Daniel A. Loss resilient code with cascading series of redundant layers
US6081909A (en) * 1997-11-06 2000-06-27 Digital Equipment Corporation Irregularly graphed encoding technique
US6073250A (en) * 1997-11-06 2000-06-06 Luby; Michael G. Loss resilient decoding technique

Also Published As

Publication number Publication date
WO2004019268A1 (en) 2004-03-04
CA2536259A1 (en) 2004-03-04
CA2536259C (en) 2011-05-24

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase