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AU2002358757A1 - Carry-skip adder for encoded data - Google Patents

Carry-skip adder for encoded data

Info

Publication number
AU2002358757A1
AU2002358757A1 AU2002358757A AU2002358757A AU2002358757A1 AU 2002358757 A1 AU2002358757 A1 AU 2002358757A1 AU 2002358757 A AU2002358757 A AU 2002358757A AU 2002358757 A AU2002358757 A AU 2002358757A AU 2002358757 A1 AU2002358757 A1 AU 2002358757A1
Authority
AU
Australia
Prior art keywords
carry
encoded data
skip adder
skip
adder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2002358757A
Inventor
Berndt Gammel
Franz Klug
Oliver Kniffler
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Publication of AU2002358757A1 publication Critical patent/AU2002358757A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50Adding; Subtracting
    • G06F7/505Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination
    • G06F7/506Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination with simultaneous carry generation for, or propagation over, two or more stages
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/72Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in cryptographic circuits
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/72Indexing scheme relating to groups G06F7/72 - G06F7/729
    • G06F2207/7219Countermeasures against side channel or fault attacks
    • G06F2207/7223Randomisation as countermeasure against side channel attacks
    • G06F2207/7233Masking, e.g. (A**e)+r mod n
    • G06F2207/7238Operand masking, i.e. message blinding, e.g. (A+r)**e mod n; k.(P+R)

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Mathematical Optimization (AREA)
  • Mathematical Physics (AREA)
  • Computer Security & Cryptography (AREA)
  • Software Systems (AREA)
  • Storage Device Security (AREA)
AU2002358757A 2002-01-16 2002-12-18 Carry-skip adder for encoded data Abandoned AU2002358757A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE10201450.7 2002-01-16
DE2002101450 DE10201450B4 (en) 2002-01-16 2002-01-16 Carry-skip adder for encrypted data
PCT/EP2002/014491 WO2003060672A1 (en) 2002-01-16 2002-12-18 Carry-skip adder for encoded data

Publications (1)

Publication Number Publication Date
AU2002358757A1 true AU2002358757A1 (en) 2003-07-30

Family

ID=7712275

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2002358757A Abandoned AU2002358757A1 (en) 2002-01-16 2002-12-18 Carry-skip adder for encoded data

Country Status (3)

Country Link
AU (1) AU2002358757A1 (en)
DE (1) DE10201450B4 (en)
WO (1) WO2003060672A1 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA3020290A1 (en) 2008-06-25 2009-12-30 Esbatech, An Alcon Biomedical Research Unit Llc Stable and soluble antibodies inhibiting vegf
DE102015116049B3 (en) 2015-09-23 2017-02-16 Infineon Technologies Ag ZERO DETECTION CIRCUIT AND MASKED BOOLECH OR CIRCUIT
US20220244912A1 (en) * 2021-02-02 2022-08-04 Efinix, Inc. Dynamic block size carry-skip adder construction on fpgas by combining ripple carry adders with routable propagate/generate signals

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5214704A (en) * 1989-10-04 1993-05-25 Teledyne Industries, Inc. Nonlinear dynamic substitution devices and methods for block substitutions
US5337269A (en) * 1993-03-05 1994-08-09 Cyrix Corporation Carry skip adder with independent carry-in and carry skip paths
BR0015907A (en) * 1999-12-02 2002-08-06 Infineon Technologies Ag Microprocessor array with coding
DE50003679D1 (en) * 2000-01-18 2003-10-16 Infineon Technologies Ag MICROPROCESSOR ARRANGEMENT WITH ENCRYPTION

Also Published As

Publication number Publication date
DE10201450A1 (en) 2003-07-31
DE10201450B4 (en) 2004-09-02
WO2003060672A1 (en) 2003-07-24

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase