AU2002240974A1 - Xdsl-to-pci controller - Google Patents

Xdsl-to-pci controller

Info

Publication number: AU2002240974A1
Authority: AU; Australia
Prior art keywords: xdsl; pci controller; pci; controller
Prior art date: 2002-03-14
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Abandoned

Application number

AU2002240974A

Inventor

Vesa Rantamaki

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

VDSL Systems Oy

Original Assignee

VDSL Systems Oy

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

2002-03-14

Filing date

2002-03-14

Publication date

2003-09-22

2002-03-14 Application filed by VDSL Systems Oy filed Critical VDSL Systems Oy

2003-09-22 Publication of AU2002240974A1 publication Critical patent/AU2002240974A1/en

Status Abandoned legal-status Critical Current

Classifications

- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
- G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/382—Information transfer, e.g. on bus using universal interface adapter
- G06F13/387—Information transfer, e.g. on bus using universal interface adapter for adaptation of different data processing systems to different peripheral devices, e.g. protocol converters for incompatible systems, open system
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0024—Peripheral component interconnect [PCI]

Landscapes

Engineering & Computer Science (AREA)
Theoretical Computer Science (AREA)
Physics & Mathematics (AREA)
General Engineering & Computer Science (AREA)
General Physics & Mathematics (AREA)
Bus Control (AREA)

AU2002240974A 2002-03-14 2002-03-14 Xdsl-to-pci controller Abandoned AU2002240974A1 (en)

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
PCT/FI2002/000207 WO2003077137A1 (en)	2002-03-14	2002-03-14	Xdsl-to-pci controller

Publications (1)

Publication Number	Publication Date
AU2002240974A1 true AU2002240974A1 (en)	2003-09-22

Family

ID=27799038

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
AU2002240974A Abandoned AU2002240974A1 (en)	2002-03-14	2002-03-14	Xdsl-to-pci controller

Country Status (2)

Country	Link
AU (1)	AU2002240974A1 (en)
WO (1)	WO2003077137A1 (en)

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US5297242A (en) *	1989-12-15	1994-03-22	Nec Corporation	DMA controller performing data transfer by 2-bus cycle transfer manner
US6292873B1 (en) *	1998-05-22	2001-09-18	Hewlett-Packard Company	Dual-ported electronic random access memory that does not introduce additional wait states and that does not cause retransmission of data during shared access
US6341328B1 (en) *	1999-04-20	2002-01-22	Lucent Technologies, Inc.	Method and apparatus for using multiple co-dependent DMA controllers to provide a single set of read and write commands
DE69931160T2 (en) *	1999-10-08	2006-09-28	Hewlett-Packard Development Co., L.P., Houston	Device for processing SONET or SDH frames on a PCI bus

2002
- 2002-03-14 WO PCT/FI2002/000207 patent/WO2003077137A1/en not_active Ceased
- 2002-03-14 AU AU2002240974A patent/AU2002240974A1/en not_active Abandoned

Also Published As

Publication number	Publication date
WO2003077137A1 (en)	2003-09-18

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Legal Events

Date	Code	Title	Description
2004-12-02	MK6	Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase