AU2001238593A1 - Switching system and method having low, deterministic latency - Google Patents
Switching system and method having low, deterministic latencyInfo
- Publication number
- AU2001238593A1 AU2001238593A1 AU2001238593A AU3859301A AU2001238593A1 AU 2001238593 A1 AU2001238593 A1 AU 2001238593A1 AU 2001238593 A AU2001238593 A AU 2001238593A AU 3859301 A AU3859301 A AU 3859301A AU 2001238593 A1 AU2001238593 A1 AU 2001238593A1
- Authority
- AU
- Australia
- Prior art keywords
- packet
- circuit
- information
- tdm
- fabric
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
- 238000000034 method Methods 0.000 title abstract 2
- 239000004744 fabric Substances 0.000 abstract 4
- 230000006978 adaptation Effects 0.000 abstract 2
- 239000000284 extract Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/30—Peripheral units, e.g. input or output ports
- H04L49/3081—ATM peripheral units, e.g. policing, insertion or extraction
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/25—Routing or path finding in a switch fabric
- H04L49/253—Routing or path finding in a switch fabric using establishment or release of connections between ports
- H04L49/254—Centralised controller, i.e. arbitration or scheduling
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/25—Routing or path finding in a switch fabric
- H04L49/253—Routing or path finding in a switch fabric using establishment or release of connections between ports
- H04L49/255—Control mechanisms for ATM switching fabrics
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/30—Peripheral units, e.g. input or output ports
- H04L49/3009—Header conversion, routing tables or routing tags
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q11/00—Selecting arrangements for multiplex systems
- H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
- H04Q11/0428—Integrated services digital network, i.e. systems for transmission of different types of digitised signals, e.g. speech, data, telecentral, television signals
- H04Q11/0478—Provisions for broadband connections
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J2203/00—Aspects of optical multiplex systems other than those covered by H04J14/05 and H04J14/07
- H04J2203/0001—Provisions for broadband connections in integrated services digital network using frames of the Optical Transport Network [OTN] or using synchronous transfer mode [STM], e.g. SONET, SDH
- H04J2203/0089—Multiplexing, e.g. coding, scrambling, SONET
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
- H04L12/5601—Transfer mode dependent, e.g. ATM
- H04L2012/5638—Services, e.g. multimedia, GOS, QOS
- H04L2012/5646—Cell characteristics, e.g. loss, delay, jitter, sequence integrity
- H04L2012/5652—Cell construction, e.g. including header, packetisation, depacketisation, assembly, reassembly
- H04L2012/566—Cell construction, e.g. including header, packetisation, depacketisation, assembly, reassembly using the ATM layer
- H04L2012/5661—Minicells
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
- H04L12/5601—Transfer mode dependent, e.g. ATM
- H04L2012/5678—Traffic aspects, e.g. arbitration, load balancing, smoothing, buffer management
- H04L2012/5679—Arbitration or scheduling
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
- H04L12/5601—Transfer mode dependent, e.g. ATM
- H04L2012/5678—Traffic aspects, e.g. arbitration, load balancing, smoothing, buffer management
- H04L2012/5681—Buffer or queue management
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/50—Overload detection or protection within a single switching element
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
- Stereo-Broadcasting Methods (AREA)
- Train Traffic Observation, Control, And Security (AREA)
- Radio Transmission System (AREA)
- Mobile Radio Communication Systems (AREA)
- Electrotherapy Devices (AREA)
Abstract
A system and method of switching information in a time division multiplexed (TDM) communications network are described. The TDM time slots correspond to channels of circuit information. A circuit interface receives information from the TDM communication network, extracts circuit data therefrom, and provides the extracted circuit data on an internal bus. It also receives circuit data from an internal bus and transmits the data received from the internal bus on to the TDM communications network. A switching fabric receives packets having a header and a payload in which the header includes information identifying a destination for the packet and in which the fabric transmits a received packet in accordance with the destination identification in the packet header. Adaptation logic, in response to the circuit interface, packs information from multiple circuits into a payload of a packet and schedules the delivery of such a packet to the fabric. The adaptation logic receives packets from the switching fabric; and merges circuit data from multiple packets onto an identified channel.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US18501100P | 2000-02-25 | 2000-02-25 | |
| US60185011 | 2000-02-25 | ||
| PCT/US2001/005519 WO2001063859A1 (en) | 2000-02-25 | 2001-02-22 | Switching system and method having low, deterministic latency |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| AU2001238593A1 true AU2001238593A1 (en) | 2001-09-03 |
Family
ID=22679186
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AU2001238593A Abandoned AU2001238593A1 (en) | 2000-02-25 | 2001-02-22 | Switching system and method having low, deterministic latency |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US7436815B2 (en) |
| EP (1) | EP1258116B1 (en) |
| AT (1) | ATE347218T1 (en) |
| AU (1) | AU2001238593A1 (en) |
| DE (1) | DE60124869T2 (en) |
| WO (1) | WO2001063859A1 (en) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| AU2001238593A1 (en) * | 2000-02-25 | 2001-09-03 | Telica, Inc. | Switching system and method having low, deterministic latency |
| RU2273965C2 (en) * | 2001-04-30 | 2006-04-10 | Хуавей Текнолоджиз Ко., Лтд. | Method for transferring data along circuit of connecting panel with multiplexing with time separation and a bridge connector |
| US8477616B1 (en) * | 2001-06-05 | 2013-07-02 | Avaya Inc. | Method for achieving high-availability of itineraries in a real-time network scheduled packet routing system |
| CA2461320C (en) | 2001-10-05 | 2011-10-25 | Aware, Inc. | Systems and methods for multi-pair atm over dsl |
| NO20016372D0 (en) * | 2001-12-27 | 2001-12-27 | Ericsson Telefon Ab L M | Arrangement to reduce memory requirements in a switch |
| ATE405070T1 (en) * | 2002-04-11 | 2008-08-15 | Nxp Bv | SYNCHRONIZATION OF CELL TRANSMISSION IN A PACKET EXCHANGE |
| GB2399980A (en) * | 2003-03-26 | 2004-09-29 | Zarlink Semiconductor Ltd | Packet buffer management |
| US7535893B1 (en) * | 2003-12-05 | 2009-05-19 | Mahi Networks, Inc. | TDM services using a packet-switched fabric |
| EP2437442B1 (en) * | 2010-09-30 | 2013-02-13 | Alcatel Lucent | Device and method for switching data traffic in a digital transmission network |
| US11706152B2 (en) * | 2021-06-15 | 2023-07-18 | Pensando Systems Inc. | Methods and systems for queue and pipeline latency metrology in network devices and smart NICs |
Family Cites Families (21)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4896266A (en) * | 1987-06-03 | 1990-01-23 | Bull Hn Information Systems Inc. | Bus activity sequence controller |
| JP3262142B2 (en) | 1992-01-16 | 2002-03-04 | 富士通株式会社 | ATM cell forming apparatus, ATM cell forming method, node, and multiplexing method in node |
| JPH09508766A (en) * | 1993-12-20 | 1997-09-02 | エイ・ティ・アンド・ティ・コーポレーション | ATM (Asynchronous Transfer Mode) network for narrow band communication |
| US5513174A (en) | 1994-12-07 | 1996-04-30 | At&T Corp. | Telecommunication system with detection and control of packet collisions |
| US6118754A (en) * | 1995-05-16 | 2000-09-12 | Sony Corporation | Data recording/reproducing apparatus and method corresponding to a plurality of data formats, and data recording medium |
| US5850395A (en) | 1995-07-19 | 1998-12-15 | Fujitsu Network Communications, Inc. | Asynchronous transfer mode based service consolidation switch |
| US5805571A (en) * | 1996-03-19 | 1998-09-08 | Zwan; Bryan J. | Dynamic communication line analyzer apparatus and method |
| DE19757598A1 (en) * | 1997-12-23 | 1999-07-08 | Siemens Ag | Data exchange method in ATM exchange |
| US6754206B1 (en) * | 1997-12-04 | 2004-06-22 | Alcatel Usa Sourcing, L.P. | Distributed telecommunications switching system and method |
| US6195714B1 (en) * | 1998-06-08 | 2001-02-27 | Nortel Networks Limited | System for transferring STM calls through ATM network by converting the STM calls to ATM and vice versa at the edge nodes of ATM network |
| US6519261B1 (en) * | 1999-07-02 | 2003-02-11 | Nortel Networks Limited | Asynchronous transfer mode adaptation arrangements |
| US6628657B1 (en) * | 1999-12-01 | 2003-09-30 | Cisco Technology, Inc. | Method and system for transporting synchronous and asynchronous traffic on a bus of a telecommunications node |
| US6760327B1 (en) * | 1999-12-01 | 2004-07-06 | Cisco Technology, Inc. | Rate adjustable backplane and method for a telecommunications node |
| AU2001238593A1 (en) * | 2000-02-25 | 2001-09-03 | Telica, Inc. | Switching system and method having low, deterministic latency |
| US6735170B1 (en) * | 2000-03-31 | 2004-05-11 | Nortel Networks Limited | Method and system for establishing content-flexible connections in a communications network |
| US6801548B1 (en) * | 2000-06-15 | 2004-10-05 | Cisco Technology, Inc. | Channel ordering for communication signals split for matrix switching |
| US6665495B1 (en) * | 2000-10-27 | 2003-12-16 | Yotta Networks, Inc. | Non-blocking, scalable optical router architecture and method for routing optical traffic |
| US6636515B1 (en) * | 2000-11-21 | 2003-10-21 | Transwitch Corporation | Method for switching ATM, TDM, and packet data through a single communications switch |
| US6646983B1 (en) * | 2000-11-21 | 2003-11-11 | Transwitch Corporation | Network switch which supports TDM, ATM, and variable length packet traffic and includes automatic fault/congestion correction |
| US6631130B1 (en) * | 2000-11-21 | 2003-10-07 | Transwitch Corporation | Method and apparatus for switching ATM, TDM, and packet data through a single communications switch while maintaining TDM timing |
| TW589825B (en) * | 2001-07-02 | 2004-06-01 | Globespan Virata Corp | Communications system using rings architecture |
-
2001
- 2001-02-22 AU AU2001238593A patent/AU2001238593A1/en not_active Abandoned
- 2001-02-22 DE DE60124869T patent/DE60124869T2/en not_active Expired - Lifetime
- 2001-02-22 US US09/790,820 patent/US7436815B2/en not_active Expired - Fee Related
- 2001-02-22 EP EP01911052A patent/EP1258116B1/en not_active Expired - Lifetime
- 2001-02-22 WO PCT/US2001/005519 patent/WO2001063859A1/en not_active Ceased
- 2001-02-22 AT AT01911052T patent/ATE347218T1/en not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| WO2001063859A1 (en) | 2001-08-30 |
| ATE347218T1 (en) | 2006-12-15 |
| US7436815B2 (en) | 2008-10-14 |
| US20010033572A1 (en) | 2001-10-25 |
| EP1258116A1 (en) | 2002-11-20 |
| DE60124869T2 (en) | 2007-05-16 |
| EP1258116B1 (en) | 2006-11-29 |
| DE60124869D1 (en) | 2007-01-11 |
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