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AU2001230988A1 - Programmable array logic circuit employing non-volatile ferromagnetic memory cells - Google Patents

Programmable array logic circuit employing non-volatile ferromagnetic memory cells

Info

Publication number
AU2001230988A1
AU2001230988A1 AU2001230988A AU3098801A AU2001230988A1 AU 2001230988 A1 AU2001230988 A1 AU 2001230988A1 AU 2001230988 A AU2001230988 A AU 2001230988A AU 3098801 A AU3098801 A AU 3098801A AU 2001230988 A1 AU2001230988 A1 AU 2001230988A1
Authority
AU
Australia
Prior art keywords
memory cells
logic circuit
programmable array
array logic
circuit employing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001230988A
Inventor
Richard M. Lienau
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Estancia Ltd
Pageant Technologies Inc
Original Assignee
Estancia Ltd
Pageant Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Estancia Ltd, Pageant Technologies Inc filed Critical Estancia Ltd
Publication of AU2001230988A1 publication Critical patent/AU2001230988A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • H03K17/6871—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors the output circuit comprising more than one controlled field-effect transistor
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/14—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements
    • G11C11/15—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements using multiple magnetic layers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17748—Structural details of configuration resources
    • H03K19/1776—Structural details of configuration resources for memories
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17748—Structural details of configuration resources
    • H03K19/17772—Structural details of configuration resources for powering on or off
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/1778—Structural details for adapting physical parameters
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/22—Control and timing of internal memory operations
    • G11C2207/2227—Standby or low power modes

Landscapes

  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Semiconductor Memories (AREA)
  • Logic Circuits (AREA)
  • Hall/Mr Elements (AREA)
AU2001230988A 2000-01-21 2001-01-20 Programmable array logic circuit employing non-volatile ferromagnetic memory cells Abandoned AU2001230988A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US17753300P 2000-01-21 2000-01-21
US60177533 2000-01-21
PCT/US2001/001793 WO2001054280A1 (en) 2000-01-21 2001-01-20 Programmable array logic circuit employing non-volatile ferromagnetic memory cells

Publications (1)

Publication Number Publication Date
AU2001230988A1 true AU2001230988A1 (en) 2001-07-31

Family

ID=22648959

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001230988A Abandoned AU2001230988A1 (en) 2000-01-21 2001-01-20 Programmable array logic circuit employing non-volatile ferromagnetic memory cells

Country Status (3)

Country Link
US (1) US6864711B2 (en)
AU (1) AU2001230988A1 (en)
WO (1) WO2001054280A1 (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7123050B2 (en) * 2002-09-19 2006-10-17 Lienau Richard M Programmable array logic circuit employing non-volatile ferromagnetic memory cells
DE102005001938B3 (en) * 2005-01-14 2006-04-13 Siemens Ag Stable reconfigurable digital logic system has several cells with magnetic layers, whose electrical resistance is altered by magnetic field pulses and has data cells in parallel with configuration cells
US7411803B1 (en) 2006-02-27 2008-08-12 Richard Lienau Resistive coupled hall effect sensor
WO2008103197A2 (en) * 2006-11-07 2008-08-28 Richard Lienau Coil sensor memory devices and method
US8081507B2 (en) * 2008-09-25 2011-12-20 Richard Lienau Tri-state memory device and method

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4791604A (en) 1984-02-15 1988-12-13 Joseph J. Bednarz Sheet random access memory
US4845633A (en) * 1985-12-02 1989-07-04 Apple Computer Inc. System for programming graphically a programmable, asynchronous logic cell and array
US5329486A (en) * 1992-04-24 1994-07-12 Motorola, Inc. Ferromagnetic memory device
US5295097A (en) 1992-08-05 1994-03-15 Lienau Richard M Nonvolatile random access memory
US5436576A (en) * 1994-05-20 1995-07-25 Intel Corporation Switch matrices using reduced number of switching devices for signal routing
US5712578A (en) * 1995-12-27 1998-01-27 Intel Corporation PLA architecture having improved clock signal to output timing using a type-I domino and plane
US5986465A (en) * 1996-04-09 1999-11-16 Altera Corporation Programmable logic integrated circuit architecture incorporating a global shareable expander
US6157979A (en) * 1998-03-14 2000-12-05 Advanced Technology Materials, Inc. Programmable controlling device with non-volatile ferroelectric state-machines for restarting processor when power is restored with execution states retained in said non-volatile state-machines on power down
US6140139A (en) 1998-12-22 2000-10-31 Pageant Technologies, Inc. Hall effect ferromagnetic random access memory device and its method of manufacture
US6288929B1 (en) 1999-03-04 2001-09-11 Pageant Technologies, Inc. Magneto resistor sensor with differential collectors for a non-volatile random access ferromagnetic memory
US6266267B1 (en) 1999-03-04 2001-07-24 Pageant Technologies, Inc. Single conductor inductive sensor for a non-volatile random access ferromagnetic memory
US6330183B1 (en) 1999-03-04 2001-12-11 Pageant Technologies, Inc. (Micromem Technologies, Inc.) Dual conductor inductive sensor for a non-volatile random access ferromagnetic memory
US6317354B1 (en) 1999-03-04 2001-11-13 Pageant Technologies, Inc. Non-volatile random access ferromagnetic memory with single collector sensor
US6229729B1 (en) 1999-03-04 2001-05-08 Pageant Technologies, Inc. (Micromem Technologies, Inc.) Magneto resistor sensor with diode short for a non-volatile random access ferromagnetic memory
US6542000B1 (en) * 1999-07-30 2003-04-01 Iowa State University Research Foundation, Inc. Nonvolatile programmable logic devices
US6331790B1 (en) * 2000-03-10 2001-12-18 Easic Corporation Customizable and programmable cell array
DE60239588D1 (en) * 2001-12-28 2011-05-12 Fujitsu Semiconductor Ltd Programmable logic circuit with ferroelectric configuration memory

Also Published As

Publication number Publication date
US6864711B2 (en) 2005-03-08
US20030222676A1 (en) 2003-12-04
WO2001054280A1 (en) 2001-07-26

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