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AU2001296602A1 - Symbol timing recovery method for low resolution multiple amplitude signals - Google Patents

Symbol timing recovery method for low resolution multiple amplitude signals

Info

Publication number
AU2001296602A1
AU2001296602A1 AU2001296602A AU9660201A AU2001296602A1 AU 2001296602 A1 AU2001296602 A1 AU 2001296602A1 AU 2001296602 A AU2001296602 A AU 2001296602A AU 9660201 A AU9660201 A AU 9660201A AU 2001296602 A1 AU2001296602 A1 AU 2001296602A1
Authority
AU
Australia
Prior art keywords
low resolution
recovery method
symbol timing
timing recovery
amplitude signals
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001296602A
Inventor
Joseph Boccuzzi
Syang-Myau Hwang
Roopa Rao
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Cadence Design Systems Inc
Original Assignee
Cadence Design Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Cadence Design Systems Inc filed Critical Cadence Design Systems Inc
Publication of AU2001296602A1 publication Critical patent/AU2001296602A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0334—Processing of samples having at least three levels, e.g. soft decisions
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0054—Detection of the synchronisation error by features other than the received signal transition
    • H04L7/007—Detection of the synchronisation error by features other than the received signal transition detection of error based on maximum signal power, e.g. peak value, maximizing autocorrelation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Dc Digital Transmission (AREA)
  • Facsimiles In General (AREA)
AU2001296602A 2000-10-06 2001-10-04 Symbol timing recovery method for low resolution multiple amplitude signals Abandoned AU2001296602A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/680,909 2000-10-06
US09/680,909 US6731697B1 (en) 2000-10-06 2000-10-06 Symbol timing recovery method for low resolution multiple amplitude signals
PCT/US2001/031128 WO2002030035A1 (en) 2000-10-06 2001-10-04 Symbol timing recovery method for low resolution multiple amplitude signals

Publications (1)

Publication Number Publication Date
AU2001296602A1 true AU2001296602A1 (en) 2002-04-15

Family

ID=24733016

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001296602A Abandoned AU2001296602A1 (en) 2000-10-06 2001-10-04 Symbol timing recovery method for low resolution multiple amplitude signals

Country Status (4)

Country Link
US (1) US6731697B1 (en)
AU (1) AU2001296602A1 (en)
TW (1) TW518847B (en)
WO (1) WO2002030035A1 (en)

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US7082484B2 (en) * 2001-01-16 2006-07-25 International Business Machines Corporation Architecture for advanced serial link between two cards
US20030061564A1 (en) * 2001-09-27 2003-03-27 Maddux John T. Serial data extraction using two cycles of edge information
EP1453238A1 (en) 2003-02-25 2004-09-01 CoreOptics, Inc., c/o The Corporation Trust Center Self-timing method for adjustment of a sampling phase in an oversampling receiver and circuit
EP1494413A1 (en) 2003-07-02 2005-01-05 CoreOptics, Inc., c/o The Corporation Trust Center Channel estimation and sequence estimation for the reception of optical signal
US7450655B2 (en) * 2003-07-22 2008-11-11 Intel Corporation Timing error detection for a digital receiver
TWI230514B (en) * 2003-10-29 2005-04-01 Spirox Corp Built-in self-test (BIST) apparatus and method for analog-to-digital converter (ADC)
JP2006166005A (en) * 2004-12-07 2006-06-22 Furuno Electric Co Ltd Multi-value qam symbol timing detection circuit and multi-value qam communication signal receiver
TWI294236B (en) * 2005-06-16 2008-03-01 Realtek Semiconductor Corp Method and apparatus for correcting symbol timing
CN101283560B (en) * 2005-09-19 2011-01-26 Nxp股份有限公司 Data communication circuit with equalization control
WO2008077411A2 (en) * 2006-12-22 2008-07-03 The Tc Group A/S Method of extracting data from a serial data stream
EP1956744A1 (en) 2007-02-12 2008-08-13 CoreOptics, Inc., c/o The Corporation Trust Center Tail extrapolator and method
EP2086157B1 (en) * 2008-01-30 2012-09-26 Nokia Siemens Networks Oy Method and device for processing data and communication system comprising such device
GB0806157D0 (en) * 2008-04-04 2008-05-14 Nxp Bv Improved clock recovery of serial data signal
EP2252003A1 (en) 2009-05-12 2010-11-17 CoreOptics Inc. Phase detection method and phase detector
US8761325B2 (en) 2010-06-28 2014-06-24 Ben WILLCOCKS Digital receivers
GB2481593B (en) * 2010-06-28 2016-12-28 Phyworks Ltd Digital receivers
EP2405577B1 (en) 2010-07-06 2019-04-24 Cisco Technology, Inc. Phase detection method and circuit
GB2488180A (en) 2011-02-21 2012-08-22 Thales Holdings Uk Plc Recovering a clock signal by combining a plurality of measurements at a plurality of samples and selecting a sample as a clock sample
US9020085B1 (en) 2013-03-14 2015-04-28 Pmc-Sierra Us, Inc. Method and apparatus for sampling point optimization
JP6273697B2 (en) * 2013-06-19 2018-02-07 富士通株式会社 Reception circuit and reception method
US9231751B1 (en) * 2014-09-18 2016-01-05 Realtek Semiconductor Corporation Clock-data recovery circuit and method thereof
US9762379B2 (en) * 2016-02-08 2017-09-12 Alcatel-Lucent Usa Inc. Clock recovery for an optical receiver
US10469176B2 (en) * 2017-07-07 2019-11-05 Inphi Corporation Histogram based optimization for optical modulation
FR3107151B1 (en) * 2020-02-06 2022-12-16 Sigfox Symbol time recovery method by a receiver device

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0624348B2 (en) 1988-05-24 1994-03-30 日本電気株式会社 Synchronization detection method in error correction apparatus, apparatus therefor, and synchronization method using the apparatus
US4941155A (en) * 1989-11-16 1990-07-10 Bell Communications Research, Inc. Method and circuitry for symbol timing and frequency offset estimation in time division multiple access radio systems
US5418789A (en) * 1992-10-14 1995-05-23 International Business Machines Corporation Fast communication link bit error rate estimator
US5511099A (en) * 1994-03-30 1996-04-23 Samsung Electronics Co., Ltd. Passband sync block recovery
JP3575883B2 (en) * 1995-09-18 2004-10-13 三菱電機株式会社 Digital demodulator
KR0178750B1 (en) 1996-02-13 1999-05-15 김광호 All-digital symbol timing recovery device
FR2748878B1 (en) * 1996-05-14 1998-06-26 Alcatel Telspace SYSTEM FOR DETECTING THE PRESENCE OF A WAVE CARRIER OF A DIGITAL SIGNAL AND RECEIVER COMPRISING SUCH A SYSTEM
US5966188A (en) * 1996-12-26 1999-10-12 Samsung Electronics Co., Ltd. Decimation of baseband DTV signals prior to channel equalization in digital television signal receivers
KR100250072B1 (en) * 1997-11-20 2000-03-15 선우명훈 Timing recovery circuit of digital communication receiver and its timing recovery method
US6128357A (en) * 1997-12-24 2000-10-03 Mitsubishi Electric Information Technology Center America, Inc (Ita) Data receiver having variable rate symbol timing recovery with non-synchronized sampling
US6154510A (en) 1999-05-03 2000-11-28 Sicom, Inc. Symbol timing recovery based on adjusted, phase-selected magnitude values

Also Published As

Publication number Publication date
WO2002030035A1 (en) 2002-04-11
US6731697B1 (en) 2004-05-04
WO2002030035A9 (en) 2003-02-20
TW518847B (en) 2003-01-21

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