AU2001296465A1 - System and method for insertion of prefetch instructions by a compiler - Google Patents
System and method for insertion of prefetch instructions by a compilerInfo
- Publication number
- AU2001296465A1 AU2001296465A1 AU2001296465A AU9646501A AU2001296465A1 AU 2001296465 A1 AU2001296465 A1 AU 2001296465A1 AU 2001296465 A AU2001296465 A AU 2001296465A AU 9646501 A AU9646501 A AU 9646501A AU 2001296465 A1 AU2001296465 A1 AU 2001296465A1
- Authority
- AU
- Australia
- Prior art keywords
- compiler
- prefetch instructions
- prefetch
- instructions
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/40—Transformation of program code
- G06F8/41—Compilation
- G06F8/44—Encoding
- G06F8/443—Optimisation
- G06F8/4441—Reducing the execution time required by the program code
- G06F8/4442—Reducing the number of cache misses; Data prefetching
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0862—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/40—Transformation of program code
- G06F8/41—Compilation
- G06F8/44—Encoding
- G06F8/445—Exploiting fine grain parallelism, i.e. parallelism at instruction level
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/60—Details of cache memory
- G06F2212/6028—Prefetching based on hints or prefetch instructions
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Software Systems (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Advance Control (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/679,433 US6651245B1 (en) | 2000-10-03 | 2000-10-03 | System and method for insertion of prefetch instructions by a compiler |
| US09/679,433 | 2000-10-03 | ||
| PCT/US2001/030749 WO2002029564A2 (en) | 2000-10-03 | 2001-09-28 | System and method for insertion of prefetch instructions by a compiler |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| AU2001296465A1 true AU2001296465A1 (en) | 2002-04-15 |
Family
ID=24726893
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AU2001296465A Abandoned AU2001296465A1 (en) | 2000-10-03 | 2001-09-28 | System and method for insertion of prefetch instructions by a compiler |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US6651245B1 (en) |
| EP (1) | EP1454233A2 (en) |
| AU (1) | AU2001296465A1 (en) |
| WO (1) | WO2002029564A2 (en) |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6845501B2 (en) * | 2001-07-27 | 2005-01-18 | Hewlett-Packard Development Company, L.P. | Method and apparatus for enabling a compiler to reduce cache misses by performing pre-fetches in the event of context switch |
| US7827543B1 (en) | 2004-02-28 | 2010-11-02 | Oracle America, Inc. | Method and apparatus for profiling data addresses |
| US8065665B1 (en) | 2004-02-28 | 2011-11-22 | Oracle America, Inc. | Method and apparatus for correlating profile data |
| US7735073B1 (en) | 2004-02-28 | 2010-06-08 | Oracle International Corporation | Method and apparatus for data object profiling |
| US7707554B1 (en) | 2004-04-21 | 2010-04-27 | Oracle America, Inc. | Associating data source information with runtime events |
| US7350029B2 (en) * | 2005-02-10 | 2008-03-25 | International Business Machines Corporation | Data stream prefetching in a microprocessor |
| US7380066B2 (en) * | 2005-02-10 | 2008-05-27 | International Business Machines Corporation | Store stream prefetching in a microprocessor |
| US7702888B2 (en) * | 2007-02-28 | 2010-04-20 | Globalfoundries Inc. | Branch predictor directed prefetch |
| JP2009020696A (en) * | 2007-07-11 | 2009-01-29 | Toshiba Corp | Information processing apparatus and system |
| JP2009020695A (en) * | 2007-07-11 | 2009-01-29 | Toshiba Corp | Information processing apparatus and system |
| US9632783B2 (en) * | 2014-10-03 | 2017-04-25 | Qualcomm Incorporated | Operand conflict resolution for reduced port general purpose register |
| US11226741B2 (en) * | 2018-10-31 | 2022-01-18 | EMC IP Holding Company LLC | I/O behavior prediction based on long-term pattern recognition |
| CN114924797B (en) * | 2022-05-24 | 2025-07-11 | 海光信息技术股份有限公司 | Method for prefetching instructions, information processing device, equipment and storage medium |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| IL100986A (en) | 1991-02-27 | 1997-01-10 | Digital Equipment Corp | Method for compiling code |
| JP2908598B2 (en) | 1991-06-06 | 1999-06-21 | 松下電器産業株式会社 | Information processing device |
| US5634025A (en) * | 1993-12-09 | 1997-05-27 | International Business Machines Corporation | Method and system for efficiently fetching variable-width instructions in a data processing system having multiple prefetch units |
| US5704053A (en) * | 1995-05-18 | 1997-12-30 | Hewlett-Packard Company | Efficient explicit data prefetching analysis and code generation in a low-level optimizer for inserting prefetch instructions into loops of applications |
| JP3218932B2 (en) * | 1995-07-06 | 2001-10-15 | 株式会社日立製作所 | Data prefetch code generation method |
| US5854934A (en) * | 1996-08-23 | 1998-12-29 | Hewlett-Packard Company | Optimizing compiler having data cache prefetch spreading |
| JP3156761B2 (en) * | 1997-06-04 | 2001-04-16 | 日本電気株式会社 | Code scheduling method for non-blocking cache and storage medium storing the program |
| US6549930B1 (en) * | 1997-11-26 | 2003-04-15 | Compaq Computer Corporation | Method for scheduling threads in a multithreaded processor |
| US6675374B2 (en) * | 1999-10-12 | 2004-01-06 | Hewlett-Packard Development Company, L.P. | Insertion of prefetch instructions into computer program code |
-
2000
- 2000-10-03 US US09/679,433 patent/US6651245B1/en not_active Expired - Lifetime
-
2001
- 2001-09-28 AU AU2001296465A patent/AU2001296465A1/en not_active Abandoned
- 2001-09-28 WO PCT/US2001/030749 patent/WO2002029564A2/en not_active Ceased
- 2001-09-28 EP EP01977339A patent/EP1454233A2/en not_active Withdrawn
Also Published As
| Publication number | Publication date |
|---|---|
| WO2002029564A2 (en) | 2002-04-11 |
| EP1454233A2 (en) | 2004-09-08 |
| US6651245B1 (en) | 2003-11-18 |
| WO2002029564A3 (en) | 2004-05-13 |
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