AU2001273258A1 - Memory access method and apparatus - Google Patents
Memory access method and apparatusInfo
- Publication number
- AU2001273258A1 AU2001273258A1 AU2001273258A AU7325801A AU2001273258A1 AU 2001273258 A1 AU2001273258 A1 AU 2001273258A1 AU 2001273258 A AU2001273258 A AU 2001273258A AU 7325801 A AU7325801 A AU 7325801A AU 2001273258 A1 AU2001273258 A1 AU 2001273258A1
- Authority
- AU
- Australia
- Prior art keywords
- memory access
- access method
- memory
- access
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/88—Masking faults in memories by using spares or by reconfiguring with partially good memories
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/76—Masking faults in memories by using spares or by reconfiguring using address translation or modifications
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US61831400A | 2000-07-18 | 2000-07-18 | |
| US09618314 | 2000-07-18 | ||
| PCT/US2001/021511 WO2002006960A1 (en) | 2000-07-18 | 2001-07-09 | Memory access method and apparatus |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| AU2001273258A1 true AU2001273258A1 (en) | 2002-01-30 |
Family
ID=24477201
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AU2001273258A Abandoned AU2001273258A1 (en) | 2000-07-18 | 2001-07-09 | Memory access method and apparatus |
Country Status (2)
| Country | Link |
|---|---|
| AU (1) | AU2001273258A1 (en) |
| WO (1) | WO2002006960A1 (en) |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE69034191T2 (en) * | 1989-04-13 | 2005-11-24 | Sandisk Corp., Sunnyvale | EEPROM system with multi-chip block erasure |
| US6249465B1 (en) * | 2000-02-18 | 2001-06-19 | Hewlett-Packard Company | Redundancy programming using addressable scan paths to reduce the number of required fuses |
-
2001
- 2001-07-09 AU AU2001273258A patent/AU2001273258A1/en not_active Abandoned
- 2001-07-09 WO PCT/US2001/021511 patent/WO2002006960A1/en not_active Ceased
Also Published As
| Publication number | Publication date |
|---|---|
| WO2002006960A1 (en) | 2002-01-24 |
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