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AU2001270254A1 - Method and apparatus for transferring packets to a memory - Google Patents

Method and apparatus for transferring packets to a memory

Info

Publication number
AU2001270254A1
AU2001270254A1 AU2001270254A AU7025401A AU2001270254A1 AU 2001270254 A1 AU2001270254 A1 AU 2001270254A1 AU 2001270254 A AU2001270254 A AU 2001270254A AU 7025401 A AU7025401 A AU 7025401A AU 2001270254 A1 AU2001270254 A1 AU 2001270254A1
Authority
AU
Australia
Prior art keywords
memory
transferring packets
packets
transferring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001270254A
Inventor
Joseph A. Hook
Fan Zhou
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Marconi Communications Inc
Original Assignee
Marconi Communications Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Marconi Communications Inc filed Critical Marconi Communications Inc
Publication of AU2001270254A1 publication Critical patent/AU2001270254A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/13092—Scanning of subscriber lines, monitoring
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/13103—Memory
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/13106—Microprocessor, CPU
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/13296—Packet switching, X.25, frame relay

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Small-Scale Networks (AREA)
AU2001270254A 2000-06-30 2001-06-29 Method and apparatus for transferring packets to a memory Abandoned AU2001270254A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/609,298 US6473435B1 (en) 2000-06-30 2000-06-30 Method and apparatus for transferring packets to a memory
US09609298 2000-06-30
PCT/US2001/020735 WO2002003621A1 (en) 2000-06-30 2001-06-29 Method and apparatus for transferring packets to a memory

Publications (1)

Publication Number Publication Date
AU2001270254A1 true AU2001270254A1 (en) 2002-01-14

Family

ID=24440189

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001270254A Abandoned AU2001270254A1 (en) 2000-06-30 2001-06-29 Method and apparatus for transferring packets to a memory

Country Status (6)

Country Link
US (1) US6473435B1 (en)
EP (1) EP1297657B1 (en)
JP (1) JP2004503137A (en)
AU (1) AU2001270254A1 (en)
DE (1) DE60118385T2 (en)
WO (1) WO2002003621A1 (en)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6792484B1 (en) * 2000-07-28 2004-09-14 Marconi Communications, Inc. Method and apparatus for storing data using a plurality of queues
US7352770B1 (en) 2000-08-04 2008-04-01 Intellon Corporation Media access control protocol with priority and contention-free intervals
US6987770B1 (en) 2000-08-04 2006-01-17 Intellon Corporation Frame forwarding in an adaptive network
US6909723B1 (en) 2000-08-04 2005-06-21 Intellon Corporation Segment bursting with priority pre-emption and reduced latency
US7469297B1 (en) 2000-08-04 2008-12-23 Intellon Corporation Mechanism for using a quasi-addressed response to bind to a message requesting the response
US7298691B1 (en) 2000-08-04 2007-11-20 Intellon Corporation Method and protocol to adapt each unique connection in a multi-node network to a maximum data rate
US6907044B1 (en) 2000-08-04 2005-06-14 Intellon Corporation Method and protocol to support contention-free intervals and QoS in a CSMA network
US7106692B1 (en) * 2000-10-04 2006-09-12 Ericsson Ab APS/port mirroring
US7009963B1 (en) * 2000-10-11 2006-03-07 Marconi Intellectual Property (Ringfence), Inc. Dual optimality for different data rate backplane transfer
US7120847B2 (en) 2002-06-26 2006-10-10 Intellon Corporation Powerline network flood control restriction
US7826466B2 (en) 2002-06-26 2010-11-02 Atheros Communications, Inc. Communication buffer scheme optimized for VoIP, QoS and data networking over a power line
US8149703B2 (en) 2002-06-26 2012-04-03 Qualcomm Atheros, Inc. Powerline network bridging congestion control
US7623542B2 (en) 2002-10-21 2009-11-24 Intellon Corporation Contention-free access intervals on a CSMA network
JP4049004B2 (en) * 2003-04-23 2008-02-20 株式会社日立製作所 Wireless LAN base station device
US7281187B2 (en) 2003-11-20 2007-10-09 Intellon Corporation Using error checking bits to communicated an address or other bits
US8090857B2 (en) 2003-11-24 2012-01-03 Qualcomm Atheros, Inc. Medium access control layer that encapsulates data from a plurality of received data units into a plurality of independently transmittable blocks
US7660327B2 (en) 2004-02-03 2010-02-09 Atheros Communications, Inc. Temporary priority promotion for network communications in which access to a shared medium depends on a priority level
US7715425B2 (en) 2004-02-26 2010-05-11 Atheros Communications, Inc. Channel adaptation synchronized to periodically varying channel
US7480308B1 (en) * 2004-03-29 2009-01-20 Cisco Technology, Inc. Distributing packets and packets fragments possibly received out of sequence into an expandable set of queues of particular use in packet resequencing and reassembly
US7636370B2 (en) 2005-03-03 2009-12-22 Intellon Corporation Reserving time periods for communication on power line networks
US7965708B2 (en) * 2005-06-07 2011-06-21 Cisco Technology, Inc. Method and apparatus for using meta-packets in a packet processing system
US8175190B2 (en) 2005-07-27 2012-05-08 Qualcomm Atheros, Inc. Managing spectra of modulated signals in a communication network
US7822059B2 (en) 2005-07-27 2010-10-26 Atheros Communications, Inc. Managing contention-free time allocations in a network
EP2159966A1 (en) 2007-05-10 2010-03-03 Intellon Corporation Managing distributed access to a shared medium
CN102948119B (en) 2010-04-12 2016-04-20 高通股份有限公司 Be provided for the delimiter carrying out low overhead communication in a network
US8891605B2 (en) 2013-03-13 2014-11-18 Qualcomm Incorporated Variable line cycle adaptation for powerline communications
US12170603B2 (en) 2023-02-16 2024-12-17 Arista Networks, Inc. Sampled packet information accumulation

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5048081A (en) 1989-12-28 1991-09-10 At&T Bell Laboratories Arrangement for routing packetized messages
US5309432A (en) * 1992-05-06 1994-05-03 At&T Bell Laboratories High-speed packet switch
JP3104429B2 (en) * 1992-10-08 2000-10-30 株式会社日立製作所 Common buffer type ATM switch having copy function and copy method thereof
SE515419C2 (en) * 1993-06-15 2001-07-30 Ericsson Telefon Ab L M Method and apparatus for travel sequencing
GB2288096B (en) * 1994-03-23 1999-04-28 Roke Manor Research Apparatus and method of processing bandwidth requirements in an ATM switch
IT1278517B1 (en) * 1994-07-25 1997-11-24 Motorola Inc Process for inter-satellite transfer of data packets
JP2922119B2 (en) 1994-09-01 1999-07-19 沖電気工業株式会社 Bandwidth regulation device and packet communication device
US5517495A (en) * 1994-12-06 1996-05-14 At&T Corp. Fair prioritized scheduling in an input-buffered switch
US5587997A (en) * 1995-02-24 1996-12-24 Hewlett-Packard Company Method and apparatus for determining when all packets of a message have arrived
US5940596A (en) * 1996-03-25 1999-08-17 I-Cube, Inc. Clustered address caching system for a network switch
US5995511A (en) * 1996-04-05 1999-11-30 Fore Systems, Inc. Digital network including mechanism for grouping virtual message transfer paths having similar transfer service rates to facilitate efficient scheduling of transfers thereover
JP3752809B2 (en) * 1997-11-26 2006-03-08 三菱電機株式会社 Digital television receiving method and digital television receiving terminal device

Also Published As

Publication number Publication date
EP1297657B1 (en) 2006-03-29
DE60118385D1 (en) 2006-05-18
DE60118385T2 (en) 2006-10-19
EP1297657A4 (en) 2003-07-09
JP2004503137A (en) 2004-01-29
US6473435B1 (en) 2002-10-29
EP1297657A1 (en) 2003-04-02
WO2002003621A1 (en) 2002-01-10

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