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AU2001255229A1 - Method and apparatus for overlaying memory in a data processing system - Google Patents

Method and apparatus for overlaying memory in a data processing system

Info

Publication number
AU2001255229A1
AU2001255229A1 AU2001255229A AU5522901A AU2001255229A1 AU 2001255229 A1 AU2001255229 A1 AU 2001255229A1 AU 2001255229 A AU2001255229 A AU 2001255229A AU 5522901 A AU5522901 A AU 5522901A AU 2001255229 A1 AU2001255229 A1 AU 2001255229A1
Authority
AU
Australia
Prior art keywords
data processing
processing system
overlaying memory
overlaying
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001255229A
Inventor
Surendra P. Bhattarai
Guruswamy Ganesh
Wallace B. Harwood Iii
Joseph Jelemensky
Gary L. Miller
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of AU2001255229A1 publication Critical patent/AU2001255229A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0638—Combination of memories, e.g. ROM and RAM such as to permit replacement or supplementing of words in one module by words in another module
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System (AREA)
  • Semiconductor Memories (AREA)
  • Storage Device Security (AREA)
  • Read Only Memory (AREA)
  • Information Transfer Between Computers (AREA)
  • Microcomputers (AREA)
AU2001255229A 2000-04-04 2001-04-04 Method and apparatus for overlaying memory in a data processing system Abandoned AU2001255229A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09542747 2000-04-04
US09/542,747 US6725346B1 (en) 2000-04-04 2000-04-04 Method and apparatus for overlaying memory in a data processing system
PCT/US2001/010973 WO2001075613A2 (en) 2000-04-04 2001-04-04 Method and apparatus for overlaying memory in a data processing system

Publications (1)

Publication Number Publication Date
AU2001255229A1 true AU2001255229A1 (en) 2001-10-15

Family

ID=24165124

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001255229A Abandoned AU2001255229A1 (en) 2000-04-04 2001-04-04 Method and apparatus for overlaying memory in a data processing system

Country Status (9)

Country Link
US (1) US6725346B1 (en)
EP (1) EP1272936A2 (en)
JP (1) JP2003529842A (en)
KR (1) KR100731527B1 (en)
CN (1) CN1179275C (en)
AU (1) AU2001255229A1 (en)
GB (1) GB2367394B (en)
TW (1) TW501015B (en)
WO (1) WO2001075613A2 (en)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1573552B1 (en) 2002-12-20 2007-09-05 International Business Machines Corporation Method and system for alternatively activating a replaceable hardware unit
DE60316183T2 (en) * 2002-12-20 2008-06-05 International Business Machines Corp. METHOD AND DEVICE FOR ALTERNATE ACTIVATION OF AN INTERCHANGEABLE HARDWARE UNIT
US6941219B2 (en) * 2003-09-30 2005-09-06 Detroit Diesel Corporation Method for recreating valid calibration data for an engine control module
KR100631780B1 (en) 2004-08-28 2006-10-11 삼성전자주식회사 Communication method between overlay units and apparatus using same
US7684264B2 (en) * 2007-01-26 2010-03-23 Freescale Semiconductor, Inc. Memory system with RAM array and redundant RAM memory cells having a different designed cell circuit topology than cells of non redundant RAM array
US20080271019A1 (en) * 2007-04-24 2008-10-30 Stratton Robert J System and Method for Creating a Virtual Assurance System
US20080271025A1 (en) * 2007-04-24 2008-10-30 Stacksafe, Inc. System and method for creating an assurance system in a production environment
US20090271563A1 (en) * 2008-04-28 2009-10-29 Microsoft Corporation Flash memory transactioning
JP5081076B2 (en) * 2008-06-23 2012-11-21 株式会社リコー Memory management apparatus, image forming apparatus, and memory management method
JP6016605B2 (en) * 2012-12-12 2016-10-26 三菱電機株式会社 Electronic instrument

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4141068A (en) * 1977-03-24 1979-02-20 Xerox Corporation Auxiliary ROM memory system
JPS58112149A (en) 1981-12-25 1983-07-04 Hitachi Ltd Address converting system of overlay program
US5187792A (en) 1990-05-09 1993-02-16 International Business Machines Corporation Method and apparatus for selectively reclaiming a portion of RAM in a personal computer system
US5603011A (en) 1992-12-11 1997-02-11 International Business Machines Corporation Selective shadowing and paging in computer memory systems
JPH06187140A (en) * 1992-12-16 1994-07-08 Oki Electric Ind Co Ltd Processor
US5974402A (en) * 1993-12-09 1999-10-26 Pitney Bowes Inc. Address decoder with memory wait state circuit
US5737748A (en) * 1995-03-15 1998-04-07 Texas Instruments Incorporated Microprocessor unit having a first level write-through cache memory and a smaller second-level write-back cache memory
JPH09160768A (en) * 1995-12-05 1997-06-20 Sharp Corp Program execution device
GB9609826D0 (en) * 1996-05-10 1996-07-17 Kalamazoo Computer Group Plc Improvements in and relating to anti-photocopying measures
US5793943A (en) * 1996-07-29 1998-08-11 Micron Electronics, Inc. System for a primary BIOS ROM recovery in a dual BIOS ROM computer system
EP0834812A1 (en) 1996-09-30 1998-04-08 Cummins Engine Company, Inc. A method for accessing flash memory and an automotive electronic control system
US5887995A (en) * 1997-09-23 1999-03-30 Compaq Computer Corporation Touchpad overlay with tactile response
JPH11110207A (en) * 1997-09-30 1999-04-23 Sanyo Electric Co Ltd Information processor

Also Published As

Publication number Publication date
CN1179275C (en) 2004-12-08
TW501015B (en) 2002-09-01
GB2367394B (en) 2004-09-08
KR100731527B1 (en) 2007-06-25
KR20030014382A (en) 2003-02-17
US6725346B1 (en) 2004-04-20
WO2001075613A3 (en) 2002-03-21
GB0105594D0 (en) 2001-04-25
EP1272936A2 (en) 2003-01-08
GB2367394A (en) 2002-04-03
WO2001075613A2 (en) 2001-10-11
CN1426559A (en) 2003-06-25
JP2003529842A (en) 2003-10-07

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